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author | Dimitry Andric <dim@FreeBSD.org> | 2020-01-22 20:31:01 +0000 |
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committer | Dimitry Andric <dim@FreeBSD.org> | 2020-01-22 20:31:01 +0000 |
commit | 8bcb0991864975618c09697b1aca10683346d9f0 (patch) | |
tree | 0afab28faa50e5f27698f8dd6c1921fff8d25e39 /contrib/llvm-project/llvm/lib/Target/AVR/AVRISelLowering.cpp | |
parent | b14637d118e110006a149a79b649c5695e7f419a (diff) | |
parent | 1d5ae1026e831016fc29fd927877c86af904481f (diff) | |
download | src-8bcb0991864975618c09697b1aca10683346d9f0.tar.gz src-8bcb0991864975618c09697b1aca10683346d9f0.zip |
Merge ^/vendor/llvm/dist up to its last change, and resolve conflicts.
Notes
Notes:
svn path=/projects/clang1000-import/; revision=356992
Diffstat (limited to 'contrib/llvm-project/llvm/lib/Target/AVR/AVRISelLowering.cpp')
-rw-r--r-- | contrib/llvm-project/llvm/lib/Target/AVR/AVRISelLowering.cpp | 21 |
1 files changed, 10 insertions, 11 deletions
diff --git a/contrib/llvm-project/llvm/lib/Target/AVR/AVRISelLowering.cpp b/contrib/llvm-project/llvm/lib/Target/AVR/AVRISelLowering.cpp index f159beee9730..f12c59b7d8c3 100644 --- a/contrib/llvm-project/llvm/lib/Target/AVR/AVRISelLowering.cpp +++ b/contrib/llvm-project/llvm/lib/Target/AVR/AVRISelLowering.cpp @@ -236,7 +236,7 @@ AVRTargetLowering::AVRTargetLowering(const AVRTargetMachine &TM, setLibcallName(RTLIB::SIN_F32, "sin"); setLibcallName(RTLIB::COS_F32, "cos"); - setMinFunctionAlignment(1); + setMinFunctionAlignment(Align(2)); setMinimumJumpTableEntries(UINT_MAX); } @@ -1517,11 +1517,11 @@ MachineBasicBlock *AVRTargetLowering::insertShift(MachineInstr &MI, unsigned ShiftAmtReg = RI.createVirtualRegister(&AVR::LD8RegClass); unsigned ShiftAmtReg2 = RI.createVirtualRegister(&AVR::LD8RegClass); - unsigned ShiftReg = RI.createVirtualRegister(RC); - unsigned ShiftReg2 = RI.createVirtualRegister(RC); - unsigned ShiftAmtSrcReg = MI.getOperand(2).getReg(); - unsigned SrcReg = MI.getOperand(1).getReg(); - unsigned DstReg = MI.getOperand(0).getReg(); + Register ShiftReg = RI.createVirtualRegister(RC); + Register ShiftReg2 = RI.createVirtualRegister(RC); + Register ShiftAmtSrcReg = MI.getOperand(2).getReg(); + Register SrcReg = MI.getOperand(1).getReg(); + Register DstReg = MI.getOperand(0).getReg(); // BB: // cpi N, 0 @@ -1568,7 +1568,7 @@ MachineBasicBlock *AVRTargetLowering::insertShift(MachineInstr &MI, static bool isCopyMulResult(MachineBasicBlock::iterator const &I) { if (I->getOpcode() == AVR::COPY) { - unsigned SrcReg = I->getOperand(1).getReg(); + Register SrcReg = I->getOperand(1).getReg(); return (SrcReg == AVR::R0 || SrcReg == AVR::R1); } @@ -2006,10 +2006,9 @@ void AVRTargetLowering::LowerAsmOperandForConstraint(SDValue Op, return TargetLowering::LowerAsmOperandForConstraint(Op, Constraint, Ops, DAG); } -unsigned AVRTargetLowering::getRegisterByName(const char *RegName, - EVT VT, - SelectionDAG &DAG) const { - unsigned Reg; +Register AVRTargetLowering::getRegisterByName(const char *RegName, EVT VT, + const MachineFunction &MF) const { + Register Reg; if (VT == MVT::i8) { Reg = StringSwitch<unsigned>(RegName) |