diff options
author | Dimitry Andric <dim@FreeBSD.org> | 2024-07-27 23:34:35 +0000 |
---|---|---|
committer | Dimitry Andric <dim@FreeBSD.org> | 2024-10-23 18:26:01 +0000 |
commit | 0fca6ea1d4eea4c934cfff25ac9ee8ad6fe95583 (patch) | |
tree | 6cf5ab1f05330c6773b1f3f64799d56a9c7a1faa /contrib/llvm-project/llvm/lib/Target/MSP430 | |
parent | 6b9f7133aba44189d9625c352bc2c2a59baf18ef (diff) | |
parent | ac9a064cb179f3425b310fa2847f8764ac970a4d (diff) |
Diffstat (limited to 'contrib/llvm-project/llvm/lib/Target/MSP430')
8 files changed, 27 insertions, 31 deletions
diff --git a/contrib/llvm-project/llvm/lib/Target/MSP430/AsmParser/MSP430AsmParser.cpp b/contrib/llvm-project/llvm/lib/Target/MSP430/AsmParser/MSP430AsmParser.cpp index f3213ee72d9a..2bc1a89ef59c 100644 --- a/contrib/llvm-project/llvm/lib/Target/MSP430/AsmParser/MSP430AsmParser.cpp +++ b/contrib/llvm-project/llvm/lib/Target/MSP430/AsmParser/MSP430AsmParser.cpp @@ -183,7 +183,7 @@ public: return Tok; } - unsigned getReg() const override { + MCRegister getReg() const override { assert(Kind == k_Reg && "Invalid access!"); return Reg; } @@ -286,8 +286,8 @@ bool MSP430AsmParser::MatchAndEmitInstruction(SMLoc Loc, unsigned &Opcode, } // Auto-generated by TableGen -static unsigned MatchRegisterName(StringRef Name); -static unsigned MatchRegisterAltName(StringRef Name); +static MCRegister MatchRegisterName(StringRef Name); +static MCRegister MatchRegisterAltName(StringRef Name); bool MSP430AsmParser::parseRegister(MCRegister &Reg, SMLoc &StartLoc, SMLoc &EndLoc) { diff --git a/contrib/llvm-project/llvm/lib/Target/MSP430/MCTargetDesc/MSP430AsmBackend.cpp b/contrib/llvm-project/llvm/lib/Target/MSP430/MCTargetDesc/MSP430AsmBackend.cpp index bd9f6279445a..87e4126bde39 100644 --- a/contrib/llvm-project/llvm/lib/Target/MSP430/MCTargetDesc/MSP430AsmBackend.cpp +++ b/contrib/llvm-project/llvm/lib/Target/MSP430/MCTargetDesc/MSP430AsmBackend.cpp @@ -47,16 +47,10 @@ public: return createMSP430ELFObjectWriter(OSABI); } - bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value, - const MCRelaxableFragment *DF, - const MCAsmLayout &Layout) const override { - return false; - } - - bool fixupNeedsRelaxationAdvanced(const MCFixup &Fixup, bool Resolved, + bool fixupNeedsRelaxationAdvanced(const MCAssembler &Asm, + const MCFixup &Fixup, bool Resolved, uint64_t Value, const MCRelaxableFragment *DF, - const MCAsmLayout &Layout, const bool WasForced) const override { return false; } diff --git a/contrib/llvm-project/llvm/lib/Target/MSP430/MCTargetDesc/MSP430ELFStreamer.cpp b/contrib/llvm-project/llvm/lib/Target/MSP430/MCTargetDesc/MSP430ELFStreamer.cpp index 0cdb3a595f71..6c7922a655d9 100644 --- a/contrib/llvm-project/llvm/lib/Target/MSP430/MCTargetDesc/MSP430ELFStreamer.cpp +++ b/contrib/llvm-project/llvm/lib/Target/MSP430/MCTargetDesc/MSP430ELFStreamer.cpp @@ -35,10 +35,6 @@ public: MSP430TargetELFStreamer::MSP430TargetELFStreamer(MCStreamer &S, const MCSubtargetInfo &STI) : MCTargetStreamer(S) { - MCAssembler &MCA = getStreamer().getAssembler(); - unsigned EFlags = MCA.getELFHeaderEFlags(); - MCA.setELFHeaderEFlags(EFlags); - // Emit build attributes section according to // MSP430 EABI (slaa534.pdf, part 13). MCSection *AttributeSection = getStreamer().getContext().getELFSection( diff --git a/contrib/llvm-project/llvm/lib/Target/MSP430/MSP430.h b/contrib/llvm-project/llvm/lib/Target/MSP430/MSP430.h index 60685b6704ba..019835908db8 100644 --- a/contrib/llvm-project/llvm/lib/Target/MSP430/MSP430.h +++ b/contrib/llvm-project/llvm/lib/Target/MSP430/MSP430.h @@ -43,7 +43,7 @@ FunctionPass *createMSP430ISelDag(MSP430TargetMachine &TM, FunctionPass *createMSP430BranchSelectionPass(); -void initializeMSP430DAGToDAGISelPass(PassRegistry &); +void initializeMSP430DAGToDAGISelLegacyPass(PassRegistry &); } // namespace llvm diff --git a/contrib/llvm-project/llvm/lib/Target/MSP430/MSP430FrameLowering.cpp b/contrib/llvm-project/llvm/lib/Target/MSP430/MSP430FrameLowering.cpp index 176387d71fcb..f4d703ebeeab 100644 --- a/contrib/llvm-project/llvm/lib/Target/MSP430/MSP430FrameLowering.cpp +++ b/contrib/llvm-project/llvm/lib/Target/MSP430/MSP430FrameLowering.cpp @@ -59,8 +59,7 @@ void MSP430FrameLowering::emitCalleeSavedFrameMoves( const DebugLoc &DL, bool IsPrologue) const { MachineFunction &MF = *MBB.getParent(); MachineFrameInfo &MFI = MF.getFrameInfo(); - MachineModuleInfo &MMI = MF.getMMI(); - const MCRegisterInfo *MRI = MMI.getContext().getRegisterInfo(); + const MCRegisterInfo *MRI = MF.getContext().getRegisterInfo(); // Add callee saved registers to move list. const std::vector<CalleeSavedInfo> &CSI = MFI.getCalleeSavedInfo(); diff --git a/contrib/llvm-project/llvm/lib/Target/MSP430/MSP430ISelDAGToDAG.cpp b/contrib/llvm-project/llvm/lib/Target/MSP430/MSP430ISelDAGToDAG.cpp index efb23b1a4e3f..7be51d98d97d 100644 --- a/contrib/llvm-project/llvm/lib/Target/MSP430/MSP430ISelDAGToDAG.cpp +++ b/contrib/llvm-project/llvm/lib/Target/MSP430/MSP430ISelDAGToDAG.cpp @@ -91,12 +91,10 @@ namespace { namespace { class MSP430DAGToDAGISel : public SelectionDAGISel { public: - static char ID; - MSP430DAGToDAGISel() = delete; MSP430DAGToDAGISel(MSP430TargetMachine &TM, CodeGenOptLevel OptLevel) - : SelectionDAGISel(ID, TM, OptLevel) {} + : SelectionDAGISel(TM, OptLevel) {} private: bool MatchAddress(SDValue N, MSP430ISelAddressMode &AM); @@ -119,18 +117,26 @@ namespace { bool SelectAddr(SDValue Addr, SDValue &Base, SDValue &Disp); }; + + class MSP430DAGToDAGISelLegacy : public SelectionDAGISelLegacy { + public: + static char ID; + MSP430DAGToDAGISelLegacy(MSP430TargetMachine &TM, CodeGenOptLevel OptLevel) + : SelectionDAGISelLegacy( + ID, std::make_unique<MSP430DAGToDAGISel>(TM, OptLevel)) {} + }; } // end anonymous namespace -char MSP430DAGToDAGISel::ID; +char MSP430DAGToDAGISelLegacy::ID; -INITIALIZE_PASS(MSP430DAGToDAGISel, DEBUG_TYPE, PASS_NAME, false, false) +INITIALIZE_PASS(MSP430DAGToDAGISelLegacy, DEBUG_TYPE, PASS_NAME, false, false) /// createMSP430ISelDag - This pass converts a legalized DAG into a /// MSP430-specific DAG, ready for instruction scheduling. /// FunctionPass *llvm::createMSP430ISelDag(MSP430TargetMachine &TM, CodeGenOptLevel OptLevel) { - return new MSP430DAGToDAGISel(TM, OptLevel); + return new MSP430DAGToDAGISelLegacy(TM, OptLevel); } /// MatchWrapper - Try to match MSP430ISD::Wrapper node into an addressing mode. diff --git a/contrib/llvm-project/llvm/lib/Target/MSP430/MSP430ISelLowering.cpp b/contrib/llvm-project/llvm/lib/Target/MSP430/MSP430ISelLowering.cpp index fc066f001316..ba7b6c85bd81 100644 --- a/contrib/llvm-project/llvm/lib/Target/MSP430/MSP430ISelLowering.cpp +++ b/contrib/llvm-project/llvm/lib/Target/MSP430/MSP430ISelLowering.cpp @@ -864,11 +864,12 @@ SDValue MSP430TargetLowering::LowerCCCCallTo( if (Flags.isByVal()) { SDValue SizeNode = DAG.getConstant(Flags.getByValSize(), dl, MVT::i16); - MemOp = DAG.getMemcpy( - Chain, dl, PtrOff, Arg, SizeNode, Flags.getNonZeroByValAlign(), - /*isVolatile*/ false, - /*AlwaysInline=*/true, - /*isTailCall=*/false, MachinePointerInfo(), MachinePointerInfo()); + MemOp = DAG.getMemcpy(Chain, dl, PtrOff, Arg, SizeNode, + Flags.getNonZeroByValAlign(), + /*isVolatile*/ false, + /*AlwaysInline=*/true, + /*CI=*/nullptr, std::nullopt, + MachinePointerInfo(), MachinePointerInfo()); } else { MemOp = DAG.getStore(Chain, dl, Arg, PtrOff, MachinePointerInfo()); } diff --git a/contrib/llvm-project/llvm/lib/Target/MSP430/MSP430TargetMachine.cpp b/contrib/llvm-project/llvm/lib/Target/MSP430/MSP430TargetMachine.cpp index 283de46e57d5..f307c3765150 100644 --- a/contrib/llvm-project/llvm/lib/Target/MSP430/MSP430TargetMachine.cpp +++ b/contrib/llvm-project/llvm/lib/Target/MSP430/MSP430TargetMachine.cpp @@ -26,7 +26,7 @@ extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeMSP430Target() { // Register the target. RegisterTargetMachine<MSP430TargetMachine> X(getTheMSP430Target()); PassRegistry &PR = *PassRegistry::getPassRegistry(); - initializeMSP430DAGToDAGISelPass(PR); + initializeMSP430DAGToDAGISelLegacyPass(PR); } static Reloc::Model getEffectiveRelocModel(std::optional<Reloc::Model> RM) { @@ -83,7 +83,7 @@ MachineFunctionInfo *MSP430TargetMachine::createMachineFunctionInfo( } void MSP430PassConfig::addIRPasses() { - addPass(createAtomicExpandPass()); + addPass(createAtomicExpandLegacyPass()); TargetPassConfig::addIRPasses(); } |