1 files changed, 14 insertions, 1 deletions

diff --git a/contrib/llvm-project/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp b/contrib/llvm-project/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp
index 4e40a84ecfd0..fb92590350c7 100644
--- a/contrib/llvm-project/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp
+++ b/contrib/llvm-project/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp
@@ -486,6 +486,10 @@ static DecodeStatus DecodeMovePOperands(MCInst &Inst, unsigned Insn,
                                         uint64_t Address,
                                         const MCDisassembler *Decoder);
 
+static DecodeStatus DecodeFIXMEInstruction(MCInst &Inst, unsigned Insn,
+                                           uint64_t Address,
+                                           const MCDisassembler *Decoder);
+
 static MCDisassembler *createMipsDisassembler(
                        const Target &T,
                        const MCSubtargetInfo &STI,
@@ -1813,7 +1817,7 @@ static DecodeStatus DecodeMemMMImm12(MCInst &Inst, unsigned Insn,
     break;
   case Mips::SC_MM:
     Inst.addOperand(MCOperand::createReg(Reg));
-    LLVM_FALLTHROUGH;
+    [[fallthrough]];
   default:
     Inst.addOperand(MCOperand::createReg(Reg));
     if (Inst.getOpcode() == Mips::LWP_MM || Inst.getOpcode() == Mips::SWP_MM)
@@ -2513,3 +2517,12 @@ static DecodeStatus DecodeBlezGroupBranchMMR6(MCInst &MI, InsnType insn,
 
   return MCDisassembler::Success;
 }
+
+// This instruction does not have a working decoder, and needs to be
+// fixed. This "fixme" function was introduced to keep the backend compiling,
+// while making changes to tablegen code.
+static DecodeStatus DecodeFIXMEInstruction(MCInst &Inst, unsigned Insn,
+                                           uint64_t Address,
+                                           const MCDisassembler *Decoder) {
+  return MCDisassembler::Fail;
+}