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authorDimitry Andric <dim@FreeBSD.org>2021-12-02 21:49:08 +0000
committerDimitry Andric <dim@FreeBSD.org>2022-06-04 11:59:04 +0000
commit574b7079b96703a748f89ef5adb7dc3e26b8f7fc (patch)
tree195000196b1e0cc13dea43258fa240e006f48184 /contrib/llvm-project/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
parent1f6fd64fe9c996b4795ee4a6c66b8f9216747560 (diff)
Diffstat (limited to 'contrib/llvm-project/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp')
-rw-r--r--contrib/llvm-project/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp16
1 files changed, 13 insertions, 3 deletions
diff --git a/contrib/llvm-project/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp b/contrib/llvm-project/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
index 595c3cdfbb1d..f5d491938050 100644
--- a/contrib/llvm-project/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
+++ b/contrib/llvm-project/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
@@ -237,7 +237,13 @@ bool RISCVFrameLowering::hasBP(const MachineFunction &MF) const {
const MachineFrameInfo &MFI = MF.getFrameInfo();
const TargetRegisterInfo *TRI = STI.getRegisterInfo();
- return MFI.hasVarSizedObjects() && TRI->hasStackRealignment(MF);
+ // If we do not reserve stack space for outgoing arguments in prologue,
+ // we will adjust the stack pointer before call instruction. After the
+ // adjustment, we can not use SP to access the stack objects for the
+ // arguments. Instead, use BP to access these stack objects.
+ return (MFI.hasVarSizedObjects() ||
+ (!hasReservedCallFrame(MF) && MFI.getMaxCallFrameSize() != 0)) &&
+ TRI->hasStackRealignment(MF);
}
// Determines the size of the frame and maximum call frame size.
@@ -1065,10 +1071,14 @@ bool RISCVFrameLowering::restoreCalleeSavedRegisters(
if (MI != MBB.end() && !MI->isDebugInstr())
DL = MI->getDebugLoc();
- // Manually restore values not restored by libcall. Insert in reverse order.
+ // Manually restore values not restored by libcall.
+ // Keep the same order as in the prologue. There is no need to reverse the
+ // order in the epilogue. In addition, the return address will be restored
+ // first in the epilogue. It increases the opportunity to avoid the
+ // load-to-use data hazard between loading RA and return by RA.
// loadRegFromStackSlot can insert multiple instructions.
const auto &NonLibcallCSI = getNonLibcallCSI(*MF, CSI);
- for (auto &CS : reverse(NonLibcallCSI)) {
+ for (auto &CS : NonLibcallCSI) {
Register Reg = CS.getReg();
const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg);
TII.loadRegFromStackSlot(MBB, MI, Reg, CS.getFrameIdx(), RC, TRI);