diff options
author | Dimitry Andric <dim@FreeBSD.org> | 2021-08-22 19:00:43 +0000 |
---|---|---|
committer | Dimitry Andric <dim@FreeBSD.org> | 2021-11-13 20:39:49 +0000 |
commit | fe6060f10f634930ff71b7c50291ddc610da2475 (patch) | |
tree | 1483580c790bd4d27b6500a7542b5ee00534d3cc /contrib/llvm-project/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp | |
parent | b61bce17f346d79cecfd8f195a64b10f77be43b1 (diff) | |
parent | 344a3780b2e33f6ca763666c380202b18aab72a3 (diff) |
Diffstat (limited to 'contrib/llvm-project/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp')
-rw-r--r-- | contrib/llvm-project/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp | 81 |
1 files changed, 71 insertions, 10 deletions
diff --git a/contrib/llvm-project/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp b/contrib/llvm-project/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp index 27714cffc989..fd110db1064b 100644 --- a/contrib/llvm-project/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp +++ b/contrib/llvm-project/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp @@ -15,8 +15,8 @@ using namespace llvm; #define DEBUG_TYPE "riscvtti" -int RISCVTTIImpl::getIntImmCost(const APInt &Imm, Type *Ty, - TTI::TargetCostKind CostKind) { +InstructionCost RISCVTTIImpl::getIntImmCost(const APInt &Imm, Type *Ty, + TTI::TargetCostKind CostKind) { assert(Ty->isIntegerTy() && "getIntImmCost can only estimate cost of materialising integers"); @@ -27,13 +27,13 @@ int RISCVTTIImpl::getIntImmCost(const APInt &Imm, Type *Ty, // Otherwise, we check how many instructions it will take to materialise. const DataLayout &DL = getDataLayout(); return RISCVMatInt::getIntMatCost(Imm, DL.getTypeSizeInBits(Ty), - getST()->is64Bit()); + getST()->getFeatureBits()); } -int RISCVTTIImpl::getIntImmCostInst(unsigned Opcode, unsigned Idx, - const APInt &Imm, Type *Ty, - TTI::TargetCostKind CostKind, - Instruction *Inst) { +InstructionCost RISCVTTIImpl::getIntImmCostInst(unsigned Opcode, unsigned Idx, + const APInt &Imm, Type *Ty, + TTI::TargetCostKind CostKind, + Instruction *Inst) { assert(Ty->isIntegerTy() && "getIntImmCost can only estimate cost of materialising integers"); @@ -88,9 +88,70 @@ int RISCVTTIImpl::getIntImmCostInst(unsigned Opcode, unsigned Idx, return TTI::TCC_Free; } -int RISCVTTIImpl::getIntImmCostIntrin(Intrinsic::ID IID, unsigned Idx, - const APInt &Imm, Type *Ty, - TTI::TargetCostKind CostKind) { +InstructionCost +RISCVTTIImpl::getIntImmCostIntrin(Intrinsic::ID IID, unsigned Idx, + const APInt &Imm, Type *Ty, + TTI::TargetCostKind CostKind) { // Prevent hoisting in unknown cases. return TTI::TCC_Free; } + +TargetTransformInfo::PopcntSupportKind +RISCVTTIImpl::getPopcntSupport(unsigned TyWidth) { + assert(isPowerOf2_32(TyWidth) && "Ty width must be power of 2"); + return ST->hasStdExtZbb() ? TTI::PSK_FastHardware : TTI::PSK_Software; +} + +bool RISCVTTIImpl::shouldExpandReduction(const IntrinsicInst *II) const { + // Currently, the ExpandReductions pass can't expand scalable-vector + // reductions, but we still request expansion as RVV doesn't support certain + // reductions and the SelectionDAG can't legalize them either. + switch (II->getIntrinsicID()) { + default: + return false; + // These reductions have no equivalent in RVV + case Intrinsic::vector_reduce_mul: + case Intrinsic::vector_reduce_fmul: + return true; + } +} + +Optional<unsigned> RISCVTTIImpl::getMaxVScale() const { + // There is no assumption of the maximum vector length in V specification. + // We use the value specified by users as the maximum vector length. + // This function will use the assumed maximum vector length to get the + // maximum vscale for LoopVectorizer. + // If users do not specify the maximum vector length, we have no way to + // know whether the LoopVectorizer is safe to do or not. + // We only consider to use single vector register (LMUL = 1) to vectorize. + unsigned MaxVectorSizeInBits = ST->getMaxRVVVectorSizeInBits(); + if (ST->hasStdExtV() && MaxVectorSizeInBits != 0) + return MaxVectorSizeInBits / RISCV::RVVBitsPerBlock; + return BaseT::getMaxVScale(); +} + +InstructionCost RISCVTTIImpl::getGatherScatterOpCost( + unsigned Opcode, Type *DataTy, const Value *Ptr, bool VariableMask, + Align Alignment, TTI::TargetCostKind CostKind, const Instruction *I) { + if (CostKind != TTI::TCK_RecipThroughput) + return BaseT::getGatherScatterOpCost(Opcode, DataTy, Ptr, VariableMask, + Alignment, CostKind, I); + + if ((Opcode == Instruction::Load && + !isLegalMaskedGather(DataTy, Align(Alignment))) || + (Opcode == Instruction::Store && + !isLegalMaskedScatter(DataTy, Align(Alignment)))) + return BaseT::getGatherScatterOpCost(Opcode, DataTy, Ptr, VariableMask, + Alignment, CostKind, I); + + // FIXME: Only supporting fixed vectors for now. + if (!isa<FixedVectorType>(DataTy)) + return BaseT::getGatherScatterOpCost(Opcode, DataTy, Ptr, VariableMask, + Alignment, CostKind, I); + + auto *VTy = cast<FixedVectorType>(DataTy); + unsigned NumLoads = VTy->getNumElements(); + InstructionCost MemOpCost = + getMemoryOpCost(Opcode, VTy->getElementType(), Alignment, 0, CostKind, I); + return NumLoads * MemOpCost; +} |