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author | Dimitry Andric <dim@FreeBSD.org> | 2023-12-25 17:35:41 +0000 |
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committer | Dimitry Andric <dim@FreeBSD.org> | 2024-04-06 20:13:06 +0000 |
commit | cb14a3fe5122c879eae1fb480ed7ce82a699ddb6 (patch) | |
tree | b983a613c35ece61d561b5a9ef9cd66419f6c7fb /contrib/llvm-project/llvm/lib/Target/X86/X86ISelLowering.cpp | |
parent | 3d68ee6cbdb244de9fab1df8a2525d2fa592571e (diff) | |
parent | 99aabd70801bd4bc72c4942747f6d62c675112f5 (diff) | |
download | src-cb14a3fe5122c879eae1fb480ed7ce82a699ddb6.tar.gz src-cb14a3fe5122c879eae1fb480ed7ce82a699ddb6.zip |
Diffstat (limited to 'contrib/llvm-project/llvm/lib/Target/X86/X86ISelLowering.cpp')
-rw-r--r-- | contrib/llvm-project/llvm/lib/Target/X86/X86ISelLowering.cpp | 36 |
1 files changed, 17 insertions, 19 deletions
diff --git a/contrib/llvm-project/llvm/lib/Target/X86/X86ISelLowering.cpp b/contrib/llvm-project/llvm/lib/Target/X86/X86ISelLowering.cpp index b80c766c7ffa..63bdf24d6b4f 100644 --- a/contrib/llvm-project/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/contrib/llvm-project/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -2674,34 +2674,33 @@ SDValue X86TargetLowering::getReturnAddressFrameIndex(SelectionDAG &DAG) const { return DAG.getFrameIndex(ReturnAddrIndex, getPointerTy(DAG.getDataLayout())); } -bool X86::isOffsetSuitableForCodeModel(int64_t Offset, CodeModel::Model M, - bool hasSymbolicDisplacement) { +bool X86::isOffsetSuitableForCodeModel(int64_t Offset, CodeModel::Model CM, + bool HasSymbolicDisplacement) { // Offset should fit into 32 bit immediate field. if (!isInt<32>(Offset)) return false; // If we don't have a symbolic displacement - we don't have any extra // restrictions. - if (!hasSymbolicDisplacement) + if (!HasSymbolicDisplacement) return true; - // FIXME: Some tweaks might be needed for medium code model. - if (M != CodeModel::Small && M != CodeModel::Kernel) - return false; - - // For small code model we assume that latest object is 16MB before end of 31 - // bits boundary. We may also accept pretty large negative constants knowing - // that all objects are in the positive half of address space. - if (M == CodeModel::Small && Offset < 16*1024*1024) + // We can fold large offsets in the large code model because we always use + // 64-bit offsets. + if (CM == CodeModel::Large) return true; // For kernel code model we know that all object resist in the negative half // of 32bits address space. We may not accept negative offsets, since they may // be just off and we may accept pretty large positive ones. - if (M == CodeModel::Kernel && Offset >= 0) - return true; + if (CM == CodeModel::Kernel) + return Offset >= 0; - return false; + // For other non-large code models we assume that latest small object is 16MB + // before end of 31 bits boundary. We may also accept pretty large negative + // constants knowing that all objects are in the positive half of address + // space. + return Offset < 16 * 1024 * 1024; } /// Return true if the condition is an signed comparison operation. @@ -4554,7 +4553,7 @@ static SDValue getShuffleVectorZeroOrUndef(SDValue V2, int Idx, return DAG.getVectorShuffle(VT, SDLoc(V2), V1, V2, MaskVec); } -static const ConstantPoolSDNode *getTargetConstantPoolFromBasePtr(SDValue Ptr) { +static ConstantPoolSDNode *getTargetConstantPoolFromBasePtr(SDValue Ptr) { if (Ptr.getOpcode() == X86ISD::Wrapper || Ptr.getOpcode() == X86ISD::WrapperRIP) Ptr = Ptr.getOperand(0); @@ -4562,7 +4561,7 @@ static const ConstantPoolSDNode *getTargetConstantPoolFromBasePtr(SDValue Ptr) { } static const Constant *getTargetConstantFromBasePtr(SDValue Ptr) { - const ConstantPoolSDNode *CNode = getTargetConstantPoolFromBasePtr(Ptr); + ConstantPoolSDNode *CNode = getTargetConstantPoolFromBasePtr(Ptr); if (!CNode || CNode->isMachineConstantPoolEntry() || CNode->getOffset() != 0) return nullptr; return CNode->getConstVal(); @@ -7563,8 +7562,7 @@ static SDValue LowerBUILD_VECTORvXi1(SDValue Op, SelectionDAG &DAG, } else DstVec = DAG.getUNDEF(VT); - for (unsigned i = 0, e = NonConstIdx.size(); i != e; ++i) { - unsigned InsertIdx = NonConstIdx[i]; + for (unsigned InsertIdx : NonConstIdx) { DstVec = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, VT, DstVec, Op.getOperand(InsertIdx), DAG.getIntPtrConstant(InsertIdx, dl)); @@ -40857,7 +40855,7 @@ bool X86TargetLowering::SimplifyDemandedVectorEltsForTargetShuffle( SDValue BC = peekThroughOneUseBitcasts(Mask); EVT BCVT = BC.getValueType(); auto *Load = dyn_cast<LoadSDNode>(BC); - if (!Load) + if (!Load || !Load->getBasePtr().hasOneUse()) return false; const Constant *C = getTargetConstantFromNode(Load); |