diff options
author | Dimitry Andric <dim@FreeBSD.org> | 2022-03-20 11:40:34 +0000 |
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committer | Dimitry Andric <dim@FreeBSD.org> | 2022-05-14 11:43:05 +0000 |
commit | 349cc55c9796c4596a5b9904cd3281af295f878f (patch) | |
tree | 410c5a785075730a35f1272ca6a7adf72222ad03 /contrib/llvm-project/llvm/utils/TableGen/CodeGenDAGPatterns.cpp | |
parent | cb2ae6163174b90e999326ecec3699ee093a5d43 (diff) | |
parent | c0981da47d5696fe36474fcf86b4ce03ae3ff818 (diff) |
Diffstat (limited to 'contrib/llvm-project/llvm/utils/TableGen/CodeGenDAGPatterns.cpp')
-rw-r--r-- | contrib/llvm-project/llvm/utils/TableGen/CodeGenDAGPatterns.cpp | 31 |
1 files changed, 22 insertions, 9 deletions
diff --git a/contrib/llvm-project/llvm/utils/TableGen/CodeGenDAGPatterns.cpp b/contrib/llvm-project/llvm/utils/TableGen/CodeGenDAGPatterns.cpp index c1a3a34d928b..4a247050ceeb 100644 --- a/contrib/llvm-project/llvm/utils/TableGen/CodeGenDAGPatterns.cpp +++ b/contrib/llvm-project/llvm/utils/TableGen/CodeGenDAGPatterns.cpp @@ -451,13 +451,16 @@ static Iter max_if(Iter B, Iter E, Pred P, Less L) { } /// Make sure that for each type in Small, there exists a larger type in Big. -bool TypeInfer::EnforceSmallerThan(TypeSetByHwMode &Small, - TypeSetByHwMode &Big) { +bool TypeInfer::EnforceSmallerThan(TypeSetByHwMode &Small, TypeSetByHwMode &Big, + bool SmallIsVT) { ValidateOnExit _1(Small, *this), _2(Big, *this); if (TP.hasError()) return false; bool Changed = false; + assert((!SmallIsVT || !Small.empty()) && + "Small should not be empty for SDTCisVTSmallerThanOp"); + if (Small.empty()) Changed |= EnforceAny(Small); if (Big.empty()) @@ -476,7 +479,9 @@ bool TypeInfer::EnforceSmallerThan(TypeSetByHwMode &Small, TypeSetByHwMode::SetType &S = Small.get(M); TypeSetByHwMode::SetType &B = Big.get(M); - if (any_of(S, isIntegerOrPtr) && any_of(S, isIntegerOrPtr)) { + assert((!SmallIsVT || !S.empty()) && "Expected non-empty type"); + + if (any_of(S, isIntegerOrPtr) && any_of(B, isIntegerOrPtr)) { auto NotInt = [](MVT VT) { return !isIntegerOrPtr(VT); }; Changed |= berase_if(S, NotInt); Changed |= berase_if(B, NotInt); @@ -484,6 +489,11 @@ bool TypeInfer::EnforceSmallerThan(TypeSetByHwMode &Small, auto NotFP = [](MVT VT) { return !isFloatingPoint(VT); }; Changed |= berase_if(S, NotFP); Changed |= berase_if(B, NotFP); + } else if (SmallIsVT && B.empty()) { + // B is empty and since S is a specific VT, it will never be empty. Don't + // report this as a change, just clear S and continue. This prevents an + // infinite loop. + S.clear(); } else if (S.empty() || B.empty()) { Changed = !S.empty() || !B.empty(); S.clear(); @@ -1612,20 +1622,22 @@ bool SDTypeConstraint::ApplyTypeConstraint(TreePatternNode *N, unsigned OResNo = 0; TreePatternNode *OtherNode = getOperandNum(x.SDTCisSameAs_Info.OtherOperandNum, N, NodeInfo, OResNo); - return NodeToApply->UpdateNodeType(ResNo, OtherNode->getExtType(OResNo),TP)| - OtherNode->UpdateNodeType(OResNo,NodeToApply->getExtType(ResNo),TP); + return (int)NodeToApply->UpdateNodeType(ResNo, + OtherNode->getExtType(OResNo), TP) | + (int)OtherNode->UpdateNodeType(OResNo, + NodeToApply->getExtType(ResNo), TP); } case SDTCisVTSmallerThanOp: { // The NodeToApply must be a leaf node that is a VT. OtherOperandNum must // have an integer type that is smaller than the VT. if (!NodeToApply->isLeaf() || !isa<DefInit>(NodeToApply->getLeafValue()) || - !static_cast<DefInit*>(NodeToApply->getLeafValue())->getDef() + !cast<DefInit>(NodeToApply->getLeafValue())->getDef() ->isSubClassOf("ValueType")) { TP.error(N->getOperator()->getName() + " expects a VT operand!"); return false; } - DefInit *DI = static_cast<DefInit*>(NodeToApply->getLeafValue()); + DefInit *DI = cast<DefInit>(NodeToApply->getLeafValue()); const CodeGenTarget &T = TP.getDAGPatterns().getTargetInfo(); auto VVT = getValueTypeByHwMode(DI->getDef(), T.getHwModes()); TypeSetByHwMode TypeListTmp(VVT); @@ -1635,7 +1647,8 @@ bool SDTypeConstraint::ApplyTypeConstraint(TreePatternNode *N, getOperandNum(x.SDTCisVTSmallerThanOp_Info.OtherOperandNum, N, NodeInfo, OResNo); - return TI.EnforceSmallerThan(TypeListTmp, OtherNode->getExtType(OResNo)); + return TI.EnforceSmallerThan(TypeListTmp, OtherNode->getExtType(OResNo), + /*SmallIsVT*/ true); } case SDTCisOpSmallerThanOp: { unsigned BResNo = 0; @@ -3819,7 +3832,7 @@ void CodeGenDAGPatterns::parseInstructionPattern( InstInputs.erase(OpName); // It occurred, remove from map. if (InVal->isLeaf() && isa<DefInit>(InVal->getLeafValue())) { - Record *InRec = static_cast<DefInit*>(InVal->getLeafValue())->getDef(); + Record *InRec = cast<DefInit>(InVal->getLeafValue())->getDef(); if (!checkOperandClass(Op, InRec)) I.error("Operand $" + OpName + "'s register class disagrees" " between the operand and pattern"); |