diff options
| author | Dimitry Andric <dim@FreeBSD.org> | 2017-12-18 20:10:56 +0000 |
|---|---|---|
| committer | Dimitry Andric <dim@FreeBSD.org> | 2017-12-18 20:10:56 +0000 |
| commit | 044eb2f6afba375a914ac9d8024f8f5142bb912e (patch) | |
| tree | 1475247dc9f9fe5be155ebd4c9069c75aadf8c20 /lib/MC/MCSubtargetInfo.cpp | |
| parent | eb70dddbd77e120e5d490bd8fbe7ff3f8fa81c6b (diff) | |
Notes
Diffstat (limited to 'lib/MC/MCSubtargetInfo.cpp')
| -rw-r--r-- | lib/MC/MCSubtargetInfo.cpp | 14 |
1 files changed, 13 insertions, 1 deletions
diff --git a/lib/MC/MCSubtargetInfo.cpp b/lib/MC/MCSubtargetInfo.cpp index 385cdcc62320..8b9b076382e2 100644 --- a/lib/MC/MCSubtargetInfo.cpp +++ b/lib/MC/MCSubtargetInfo.cpp @@ -75,6 +75,18 @@ FeatureBitset MCSubtargetInfo::ApplyFeatureFlag(StringRef FS) { return FeatureBits; } +bool MCSubtargetInfo::checkFeatures(StringRef FS) const { + SubtargetFeatures T(FS); + FeatureBitset Set, All; + for (std::string F : T.getFeatures()) { + SubtargetFeatures::ApplyFeatureFlag(Set, F, ProcFeatures); + if (F[0] == '-') + F[0] = '+'; + SubtargetFeatures::ApplyFeatureFlag(All, F, ProcFeatures); + } + return (FeatureBits & All) == Set; +} + const MCSchedModel &MCSubtargetInfo::getSchedModelForCPU(StringRef CPU) const { assert(ProcSchedModels && "Processor machine model not available!"); @@ -102,7 +114,7 @@ const MCSchedModel &MCSubtargetInfo::getSchedModelForCPU(StringRef CPU) const { InstrItineraryData MCSubtargetInfo::getInstrItineraryForCPU(StringRef CPU) const { - const MCSchedModel SchedModel = getSchedModelForCPU(CPU); + const MCSchedModel &SchedModel = getSchedModelForCPU(CPU); return InstrItineraryData(SchedModel, Stages, OperandCycles, ForwardingPaths); } |