aboutsummaryrefslogtreecommitdiff
path: root/lib/Target/ARM/Thumb1InstrInfo.cpp
diff options
context:
space:
mode:
authorRoman Divacky <rdivacky@FreeBSD.org>2009-12-15 18:09:07 +0000
committerRoman Divacky <rdivacky@FreeBSD.org>2009-12-15 18:09:07 +0000
commit571945e6affd20b19264ec22495da418d0fbdbb4 (patch)
tree076117cdf3579003f07cad4cdf0593347ce58150 /lib/Target/ARM/Thumb1InstrInfo.cpp
parent06f9d4012fb8acea3e9861d5722b5965dbb724d9 (diff)
Notes
Diffstat (limited to 'lib/Target/ARM/Thumb1InstrInfo.cpp')
-rw-r--r--lib/Target/ARM/Thumb1InstrInfo.cpp19
1 files changed, 0 insertions, 19 deletions
diff --git a/lib/Target/ARM/Thumb1InstrInfo.cpp b/lib/Target/ARM/Thumb1InstrInfo.cpp
index 7602b6ded060..66d3b83cdc2a 100644
--- a/lib/Target/ARM/Thumb1InstrInfo.cpp
+++ b/lib/Target/ARM/Thumb1InstrInfo.cpp
@@ -32,25 +32,6 @@ unsigned Thumb1InstrInfo::getUnindexedOpcode(unsigned Opc) const {
return 0;
}
-bool
-Thumb1InstrInfo::BlockHasNoFallThrough(const MachineBasicBlock &MBB) const {
- if (MBB.empty()) return false;
-
- switch (MBB.back().getOpcode()) {
- case ARM::tBX_RET:
- case ARM::tBX_RET_vararg:
- case ARM::tPOP_RET:
- case ARM::tB:
- case ARM::tBRIND:
- case ARM::tBR_JTr:
- return true;
- default:
- break;
- }
-
- return false;
-}
-
bool Thumb1InstrInfo::copyRegToReg(MachineBasicBlock &MBB,
MachineBasicBlock::iterator I,
unsigned DestReg, unsigned SrcReg,