diff options
| author | Dimitry Andric <dim@FreeBSD.org> | 2018-11-04 14:41:47 +0000 |
|---|---|---|
| committer | Dimitry Andric <dim@FreeBSD.org> | 2018-11-04 14:41:47 +0000 |
| commit | 86392292ee722abb03af4befe2d2c8baaeadaf22 (patch) | |
| tree | b33cb35c56c65b9d9ad8db8bc49159a4246f138a /lib/Target/X86/X86ISelLowering.cpp | |
| parent | 36272db3cad448211389168cced4baac39a1a0d1 (diff) | |
Notes
Diffstat (limited to 'lib/Target/X86/X86ISelLowering.cpp')
| -rw-r--r-- | lib/Target/X86/X86ISelLowering.cpp | 7 |
1 files changed, 3 insertions, 4 deletions
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index 2820004cfc6d..67a127fe0a2b 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -23312,15 +23312,14 @@ static SDValue LowerScalarVariableShift(SDValue Op, SelectionDAG &DAG, } // Check cases (mainly 32-bit) where i64 is expanded into high and low parts. - if (VT == MVT::v2i64 && Amt.getOpcode() == ISD::BITCAST && + if (VT == MVT::v2i64 && Amt.getOpcode() == ISD::BITCAST && Amt.getOperand(0).getOpcode() == ISD::BUILD_VECTOR) { Amt = Amt.getOperand(0); - unsigned Ratio = Amt.getSimpleValueType().getVectorNumElements() / - VT.getVectorNumElements(); + unsigned Ratio = 64 / Amt.getScalarValueSizeInBits(); std::vector<SDValue> Vals(Ratio); for (unsigned i = 0; i != Ratio; ++i) Vals[i] = Amt.getOperand(i); - for (unsigned i = Ratio; i != Amt.getNumOperands(); i += Ratio) { + for (unsigned i = Ratio, e = Amt.getNumOperands(); i != e; i += Ratio) { for (unsigned j = 0; j != Ratio; ++j) if (Vals[j] != Amt.getOperand(i + j)) return SDValue(); |
