diff options
author | Dimitry Andric <dim@FreeBSD.org> | 2021-11-19 20:06:13 +0000 |
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committer | Dimitry Andric <dim@FreeBSD.org> | 2021-11-19 20:06:13 +0000 |
commit | c0981da47d5696fe36474fcf86b4ce03ae3ff818 (patch) | |
tree | f42add1021b9f2ac6a69ac7cf6c4499962739a45 /llvm/lib/CodeGen/MachinePipeliner.cpp | |
parent | 344a3780b2e33f6ca763666c380202b18aab72a3 (diff) |
Diffstat (limited to 'llvm/lib/CodeGen/MachinePipeliner.cpp')
-rw-r--r-- | llvm/lib/CodeGen/MachinePipeliner.cpp | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/llvm/lib/CodeGen/MachinePipeliner.cpp b/llvm/lib/CodeGen/MachinePipeliner.cpp index caa3f8049aeb..e18318386def 100644 --- a/llvm/lib/CodeGen/MachinePipeliner.cpp +++ b/llvm/lib/CodeGen/MachinePipeliner.cpp @@ -200,8 +200,7 @@ bool MachinePipeliner::runOnMachineFunction(MachineFunction &mf) { if (!EnableSWP) return false; - if (mf.getFunction().getAttributes().hasAttribute( - AttributeList::FunctionIndex, Attribute::OptimizeForSize) && + if (mf.getFunction().getAttributes().hasFnAttr(Attribute::OptimizeForSize) && !EnableSWPOptSize.getPosition()) return false; @@ -386,7 +385,7 @@ void MachinePipeliner::preprocessPhiNodes(MachineBasicBlock &B) { MachineRegisterInfo &MRI = MF->getRegInfo(); SlotIndexes &Slots = *getAnalysis<LiveIntervals>().getSlotIndexes(); - for (MachineInstr &PI : make_range(B.begin(), B.getFirstNonPHI())) { + for (MachineInstr &PI : B.phis()) { MachineOperand &DefOp = PI.getOperand(0); assert(DefOp.getSubReg() == 0); auto *RC = MRI.getRegClass(DefOp.getReg()); |