diff options
| author | Dimitry Andric <dim@FreeBSD.org> | 2023-07-26 19:03:47 +0000 |
|---|---|---|
| committer | Dimitry Andric <dim@FreeBSD.org> | 2023-07-26 19:04:23 +0000 |
| commit | 7fa27ce4a07f19b07799a767fc29416f3b625afb (patch) | |
| tree | 27825c83636c4de341eb09a74f49f5d38a15d165 /llvm/lib/CodeGen/ReachingDefAnalysis.cpp | |
| parent | e3b557809604d036af6e00c60f012c2025b59a5e (diff) | |
Diffstat (limited to 'llvm/lib/CodeGen/ReachingDefAnalysis.cpp')
| -rw-r--r-- | llvm/lib/CodeGen/ReachingDefAnalysis.cpp | 25 |
1 files changed, 12 insertions, 13 deletions
diff --git a/llvm/lib/CodeGen/ReachingDefAnalysis.cpp b/llvm/lib/CodeGen/ReachingDefAnalysis.cpp index d9ced9191fae..75fbc8ba35b1 100644 --- a/llvm/lib/CodeGen/ReachingDefAnalysis.cpp +++ b/llvm/lib/CodeGen/ReachingDefAnalysis.cpp @@ -65,13 +65,13 @@ void ReachingDefAnalysis::enterBasicBlock(MachineBasicBlock *MBB) { // This is the entry block. if (MBB->pred_empty()) { for (const auto &LI : MBB->liveins()) { - for (MCRegUnitIterator Unit(LI.PhysReg, TRI); Unit.isValid(); ++Unit) { + for (MCRegUnit Unit : TRI->regunits(LI.PhysReg)) { // Treat function live-ins as if they were defined just before the first // instruction. Usually, function arguments are set up immediately // before the call. - if (LiveRegs[*Unit] != -1) { - LiveRegs[*Unit] = -1; - MBBReachingDefs[MBBNumber][*Unit].push_back(-1); + if (LiveRegs[Unit] != -1) { + LiveRegs[Unit] = -1; + MBBReachingDefs[MBBNumber][Unit].push_back(-1); } } } @@ -128,16 +128,15 @@ void ReachingDefAnalysis::processDefs(MachineInstr *MI) { for (auto &MO : MI->operands()) { if (!isValidRegDef(MO)) continue; - for (MCRegUnitIterator Unit(MO.getReg().asMCReg(), TRI); Unit.isValid(); - ++Unit) { + for (MCRegUnit Unit : TRI->regunits(MO.getReg().asMCReg())) { // This instruction explicitly defines the current reg unit. - LLVM_DEBUG(dbgs() << printRegUnit(*Unit, TRI) << ":\t" << CurInstr - << '\t' << *MI); + LLVM_DEBUG(dbgs() << printRegUnit(Unit, TRI) << ":\t" << CurInstr << '\t' + << *MI); // How many instructions since this reg unit was last written? - if (LiveRegs[*Unit] != CurInstr) { - LiveRegs[*Unit] = CurInstr; - MBBReachingDefs[MBBNumber][*Unit].push_back(CurInstr); + if (LiveRegs[Unit] != CurInstr) { + LiveRegs[Unit] = CurInstr; + MBBReachingDefs[MBBNumber][Unit].push_back(CurInstr); } } } @@ -269,8 +268,8 @@ int ReachingDefAnalysis::getReachingDef(MachineInstr *MI, assert(MBBNumber < MBBReachingDefs.size() && "Unexpected basic block number."); int LatestDef = ReachingDefDefaultVal; - for (MCRegUnitIterator Unit(PhysReg, TRI); Unit.isValid(); ++Unit) { - for (int Def : MBBReachingDefs[MBBNumber][*Unit]) { + for (MCRegUnit Unit : TRI->regunits(PhysReg)) { + for (int Def : MBBReachingDefs[MBBNumber][Unit]) { if (Def >= InstId) break; DefRes = Def; |
