diff options
| author | Dimitry Andric <dim@FreeBSD.org> | 2022-07-03 14:10:23 +0000 |
|---|---|---|
| committer | Dimitry Andric <dim@FreeBSD.org> | 2022-07-03 14:10:23 +0000 |
| commit | 145449b1e420787bb99721a429341fa6be3adfb6 (patch) | |
| tree | 1d56ae694a6de602e348dd80165cf881a36600ed /llvm/lib/Target/Mips/MipsTargetMachine.cpp | |
| parent | ecbca9f5fb7d7613d2b94982c4825eb0d33d6842 (diff) | |
Diffstat (limited to 'llvm/lib/Target/Mips/MipsTargetMachine.cpp')
| -rw-r--r-- | llvm/lib/Target/Mips/MipsTargetMachine.cpp | 15 |
1 files changed, 12 insertions, 3 deletions
diff --git a/llvm/lib/Target/Mips/MipsTargetMachine.cpp b/llvm/lib/Target/Mips/MipsTargetMachine.cpp index f9f662a00117..fb0aa397d393 100644 --- a/llvm/lib/Target/Mips/MipsTargetMachine.cpp +++ b/llvm/lib/Target/Mips/MipsTargetMachine.cpp @@ -18,12 +18,14 @@ #include "MipsSEISelDAGToDAG.h" #include "MipsSubtarget.h" #include "MipsTargetObjectFile.h" +#include "MipsTargetTransformInfo.h" #include "TargetInfo/MipsTargetInfo.h" #include "llvm/ADT/Optional.h" #include "llvm/ADT/STLExtras.h" #include "llvm/ADT/StringRef.h" #include "llvm/Analysis/TargetTransformInfo.h" #include "llvm/CodeGen/BasicTTIImpl.h" +#include "llvm/CodeGen/GlobalISel/CSEInfo.h" #include "llvm/CodeGen/GlobalISel/IRTranslator.h" #include "llvm/CodeGen/GlobalISel/InstructionSelect.h" #include "llvm/CodeGen/GlobalISel/Legalizer.h" @@ -62,6 +64,7 @@ extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeMipsTarget() { initializeMipsBranchExpansionPass(*PR); initializeMicroMipsSizeReducePass(*PR); initializeMipsPreLegalizerCombinerPass(*PR); + initializeMipsPostLegalizerCombinerPass(*PR); initializeMipsMulMulBugFixPass(*PR); } @@ -103,7 +106,7 @@ static std::string computeDataLayout(const Triple &TT, StringRef CPU, static Reloc::Model getEffectiveRelocModel(bool JIT, Optional<Reloc::Model> RM) { - if (!RM.hasValue() || JIT) + if (!RM || JIT) return Reloc::Static; return *RM; } @@ -238,6 +241,7 @@ public: bool addIRTranslator() override; void addPreLegalizeMachineIR() override; bool addLegalizeMachineIR() override; + void addPreRegBankSelect() override; bool addRegBankSelect() override; bool addGlobalInstructionSelect() override; @@ -276,7 +280,7 @@ void MipsPassConfig::addPreRegAlloc() { } TargetTransformInfo -MipsTargetMachine::getTargetTransformInfo(const Function &F) { +MipsTargetMachine::getTargetTransformInfo(const Function &F) const { if (Subtarget->allowMixed16_32()) { LLVM_DEBUG(errs() << "No Target Transform Info Pass Added\n"); // FIXME: This is no longer necessary as the TTI returned is per-function. @@ -284,7 +288,7 @@ MipsTargetMachine::getTargetTransformInfo(const Function &F) { } LLVM_DEBUG(errs() << "Target Transform Info Pass Added\n"); - return TargetTransformInfo(BasicTTIImpl(this, F)); + return TargetTransformInfo(MipsTTIImpl(this, F)); } // Implemented by targets that want to run passes immediately before @@ -333,6 +337,11 @@ bool MipsPassConfig::addLegalizeMachineIR() { return false; } +void MipsPassConfig::addPreRegBankSelect() { + bool IsOptNone = getOptLevel() == CodeGenOpt::None; + addPass(createMipsPostLegalizeCombiner(IsOptNone)); +} + bool MipsPassConfig::addRegBankSelect() { addPass(new RegBankSelect()); return false; |
