diff options
| author | Dimitry Andric <dim@FreeBSD.org> | 2023-02-11 12:38:04 +0000 |
|---|---|---|
| committer | Dimitry Andric <dim@FreeBSD.org> | 2023-02-11 12:38:11 +0000 |
| commit | e3b557809604d036af6e00c60f012c2025b59a5e (patch) | |
| tree | 8a11ba2269a3b669601e2fd41145b174008f4da8 /llvm/lib/Target/PowerPC/PPCReduceCRLogicals.cpp | |
| parent | 08e8dd7b9db7bb4a9de26d44c1cbfd24e869c014 (diff) | |
Diffstat (limited to 'llvm/lib/Target/PowerPC/PPCReduceCRLogicals.cpp')
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCReduceCRLogicals.cpp | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCReduceCRLogicals.cpp b/llvm/lib/Target/PowerPC/PPCReduceCRLogicals.cpp index 5cee00c61fc1..0504db239f67 100644 --- a/llvm/lib/Target/PowerPC/PPCReduceCRLogicals.cpp +++ b/llvm/lib/Target/PowerPC/PPCReduceCRLogicals.cpp @@ -390,9 +390,10 @@ private: static bool isCRLogical(MachineInstr &MI) { unsigned Opc = MI.getOpcode(); return Opc == PPC::CRAND || Opc == PPC::CRNAND || Opc == PPC::CROR || - Opc == PPC::CRXOR || Opc == PPC::CRNOR || Opc == PPC::CREQV || - Opc == PPC::CRANDC || Opc == PPC::CRORC || Opc == PPC::CRSET || - Opc == PPC::CRUNSET || Opc == PPC::CR6SET || Opc == PPC::CR6UNSET; + Opc == PPC::CRXOR || Opc == PPC::CRNOR || Opc == PPC::CRNOT || + Opc == PPC::CREQV || Opc == PPC::CRANDC || Opc == PPC::CRORC || + Opc == PPC::CRSET || Opc == PPC::CRUNSET || Opc == PPC::CR6SET || + Opc == PPC::CR6UNSET; } bool simplifyCode() { bool Changed = false; @@ -544,7 +545,7 @@ MachineInstr *PPCReduceCRLogicals::lookThroughCRCopy(unsigned Reg, return Copy; Register CopySrc = Copy->getOperand(1).getReg(); Subreg = Copy->getOperand(1).getSubReg(); - if (!Register::isVirtualRegister(CopySrc)) { + if (!CopySrc.isVirtual()) { const TargetRegisterInfo *TRI = &TII->getRegisterInfo(); // Set the Subreg if (CopySrc == PPC::CR0EQ || CopySrc == PPC::CR6EQ) |