diff options
| author | Dimitry Andric <dim@FreeBSD.org> | 2023-02-11 12:38:04 +0000 |
|---|---|---|
| committer | Dimitry Andric <dim@FreeBSD.org> | 2023-02-11 12:38:11 +0000 |
| commit | e3b557809604d036af6e00c60f012c2025b59a5e (patch) | |
| tree | 8a11ba2269a3b669601e2fd41145b174008f4da8 /llvm/lib/Target/RISCV/RISCVMachineFunctionInfo.cpp | |
| parent | 08e8dd7b9db7bb4a9de26d44c1cbfd24e869c014 (diff) | |
Diffstat (limited to 'llvm/lib/Target/RISCV/RISCVMachineFunctionInfo.cpp')
| -rw-r--r-- | llvm/lib/Target/RISCV/RISCVMachineFunctionInfo.cpp | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/llvm/lib/Target/RISCV/RISCVMachineFunctionInfo.cpp b/llvm/lib/Target/RISCV/RISCVMachineFunctionInfo.cpp index 8cb046bcfbb6..d79c4d4a0290 100644 --- a/llvm/lib/Target/RISCV/RISCVMachineFunctionInfo.cpp +++ b/llvm/lib/Target/RISCV/RISCVMachineFunctionInfo.cpp @@ -35,3 +35,11 @@ void RISCVMachineFunctionInfo::initializeBaseYamlFields( VarArgsFrameIndex = YamlMFI.VarArgsFrameIndex; VarArgsSaveSize = YamlMFI.VarArgsSaveSize; } + +void RISCVMachineFunctionInfo::addSExt32Register(Register Reg) { + SExt32Registers.push_back(Reg); +} + +bool RISCVMachineFunctionInfo::isSExt32Register(Register Reg) const { + return is_contained(SExt32Registers, Reg); +} |