vendor/llvm-project/llvmorg-16-init-18548-gb0daacf58f41

1 files changed, 12 insertions, 5 deletions

diff --git a/llvm/lib/Target/Sparc/SparcISelDAGToDAG.cpp b/llvm/lib/Target/Sparc/SparcISelDAGToDAG.cpp
index c5d0f1de7dfd..8339f5c42908 100644
--- a/llvm/lib/Target/Sparc/SparcISelDAGToDAG.cpp
+++ b/llvm/lib/Target/Sparc/SparcISelDAGToDAG.cpp
@@ -19,6 +19,9 @@
 #include "llvm/Support/raw_ostream.h"
 using namespace llvm;
 
+#define DEBUG_TYPE "sparc-isel"
+#define PASS_NAME "SPARC DAG->DAG Pattern Instruction Selection"
+
 //===----------------------------------------------------------------------===//
 // Instruction Selector Implementation
 //===----------------------------------------------------------------------===//
@@ -33,7 +36,11 @@ class SparcDAGToDAGISel : public SelectionDAGISel {
   /// make the right decision when generating code for different targets.
   const SparcSubtarget *Subtarget = nullptr;
 public:
-  explicit SparcDAGToDAGISel(SparcTargetMachine &tm) : SelectionDAGISel(tm) {}
+  static char ID;
+
+  SparcDAGToDAGISel() = delete;
+
+  explicit SparcDAGToDAGISel(SparcTargetMachine &tm) : SelectionDAGISel(ID, tm) {}
 
   bool runOnMachineFunction(MachineFunction &MF) override {
     Subtarget = &MF.getSubtarget<SparcSubtarget>();
@@ -52,10 +59,6 @@ public:
                                     unsigned ConstraintID,
                                     std::vector<SDValue> &OutOps) override;
 
-  StringRef getPassName() const override {
-    return "SPARC DAG->DAG Pattern Instruction Selection";
-  }
-
   // Include the pieces autogenerated from the target description.
 #include "SparcGenDAGISel.inc"
 
@@ -65,6 +68,10 @@ private:
 };
 }  // end anonymous namespace
 
+char SparcDAGToDAGISel::ID = 0;
+
+INITIALIZE_PASS(SparcDAGToDAGISel, DEBUG_TYPE, PASS_NAME, false, false)
+
 SDNode* SparcDAGToDAGISel::getGlobalBaseReg() {
   Register GlobalBaseReg = Subtarget->getInstrInfo()->getGlobalBaseReg(MF);
   return CurDAG->getRegister(GlobalBaseReg,