diff options
| author | Dimitry Andric <dim@FreeBSD.org> | 2023-02-11 12:38:04 +0000 |
|---|---|---|
| committer | Dimitry Andric <dim@FreeBSD.org> | 2023-02-11 12:38:11 +0000 |
| commit | e3b557809604d036af6e00c60f012c2025b59a5e (patch) | |
| tree | 8a11ba2269a3b669601e2fd41145b174008f4da8 /llvm/lib/Target/Sparc/SparcTargetMachine.h | |
| parent | 08e8dd7b9db7bb4a9de26d44c1cbfd24e869c014 (diff) | |
Diffstat (limited to 'llvm/lib/Target/Sparc/SparcTargetMachine.h')
| -rw-r--r-- | llvm/lib/Target/Sparc/SparcTargetMachine.h | 28 |
1 files changed, 20 insertions, 8 deletions
diff --git a/llvm/lib/Target/Sparc/SparcTargetMachine.h b/llvm/lib/Target/Sparc/SparcTargetMachine.h index 4083f61433b1..6e3c8e7df43f 100644 --- a/llvm/lib/Target/Sparc/SparcTargetMachine.h +++ b/llvm/lib/Target/Sparc/SparcTargetMachine.h @@ -16,6 +16,7 @@ #include "SparcInstrInfo.h" #include "SparcSubtarget.h" #include "llvm/Target/TargetMachine.h" +#include <optional> namespace llvm { @@ -24,11 +25,13 @@ class SparcTargetMachine : public LLVMTargetMachine { SparcSubtarget Subtarget; bool is64Bit; mutable StringMap<std::unique_ptr<SparcSubtarget>> SubtargetMap; + public: SparcTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, - Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, - CodeGenOpt::Level OL, bool JIT, bool is64bit); + std::optional<Reloc::Model> RM, + std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL, + bool JIT, bool is64bit); ~SparcTargetMachine() override; const SparcSubtarget *getSubtargetImpl() const { return &Subtarget; } @@ -39,28 +42,36 @@ public: TargetLoweringObjectFile *getObjFileLowering() const override { return TLOF.get(); } + + MachineFunctionInfo * + createMachineFunctionInfo(BumpPtrAllocator &Allocator, const Function &F, + const TargetSubtargetInfo *STI) const override; }; /// Sparc 32-bit target machine /// class SparcV8TargetMachine : public SparcTargetMachine { virtual void anchor(); + public: SparcV8TargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, - Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, - CodeGenOpt::Level OL, bool JIT); + std::optional<Reloc::Model> RM, + std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL, + bool JIT); }; /// Sparc 64-bit target machine /// class SparcV9TargetMachine : public SparcTargetMachine { virtual void anchor(); + public: SparcV9TargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, - Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, - CodeGenOpt::Level OL, bool JIT); + std::optional<Reloc::Model> RM, + std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL, + bool JIT); }; class SparcelTargetMachine : public SparcTargetMachine { @@ -69,8 +80,9 @@ class SparcelTargetMachine : public SparcTargetMachine { public: SparcelTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, - Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, - CodeGenOpt::Level OL, bool JIT); + std::optional<Reloc::Model> RM, + std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL, + bool JIT); }; } // end namespace llvm |