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authorDimitry Andric <dim@FreeBSD.org>2022-07-03 14:10:23 +0000
committerDimitry Andric <dim@FreeBSD.org>2022-07-03 14:10:23 +0000
commit145449b1e420787bb99721a429341fa6be3adfb6 (patch)
tree1d56ae694a6de602e348dd80165cf881a36600ed /llvm/lib/Target/XCore/Disassembler/XCoreDisassembler.cpp
parentecbca9f5fb7d7613d2b94982c4825eb0d33d6842 (diff)
Diffstat (limited to 'llvm/lib/Target/XCore/Disassembler/XCoreDisassembler.cpp')
-rw-r--r--llvm/lib/Target/XCore/Disassembler/XCoreDisassembler.cpp286
1 files changed, 131 insertions, 155 deletions
diff --git a/llvm/lib/Target/XCore/Disassembler/XCoreDisassembler.cpp b/llvm/lib/Target/XCore/Disassembler/XCoreDisassembler.cpp
index f6b97e9e84b3..57801752f170 100644
--- a/llvm/lib/Target/XCore/Disassembler/XCoreDisassembler.cpp
+++ b/llvm/lib/Target/XCore/Disassembler/XCoreDisassembler.cpp
@@ -15,8 +15,8 @@
#include "XCore.h"
#include "XCoreRegisterInfo.h"
#include "llvm/MC/MCContext.h"
+#include "llvm/MC/MCDecoderOps.h"
#include "llvm/MC/MCDisassembler/MCDisassembler.h"
-#include "llvm/MC/MCFixedLenDisassembler.h"
#include "llvm/MC/MCInst.h"
#include "llvm/MC/MCSubtargetInfo.h"
#include "llvm/MC/TargetRegistry.h"
@@ -66,140 +66,116 @@ static bool readInstruction32(ArrayRef<uint8_t> Bytes, uint64_t Address,
return true;
}
-static unsigned getReg(const void *D, unsigned RC, unsigned RegNo) {
- const XCoreDisassembler *Dis = static_cast<const XCoreDisassembler*>(D);
- const MCRegisterInfo *RegInfo = Dis->getContext().getRegisterInfo();
+static unsigned getReg(const MCDisassembler *D, unsigned RC, unsigned RegNo) {
+ const MCRegisterInfo *RegInfo = D->getContext().getRegisterInfo();
return *(RegInfo->getRegClass(RC).begin() + RegNo);
}
-static DecodeStatus DecodeGRRegsRegisterClass(MCInst &Inst,
- unsigned RegNo,
+static DecodeStatus DecodeGRRegsRegisterClass(MCInst &Inst, unsigned RegNo,
uint64_t Address,
- const void *Decoder);
+ const MCDisassembler *Decoder);
-static DecodeStatus DecodeRRegsRegisterClass(MCInst &Inst,
- unsigned RegNo,
+static DecodeStatus DecodeRRegsRegisterClass(MCInst &Inst, unsigned RegNo,
uint64_t Address,
- const void *Decoder);
+ const MCDisassembler *Decoder);
static DecodeStatus DecodeBitpOperand(MCInst &Inst, unsigned Val,
- uint64_t Address, const void *Decoder);
+ uint64_t Address,
+ const MCDisassembler *Decoder);
static DecodeStatus DecodeNegImmOperand(MCInst &Inst, unsigned Val,
- uint64_t Address, const void *Decoder);
+ uint64_t Address,
+ const MCDisassembler *Decoder);
-static DecodeStatus Decode2RInstruction(MCInst &Inst,
- unsigned Insn,
+static DecodeStatus Decode2RInstruction(MCInst &Inst, unsigned Insn,
uint64_t Address,
- const void *Decoder);
+ const MCDisassembler *Decoder);
-static DecodeStatus Decode2RImmInstruction(MCInst &Inst,
- unsigned Insn,
+static DecodeStatus Decode2RImmInstruction(MCInst &Inst, unsigned Insn,
uint64_t Address,
- const void *Decoder);
+ const MCDisassembler *Decoder);
-static DecodeStatus DecodeR2RInstruction(MCInst &Inst,
- unsigned Insn,
+static DecodeStatus DecodeR2RInstruction(MCInst &Inst, unsigned Insn,
uint64_t Address,
- const void *Decoder);
+ const MCDisassembler *Decoder);
-static DecodeStatus Decode2RSrcDstInstruction(MCInst &Inst,
- unsigned Insn,
+static DecodeStatus Decode2RSrcDstInstruction(MCInst &Inst, unsigned Insn,
uint64_t Address,
- const void *Decoder);
+ const MCDisassembler *Decoder);
-static DecodeStatus DecodeRUSInstruction(MCInst &Inst,
- unsigned Insn,
+static DecodeStatus DecodeRUSInstruction(MCInst &Inst, unsigned Insn,
uint64_t Address,
- const void *Decoder);
+ const MCDisassembler *Decoder);
-static DecodeStatus DecodeRUSBitpInstruction(MCInst &Inst,
- unsigned Insn,
+static DecodeStatus DecodeRUSBitpInstruction(MCInst &Inst, unsigned Insn,
uint64_t Address,
- const void *Decoder);
+ const MCDisassembler *Decoder);
-static DecodeStatus DecodeRUSSrcDstBitpInstruction(MCInst &Inst,
- unsigned Insn,
- uint64_t Address,
- const void *Decoder);
+static DecodeStatus
+DecodeRUSSrcDstBitpInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
+ const MCDisassembler *Decoder);
-static DecodeStatus DecodeL2RInstruction(MCInst &Inst,
- unsigned Insn,
+static DecodeStatus DecodeL2RInstruction(MCInst &Inst, unsigned Insn,
uint64_t Address,
- const void *Decoder);
+ const MCDisassembler *Decoder);
-static DecodeStatus DecodeLR2RInstruction(MCInst &Inst,
- unsigned Insn,
+static DecodeStatus DecodeLR2RInstruction(MCInst &Inst, unsigned Insn,
uint64_t Address,
- const void *Decoder);
+ const MCDisassembler *Decoder);
-static DecodeStatus Decode3RInstruction(MCInst &Inst,
- unsigned Insn,
+static DecodeStatus Decode3RInstruction(MCInst &Inst, unsigned Insn,
uint64_t Address,
- const void *Decoder);
+ const MCDisassembler *Decoder);
-static DecodeStatus Decode3RImmInstruction(MCInst &Inst,
- unsigned Insn,
+static DecodeStatus Decode3RImmInstruction(MCInst &Inst, unsigned Insn,
uint64_t Address,
- const void *Decoder);
+ const MCDisassembler *Decoder);
-static DecodeStatus Decode2RUSInstruction(MCInst &Inst,
- unsigned Insn,
+static DecodeStatus Decode2RUSInstruction(MCInst &Inst, unsigned Insn,
uint64_t Address,
- const void *Decoder);
+ const MCDisassembler *Decoder);
-static DecodeStatus Decode2RUSBitpInstruction(MCInst &Inst,
- unsigned Insn,
+static DecodeStatus Decode2RUSBitpInstruction(MCInst &Inst, unsigned Insn,
uint64_t Address,
- const void *Decoder);
+ const MCDisassembler *Decoder);
-static DecodeStatus DecodeL3RInstruction(MCInst &Inst,
- unsigned Insn,
+static DecodeStatus DecodeL3RInstruction(MCInst &Inst, unsigned Insn,
uint64_t Address,
- const void *Decoder);
+ const MCDisassembler *Decoder);
-static DecodeStatus DecodeL3RSrcDstInstruction(MCInst &Inst,
- unsigned Insn,
+static DecodeStatus DecodeL3RSrcDstInstruction(MCInst &Inst, unsigned Insn,
uint64_t Address,
- const void *Decoder);
+ const MCDisassembler *Decoder);
-static DecodeStatus DecodeL2RUSInstruction(MCInst &Inst,
- unsigned Insn,
+static DecodeStatus DecodeL2RUSInstruction(MCInst &Inst, unsigned Insn,
uint64_t Address,
- const void *Decoder);
+ const MCDisassembler *Decoder);
-static DecodeStatus DecodeL2RUSBitpInstruction(MCInst &Inst,
- unsigned Insn,
+static DecodeStatus DecodeL2RUSBitpInstruction(MCInst &Inst, unsigned Insn,
uint64_t Address,
- const void *Decoder);
+ const MCDisassembler *Decoder);
-static DecodeStatus DecodeL6RInstruction(MCInst &Inst,
- unsigned Insn,
+static DecodeStatus DecodeL6RInstruction(MCInst &Inst, unsigned Insn,
uint64_t Address,
- const void *Decoder);
+ const MCDisassembler *Decoder);
-static DecodeStatus DecodeL5RInstruction(MCInst &Inst,
- unsigned Insn,
+static DecodeStatus DecodeL5RInstruction(MCInst &Inst, unsigned Insn,
uint64_t Address,
- const void *Decoder);
+ const MCDisassembler *Decoder);
-static DecodeStatus DecodeL4RSrcDstInstruction(MCInst &Inst,
- unsigned Insn,
+static DecodeStatus DecodeL4RSrcDstInstruction(MCInst &Inst, unsigned Insn,
uint64_t Address,
- const void *Decoder);
+ const MCDisassembler *Decoder);
-static DecodeStatus DecodeL4RSrcDstSrcDstInstruction(MCInst &Inst,
- unsigned Insn,
- uint64_t Address,
- const void *Decoder);
+static DecodeStatus
+DecodeL4RSrcDstSrcDstInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
+ const MCDisassembler *Decoder);
#include "XCoreGenDisassemblerTables.inc"
-static DecodeStatus DecodeGRRegsRegisterClass(MCInst &Inst,
- unsigned RegNo,
+static DecodeStatus DecodeGRRegsRegisterClass(MCInst &Inst, unsigned RegNo,
uint64_t Address,
- const void *Decoder)
-{
+ const MCDisassembler *Decoder) {
if (RegNo > 11)
return MCDisassembler::Fail;
unsigned Reg = getReg(Decoder, XCore::GRRegsRegClassID, RegNo);
@@ -207,11 +183,9 @@ static DecodeStatus DecodeGRRegsRegisterClass(MCInst &Inst,
return MCDisassembler::Success;
}
-static DecodeStatus DecodeRRegsRegisterClass(MCInst &Inst,
- unsigned RegNo,
+static DecodeStatus DecodeRRegsRegisterClass(MCInst &Inst, unsigned RegNo,
uint64_t Address,
- const void *Decoder)
-{
+ const MCDisassembler *Decoder) {
if (RegNo > 15)
return MCDisassembler::Fail;
unsigned Reg = getReg(Decoder, XCore::RRegsRegClassID, RegNo);
@@ -220,7 +194,8 @@ static DecodeStatus DecodeRRegsRegisterClass(MCInst &Inst,
}
static DecodeStatus DecodeBitpOperand(MCInst &Inst, unsigned Val,
- uint64_t Address, const void *Decoder) {
+ uint64_t Address,
+ const MCDisassembler *Decoder) {
if (Val > 11)
return MCDisassembler::Fail;
static const unsigned Values[] = {
@@ -231,7 +206,8 @@ static DecodeStatus DecodeBitpOperand(MCInst &Inst, unsigned Val,
}
static DecodeStatus DecodeNegImmOperand(MCInst &Inst, unsigned Val,
- uint64_t Address, const void *Decoder) {
+ uint64_t Address,
+ const MCDisassembler *Decoder) {
Inst.addOperand(MCOperand::createImm(-(int64_t)Val));
return MCDisassembler::Success;
}
@@ -270,9 +246,9 @@ Decode3OpInstruction(unsigned Insn, unsigned &Op1, unsigned &Op2,
return MCDisassembler::Success;
}
-static DecodeStatus
-Decode2OpInstructionFail(MCInst &Inst, unsigned Insn, uint64_t Address,
- const void *Decoder) {
+static DecodeStatus Decode2OpInstructionFail(MCInst &Inst, unsigned Insn,
+ uint64_t Address,
+ const MCDisassembler *Decoder) {
// Try and decode as a 3R instruction.
unsigned Opcode = fieldFromInstruction(Insn, 11, 5);
switch (Opcode) {
@@ -340,9 +316,9 @@ Decode2OpInstructionFail(MCInst &Inst, unsigned Insn, uint64_t Address,
return MCDisassembler::Fail;
}
-static DecodeStatus
-Decode2RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
- const void *Decoder) {
+static DecodeStatus Decode2RInstruction(MCInst &Inst, unsigned Insn,
+ uint64_t Address,
+ const MCDisassembler *Decoder) {
unsigned Op1, Op2;
DecodeStatus S = Decode2OpInstruction(Insn, Op1, Op2);
if (S != MCDisassembler::Success)
@@ -353,9 +329,9 @@ Decode2RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
return S;
}
-static DecodeStatus
-Decode2RImmInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
- const void *Decoder) {
+static DecodeStatus Decode2RImmInstruction(MCInst &Inst, unsigned Insn,
+ uint64_t Address,
+ const MCDisassembler *Decoder) {
unsigned Op1, Op2;
DecodeStatus S = Decode2OpInstruction(Insn, Op1, Op2);
if (S != MCDisassembler::Success)
@@ -366,9 +342,9 @@ Decode2RImmInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
return S;
}
-static DecodeStatus
-DecodeR2RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
- const void *Decoder) {
+static DecodeStatus DecodeR2RInstruction(MCInst &Inst, unsigned Insn,
+ uint64_t Address,
+ const MCDisassembler *Decoder) {
unsigned Op1, Op2;
DecodeStatus S = Decode2OpInstruction(Insn, Op2, Op1);
if (S != MCDisassembler::Success)
@@ -379,9 +355,9 @@ DecodeR2RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
return S;
}
-static DecodeStatus
-Decode2RSrcDstInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
- const void *Decoder) {
+static DecodeStatus Decode2RSrcDstInstruction(MCInst &Inst, unsigned Insn,
+ uint64_t Address,
+ const MCDisassembler *Decoder) {
unsigned Op1, Op2;
DecodeStatus S = Decode2OpInstruction(Insn, Op1, Op2);
if (S != MCDisassembler::Success)
@@ -393,9 +369,9 @@ Decode2RSrcDstInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
return S;
}
-static DecodeStatus
-DecodeRUSInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
- const void *Decoder) {
+static DecodeStatus DecodeRUSInstruction(MCInst &Inst, unsigned Insn,
+ uint64_t Address,
+ const MCDisassembler *Decoder) {
unsigned Op1, Op2;
DecodeStatus S = Decode2OpInstruction(Insn, Op1, Op2);
if (S != MCDisassembler::Success)
@@ -406,9 +382,9 @@ DecodeRUSInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
return S;
}
-static DecodeStatus
-DecodeRUSBitpInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
- const void *Decoder) {
+static DecodeStatus DecodeRUSBitpInstruction(MCInst &Inst, unsigned Insn,
+ uint64_t Address,
+ const MCDisassembler *Decoder) {
unsigned Op1, Op2;
DecodeStatus S = Decode2OpInstruction(Insn, Op1, Op2);
if (S != MCDisassembler::Success)
@@ -421,7 +397,7 @@ DecodeRUSBitpInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
static DecodeStatus
DecodeRUSSrcDstBitpInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
- const void *Decoder) {
+ const MCDisassembler *Decoder) {
unsigned Op1, Op2;
DecodeStatus S = Decode2OpInstruction(Insn, Op1, Op2);
if (S != MCDisassembler::Success)
@@ -433,9 +409,9 @@ DecodeRUSSrcDstBitpInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
return S;
}
-static DecodeStatus
-DecodeL2OpInstructionFail(MCInst &Inst, unsigned Insn, uint64_t Address,
- const void *Decoder) {
+static DecodeStatus DecodeL2OpInstructionFail(MCInst &Inst, unsigned Insn,
+ uint64_t Address,
+ const MCDisassembler *Decoder) {
// Try and decode as a L3R / L2RUS instruction.
unsigned Opcode = fieldFromInstruction(Insn, 16, 4) |
fieldFromInstruction(Insn, 27, 5) << 4;
@@ -504,9 +480,9 @@ DecodeL2OpInstructionFail(MCInst &Inst, unsigned Insn, uint64_t Address,
return MCDisassembler::Fail;
}
-static DecodeStatus
-DecodeL2RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
- const void *Decoder) {
+static DecodeStatus DecodeL2RInstruction(MCInst &Inst, unsigned Insn,
+ uint64_t Address,
+ const MCDisassembler *Decoder) {
unsigned Op1, Op2;
DecodeStatus S = Decode2OpInstruction(fieldFromInstruction(Insn, 0, 16),
Op1, Op2);
@@ -518,9 +494,9 @@ DecodeL2RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
return S;
}
-static DecodeStatus
-DecodeLR2RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
- const void *Decoder) {
+static DecodeStatus DecodeLR2RInstruction(MCInst &Inst, unsigned Insn,
+ uint64_t Address,
+ const MCDisassembler *Decoder) {
unsigned Op1, Op2;
DecodeStatus S = Decode2OpInstruction(fieldFromInstruction(Insn, 0, 16),
Op1, Op2);
@@ -532,9 +508,9 @@ DecodeLR2RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
return S;
}
-static DecodeStatus
-Decode3RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
- const void *Decoder) {
+static DecodeStatus Decode3RInstruction(MCInst &Inst, unsigned Insn,
+ uint64_t Address,
+ const MCDisassembler *Decoder) {
unsigned Op1, Op2, Op3;
DecodeStatus S = Decode3OpInstruction(Insn, Op1, Op2, Op3);
if (S == MCDisassembler::Success) {
@@ -545,9 +521,9 @@ Decode3RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
return S;
}
-static DecodeStatus
-Decode3RImmInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
- const void *Decoder) {
+static DecodeStatus Decode3RImmInstruction(MCInst &Inst, unsigned Insn,
+ uint64_t Address,
+ const MCDisassembler *Decoder) {
unsigned Op1, Op2, Op3;
DecodeStatus S = Decode3OpInstruction(Insn, Op1, Op2, Op3);
if (S == MCDisassembler::Success) {
@@ -558,9 +534,9 @@ Decode3RImmInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
return S;
}
-static DecodeStatus
-Decode2RUSInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
- const void *Decoder) {
+static DecodeStatus Decode2RUSInstruction(MCInst &Inst, unsigned Insn,
+ uint64_t Address,
+ const MCDisassembler *Decoder) {
unsigned Op1, Op2, Op3;
DecodeStatus S = Decode3OpInstruction(Insn, Op1, Op2, Op3);
if (S == MCDisassembler::Success) {
@@ -571,9 +547,9 @@ Decode2RUSInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
return S;
}
-static DecodeStatus
-Decode2RUSBitpInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
- const void *Decoder) {
+static DecodeStatus Decode2RUSBitpInstruction(MCInst &Inst, unsigned Insn,
+ uint64_t Address,
+ const MCDisassembler *Decoder) {
unsigned Op1, Op2, Op3;
DecodeStatus S = Decode3OpInstruction(Insn, Op1, Op2, Op3);
if (S == MCDisassembler::Success) {
@@ -584,9 +560,9 @@ Decode2RUSBitpInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
return S;
}
-static DecodeStatus
-DecodeL3RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
- const void *Decoder) {
+static DecodeStatus DecodeL3RInstruction(MCInst &Inst, unsigned Insn,
+ uint64_t Address,
+ const MCDisassembler *Decoder) {
unsigned Op1, Op2, Op3;
DecodeStatus S =
Decode3OpInstruction(fieldFromInstruction(Insn, 0, 16), Op1, Op2, Op3);
@@ -598,9 +574,9 @@ DecodeL3RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
return S;
}
-static DecodeStatus
-DecodeL3RSrcDstInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
- const void *Decoder) {
+static DecodeStatus DecodeL3RSrcDstInstruction(MCInst &Inst, unsigned Insn,
+ uint64_t Address,
+ const MCDisassembler *Decoder) {
unsigned Op1, Op2, Op3;
DecodeStatus S =
Decode3OpInstruction(fieldFromInstruction(Insn, 0, 16), Op1, Op2, Op3);
@@ -613,9 +589,9 @@ DecodeL3RSrcDstInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
return S;
}
-static DecodeStatus
-DecodeL2RUSInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
- const void *Decoder) {
+static DecodeStatus DecodeL2RUSInstruction(MCInst &Inst, unsigned Insn,
+ uint64_t Address,
+ const MCDisassembler *Decoder) {
unsigned Op1, Op2, Op3;
DecodeStatus S =
Decode3OpInstruction(fieldFromInstruction(Insn, 0, 16), Op1, Op2, Op3);
@@ -627,9 +603,9 @@ DecodeL2RUSInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
return S;
}
-static DecodeStatus
-DecodeL2RUSBitpInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
- const void *Decoder) {
+static DecodeStatus DecodeL2RUSBitpInstruction(MCInst &Inst, unsigned Insn,
+ uint64_t Address,
+ const MCDisassembler *Decoder) {
unsigned Op1, Op2, Op3;
DecodeStatus S =
Decode3OpInstruction(fieldFromInstruction(Insn, 0, 16), Op1, Op2, Op3);
@@ -641,9 +617,9 @@ DecodeL2RUSBitpInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
return S;
}
-static DecodeStatus
-DecodeL6RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
- const void *Decoder) {
+static DecodeStatus DecodeL6RInstruction(MCInst &Inst, unsigned Insn,
+ uint64_t Address,
+ const MCDisassembler *Decoder) {
unsigned Op1, Op2, Op3, Op4, Op5, Op6;
DecodeStatus S =
Decode3OpInstruction(fieldFromInstruction(Insn, 0, 16), Op1, Op2, Op3);
@@ -661,9 +637,9 @@ DecodeL6RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
return S;
}
-static DecodeStatus
-DecodeL5RInstructionFail(MCInst &Inst, unsigned Insn, uint64_t Address,
- const void *Decoder) {
+static DecodeStatus DecodeL5RInstructionFail(MCInst &Inst, unsigned Insn,
+ uint64_t Address,
+ const MCDisassembler *Decoder) {
// Try and decode as a L6R instruction.
Inst.clear();
unsigned Opcode = fieldFromInstruction(Insn, 27, 5);
@@ -675,9 +651,9 @@ DecodeL5RInstructionFail(MCInst &Inst, unsigned Insn, uint64_t Address,
return MCDisassembler::Fail;
}
-static DecodeStatus
-DecodeL5RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
- const void *Decoder) {
+static DecodeStatus DecodeL5RInstruction(MCInst &Inst, unsigned Insn,
+ uint64_t Address,
+ const MCDisassembler *Decoder) {
unsigned Op1, Op2, Op3, Op4, Op5;
DecodeStatus S =
Decode3OpInstruction(fieldFromInstruction(Insn, 0, 16), Op1, Op2, Op3);
@@ -695,9 +671,9 @@ DecodeL5RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
return S;
}
-static DecodeStatus
-DecodeL4RSrcDstInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
- const void *Decoder) {
+static DecodeStatus DecodeL4RSrcDstInstruction(MCInst &Inst, unsigned Insn,
+ uint64_t Address,
+ const MCDisassembler *Decoder) {
unsigned Op1, Op2, Op3;
unsigned Op4 = fieldFromInstruction(Insn, 16, 4);
DecodeStatus S =
@@ -716,7 +692,7 @@ DecodeL4RSrcDstInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
static DecodeStatus
DecodeL4RSrcDstSrcDstInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
- const void *Decoder) {
+ const MCDisassembler *Decoder) {
unsigned Op1, Op2, Op3;
unsigned Op4 = fieldFromInstruction(Insn, 16, 4);
DecodeStatus S =