7 files changed, 86 insertions, 4 deletions

diff --git a/sys/amd64/include/fpu.h b/sys/amd64/include/fpu.h
index 11f04783df35..1474f2f41a79 100644
--- a/sys/amd64/include/fpu.h
+++ b/sys/amd64/include/fpu.h
@@ -85,6 +85,42 @@ struct	save87 {
 	u_char	sv_pad[64];	/* padding; used by emulators */
 };
 
+struct  envxmm {
+	u_int16_t	en_cw;		/* control word (16bits) */
+	u_int16_t	en_sw;		/* status word (16bits) */
+	u_int16_t	en_tw;		/* tag word (16bits) */
+	u_int16_t	en_opcode;	/* opcode last executed (11 bits ) */
+	u_int32_t	en_fip;		/* floating point instruction pointer */
+	u_int16_t	en_fcs;		/* floating code segment selector */
+	u_int16_t	en_pad0;	/* padding */
+	u_int32_t	en_foo;		/* floating operand offset */
+	u_int16_t	en_fos;		/* floating operand segment selector */
+	u_int16_t	en_pad1;	/* padding */
+	u_int32_t	en_mxcsr;	/* SSE sontorol/status register */
+	u_int32_t	en_pad2;	/* padding */
+};
+
+/* Contents of each SSE extended accumulator */
+struct  xmmacc {
+	u_char	xmm_bytes[16];
+};
+
+struct  savexmm {
+	struct	envxmm	sv_env;
+	struct {
+		struct fpacc87	fp_acc;
+		u_char		fp_pad[6];      /* padding */
+	} sv_fp[8];
+	struct xmmacc	sv_xmm[8];
+	u_long sv_ex_sw;	/* status word for last exception */
+	u_char sv_pad[220];
+} __attribute__((aligned(16)));
+
+union	savefpu {
+	struct	save87	sv_87;
+	struct	savexmm	sv_xmm;
+};
+
 /*
  * The hardware default control word for i387's and later coprocessors is
  * 0x37F, giving:
@@ -108,7 +144,7 @@ struct	save87 {
 int	npxdna __P((void));
 void	npxexit __P((struct proc *p));
 void	npxinit __P((int control));
-void	npxsave __P((struct save87 *addr));
+void	npxsave __P((union savefpu *addr));
 int	npxtrap __P((void));
 #endif
 
diff --git a/sys/amd64/include/md_var.h b/sys/amd64/include/md_var.h
index 5a2ed2677879..6c81a9660ac1 100644
--- a/sys/amd64/include/md_var.h
+++ b/sys/amd64/include/md_var.h
@@ -47,6 +47,7 @@ extern	int	(*copyout_vector) __P((const void *kaddr, void *udaddr,
 extern	u_int	cpu_feature;
 extern	u_int	cpu_high;
 extern	u_int	cpu_id;
+extern	u_int	cpu_fxsr;
 extern	char	cpu_vendor[];
 extern	u_int	cyrix_did;
 extern	char	kstack[];
diff --git a/sys/amd64/include/mptable.h b/sys/amd64/include/mptable.h
index 0a0de69d44cd..d5af7b3cd1c0 100644
--- a/sys/amd64/include/mptable.h
+++ b/sys/amd64/include/mptable.h
@@ -2221,6 +2221,8 @@ invltlb(void)
  * This is called once the rest of the system is up and running and we're
  * ready to let the AP's out of the pen.
  */
+extern void	enable_sse(void);
+
 void
 ap_init(void)
 {
@@ -2260,6 +2262,9 @@ ap_init(void)
 	/* set up FPU state on the AP */
 	npxinit(__INITIAL_NPXCW__);
 
+	/* set up SSE registers */
+	enable_sse();
+
 	/* A quick check from sanity claus */
 	apic_id = (apic_id_to_logical[(lapic.id & 0x0f000000) >> 24]);
 	if (PCPU_GET(cpuid) != apic_id) {
diff --git a/sys/amd64/include/npx.h b/sys/amd64/include/npx.h
index 11f04783df35..1474f2f41a79 100644
--- a/sys/amd64/include/npx.h
+++ b/sys/amd64/include/npx.h
@@ -85,6 +85,42 @@ struct	save87 {
 	u_char	sv_pad[64];	/* padding; used by emulators */
 };
 
+struct  envxmm {
+	u_int16_t	en_cw;		/* control word (16bits) */
+	u_int16_t	en_sw;		/* status word (16bits) */
+	u_int16_t	en_tw;		/* tag word (16bits) */
+	u_int16_t	en_opcode;	/* opcode last executed (11 bits ) */
+	u_int32_t	en_fip;		/* floating point instruction pointer */
+	u_int16_t	en_fcs;		/* floating code segment selector */
+	u_int16_t	en_pad0;	/* padding */
+	u_int32_t	en_foo;		/* floating operand offset */
+	u_int16_t	en_fos;		/* floating operand segment selector */
+	u_int16_t	en_pad1;	/* padding */
+	u_int32_t	en_mxcsr;	/* SSE sontorol/status register */
+	u_int32_t	en_pad2;	/* padding */
+};
+
+/* Contents of each SSE extended accumulator */
+struct  xmmacc {
+	u_char	xmm_bytes[16];
+};
+
+struct  savexmm {
+	struct	envxmm	sv_env;
+	struct {
+		struct fpacc87	fp_acc;
+		u_char		fp_pad[6];      /* padding */
+	} sv_fp[8];
+	struct xmmacc	sv_xmm[8];
+	u_long sv_ex_sw;	/* status word for last exception */
+	u_char sv_pad[220];
+} __attribute__((aligned(16)));
+
+union	savefpu {
+	struct	save87	sv_87;
+	struct	savexmm	sv_xmm;
+};
+
 /*
  * The hardware default control word for i387's and later coprocessors is
  * 0x37F, giving:
@@ -108,7 +144,7 @@ struct	save87 {
 int	npxdna __P((void));
 void	npxexit __P((struct proc *p));
 void	npxinit __P((int control));
-void	npxsave __P((struct save87 *addr));
+void	npxsave __P((union savefpu *addr));
 int	npxtrap __P((void));
 #endif
 
diff --git a/sys/amd64/include/pcb.h b/sys/amd64/include/pcb.h
index 962fc6f07962..6ea7c3d64eae 100644
--- a/sys/amd64/include/pcb.h
+++ b/sys/amd64/include/pcb.h
@@ -62,7 +62,8 @@ struct pcb {
 	int     pcb_dr7;
 
 	struct	pcb_ldt *pcb_ldt;	/* per process (user) LDT */
-	struct	save87	pcb_savefpu;	/* floating point state for 287/387 */
+	union	savefpu	pcb_save;
+#define pcb_savefpu	pcb_save.sv_87
 	u_char	pcb_flags;
 #define	FP_SOFTFP	0x01	/* process using software fltng pnt emulator */
 #define	PCB_DBREGS	0x02	/* process using debug registers */
diff --git a/sys/amd64/include/specialreg.h b/sys/amd64/include/specialreg.h
index 937cab003e7a..02440c9ebcba 100644
--- a/sys/amd64/include/specialreg.h
+++ b/sys/amd64/include/specialreg.h
@@ -93,6 +93,8 @@
 #define	CPUID_PGE	0x2000
 #define	CPUID_MCA	0x4000
 #define	CPUID_CMOV	0x8000
+#define	CPUID_FXSR  0x01000000
+#define	CPUID_XMM   0x02000000
 
 /*
  * Model-specific registers for the i386 family
diff --git a/sys/amd64/include/trap.h b/sys/amd64/include/trap.h
index 6db97ecc18d5..67becb336fb7 100644
--- a/sys/amd64/include/trap.h
+++ b/sys/amd64/include/trap.h
@@ -64,7 +64,8 @@
 #define	T_SEGNPFLT	26	/* segment not present fault */
 #define	T_STKFLT	27	/* stack fault */
 #define	T_MCHK		28	/* machine check trap */
-#define	T_RESERVED	29	/* reserved (unknown) */
+#define	T_XMMFLT	29	/* SIMD floating-point exception */
+#define	T_RESERVED	30	/* reserved (unknown) */
 
 /* XXX most of the following codes aren't used, but could be. */