diff options
| author | Ariff Abdullah <ariff@FreeBSD.org> | 2007-04-25 19:58:42 +0000 |
|---|---|---|
| committer | Ariff Abdullah <ariff@FreeBSD.org> | 2007-04-25 19:58:42 +0000 |
| commit | 1d80d190afabc31e780df9e0f5247145c9c03667 (patch) | |
| tree | 93822402becfb6900533f5ab1c83cc7869d07648 /sys/amd64 | |
| parent | bca541bab1f87b38ac660d38ff214c80b65e32ab (diff) | |
Notes
Diffstat (limited to 'sys/amd64')
| -rw-r--r-- | sys/amd64/amd64/local_apic.c | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/sys/amd64/amd64/local_apic.c b/sys/amd64/amd64/local_apic.c index 04ff976e54c7..df038f8aeaa1 100644 --- a/sys/amd64/amd64/local_apic.c +++ b/sys/amd64/amd64/local_apic.c @@ -326,6 +326,29 @@ lapic_setup(int boot) /* XXX: Error and thermal LVTs */ + if (strcmp(cpu_vendor, "AuthenticAMD") == 0) { + /* + * Detect the presence of C1E capability mostly on latest + * dual-cores (or future) k8 family. This feature renders + * the local APIC timer dead, so we disable it by reading + * the Interrupt Pending Message register and clearing both + * C1eOnCmpHalt (bit 28) and SmiOnCmpHalt (bit 27). + * + * Reference: + * "BIOS and Kernel Developer's Guide for AMD NPT + * Family 0Fh Processors" + * #32559 revision 3.00 + */ + if ((cpu_id & 0x00000f00) == 0x00000f00 && + (cpu_id & 0x0fff0000) >= 0x00040000) { + uint64_t msr; + + msr = rdmsr(0xc0010055); + if (msr & 0x18000000) + wrmsr(0xc0010055, msr & ~0x18000000ULL); + } + } + intr_restore(eflags); } |
