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author | Emmanuel Vadot <manu@FreeBSD.org> | 2022-08-10 12:32:46 +0000 |
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committer | Emmanuel Vadot <manu@FreeBSD.org> | 2022-08-10 12:32:46 +0000 |
commit | c9ccf3a32da427475985b85d7df023ccfb138c27 (patch) | |
tree | 0d09e29637f0cc417d0005408735014616e21e63 /sys/contrib/device-tree/Bindings/firmware/qemu,fw-cfg-mmio.yaml | |
parent | e67e85659c0de33e617e5fbf1028c6e8b49eee53 (diff) | |
parent | 9066e824cab7e1ef529de39a84122cf2944d4142 (diff) | |
download | src-c9ccf3a32da427475985b85d7df023ccfb138c27.tar.gz src-c9ccf3a32da427475985b85d7df023ccfb138c27.zip |
Diffstat (limited to 'sys/contrib/device-tree/Bindings/firmware/qemu,fw-cfg-mmio.yaml')
-rw-r--r-- | sys/contrib/device-tree/Bindings/firmware/qemu,fw-cfg-mmio.yaml | 54 |
1 files changed, 54 insertions, 0 deletions
diff --git a/sys/contrib/device-tree/Bindings/firmware/qemu,fw-cfg-mmio.yaml b/sys/contrib/device-tree/Bindings/firmware/qemu,fw-cfg-mmio.yaml new file mode 100644 index 000000000000..fcf0011b8e6d --- /dev/null +++ b/sys/contrib/device-tree/Bindings/firmware/qemu,fw-cfg-mmio.yaml @@ -0,0 +1,54 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/firmware/qemu,fw-cfg-mmio.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: QEMU Firmware Configuration bindings + +maintainers: + - Rob Herring <robh@kernel.org> + +description: | + Various QEMU emulation / virtualization targets provide the following + Firmware Configuration interface on the "virt" machine type: + + - A write-only, 16-bit wide selector (or control) register, + - a read-write, 64-bit wide data register. + + QEMU exposes the control and data register to guests as memory mapped + registers; their location is communicated to the guest's UEFI firmware in the + DTB that QEMU places at the bottom of the guest's DRAM. + + The authoritative guest-side hardware interface documentation to the fw_cfg + device can be found in "docs/specs/fw_cfg.txt" in the QEMU source tree. + + +properties: + compatible: + const: qemu,fw-cfg-mmio + + reg: + maxItems: 1 + description: | + * Bytes 0x0 to 0x7 cover the data register. + * Bytes 0x8 to 0x9 cover the selector register. + * Further registers may be appended to the region in case of future interface + revisions / feature bits. + + dma-coherent: true + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + + fw-cfg@9020000 { + compatible = "qemu,fw-cfg-mmio"; + reg = <0x9020000 0xa>; + }; +... |