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authorAdrian Chadd <adrian@FreeBSD.org>2012-06-17 05:34:41 +0000
committerAdrian Chadd <adrian@FreeBSD.org>2012-06-17 05:34:41 +0000
commit1b86b1d21af9c9b91b96de9c7453d508fad92198 (patch)
tree7832938cfb314b6a84c88b199e1f1fec0af4e826 /sys/dev/ath/ath_hal/ar9002
parentdaf98875969e44f0d80b8449bbd00a9e19b53338 (diff)
Notes
Diffstat (limited to 'sys/dev/ath/ath_hal/ar9002')
-rw-r--r--sys/dev/ath/ath_hal/ar9002/ar9285_attach.c19
1 files changed, 19 insertions, 0 deletions
diff --git a/sys/dev/ath/ath_hal/ar9002/ar9285_attach.c b/sys/dev/ath/ath_hal/ar9002/ar9285_attach.c
index 7eefe49079a2..940c6a5baeaf 100644
--- a/sys/dev/ath/ath_hal/ar9002/ar9285_attach.c
+++ b/sys/dev/ath/ath_hal/ar9002/ar9285_attach.c
@@ -369,6 +369,25 @@ ar9285ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore, HAL_BOOL power_off)
{
uint32_t val;
+ /*
+ * This workaround needs some integration work with the HAL
+ * config parameters and the if_ath_pci.c glue.
+ * Specifically, read the value of the PCI register 0x70c
+ * (4 byte PCI config space register) and store it in ath_hal_war70c.
+ * Then if it's non-zero, the below WAR would override register
+ * 0x570c upon suspend/resume.
+ */
+#if 0
+ if (AR_SREV_9285E_20(ah)) {
+ val = AH_PRIVATE(ah)->ah_config.ath_hal_war70c;
+ if (val) {
+ val &= 0xffff00ff;
+ val |= 0x6f00;
+ OS_REG_WRITE(ah, 0x570c, val);
+ }
+ }
+#endif
+
if (AH_PRIVATE(ah)->ah_ispcie && !restore) {
ath_hal_ini_write(ah, &AH5416(ah)->ah_ini_pcieserdes, 1, 0);
OS_DELAY(1000);