MFC r226123: - src - FreeBSD source tree

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author	Pyun YongHyeon <yongari@FreeBSD.org>	2011-12-31 00:46:06 +0000
committer	Pyun YongHyeon <yongari@FreeBSD.org>	2011-12-31 00:46:06 +0000
commit	4d4dd3f47c149223e958487954ec89acfb1e964d (patch)
tree	57060619211a21bf353f67afd1db660115791c36 /sys/dev/bce
parent	aeb0fc3839c421108cb07041dbe4ceb50c86c1dc (diff)

Notes

Diffstat (limited to 'sys/dev/bce')

-rw-r--r--

sys/dev/bce/if_bce.c

-rw-r--r--

sys/dev/bce/if_bcereg.h

2 files changed, 25 insertions, 52 deletions

diff --git a/sys/dev/bce/if_bce.c b/sys/dev/bce/if_bce.c
index 39d00188b4b5..5b9d4f4f086a 100644
--- a/sys/dev/bce/if_bce.c
+++ b/sys/dev/bce/if_bce.c

@@ -796,8 +796,7 @@ bce_attach(device_t dev)

DBPRINT(sc, BCE_INFO_LOAD, "%s(): Using MSI "

"interrupt.\n", __FUNCTION__);

sc->bce_flags |= BCE_USING_MSI_FLAG;

- if ((BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5709) ||

- (BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5716))

+ if (BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5709)

sc->bce_flags |= BCE_ONE_SHOT_MSI_FLAG;

sc->bce_irq_rid = 1;

sc->bce_intr = bce_intr;

@@ -1450,8 +1449,7 @@ bce_ctx_rd(struct bce_softc *sc, u32 cid_addr, u32 ctx_offset)

offset = ctx_offset + cid_addr;

- if ((BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5709) ||

- (BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5716)) {

+ if (BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5709) {

REG_WR(sc, BCE_CTX_CTX_CTRL, (offset | BCE_CTX_CTX_CTRL_READ_REQ));

@@ -1503,8 +1501,7 @@ bce_ctx_wr(struct bce_softc *sc, u32 cid_addr, u32 ctx_offset, u32 ctx_val)

BCE_PRINTF("%s(): Invalid CID address: 0x%08X.\n",

__FUNCTION__, cid_addr));

- if ((BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5709) ||

- (BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5716)) {

+ if (BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5709) {

REG_WR(sc, BCE_CTX_CTX_DATA, ctx_val);

REG_WR(sc, BCE_CTX_CTX_CTRL, (offset | BCE_CTX_CTX_CTRL_WRITE_REQ));

@@ -2189,8 +2186,7 @@ bce_init_nvram(struct bce_softc *sc)

DBENTER(BCE_VERBOSE_NVRAM);

- if ((BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5709) ||

- (BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5716)) {

+ if (BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5709) {

sc->bce_flash_info = &flash_5709;

goto bce_init_nvram_get_flash_size;

}

@@ -2892,8 +2888,7 @@ bce_dma_free(struct bce_softc *sc)

/* Free, unmap and destroy all context memory pages. */

- if ((BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5709) ||

- (BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5716)) {

+ if (BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5709) {

for (i = 0; i < sc->ctx_pages; i++ ) {

if (sc->ctx_block[i] != NULL) {

bus_dmamem_free(

@@ -3232,8 +3227,7 @@ bce_dma_alloc(device_t dev)

__FUNCTION__, (uintmax_t) sc->stats_block_paddr);

/* BCM5709 uses host memory as cache for context memory. */

- if ((BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5709) ||

- (BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5716)) {

+ if (BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5709) {

sc->ctx_pages = 0x2000 / BCM_PAGE_SIZE;

if (sc->ctx_pages == 0)

sc->ctx_pages = 1;

@@ -3876,8 +3870,7 @@ bce_init_rxp_cpu(struct bce_softc *sc)

cpu_reg.spad_base = BCE_RXP_SCRATCH;

cpu_reg.mips_view_base = 0x8000000;

- if ((BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5709) ||

- (BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5716)) {

+ if (BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5709) {

fw.ver_major = bce_RXP_b09FwReleaseMajor;

fw.ver_minor = bce_RXP_b09FwReleaseMinor;

fw.ver_fix = bce_RXP_b09FwReleaseFix;

@@ -3975,8 +3968,7 @@ bce_init_txp_cpu(struct bce_softc *sc)

cpu_reg.spad_base = BCE_TXP_SCRATCH;

cpu_reg.mips_view_base = 0x8000000;

- if ((BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5709) ||

- (BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5716)) {

+ if (BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5709) {

fw.ver_major = bce_TXP_b09FwReleaseMajor;

fw.ver_minor = bce_TXP_b09FwReleaseMinor;

fw.ver_fix = bce_TXP_b09FwReleaseFix;

@@ -4073,8 +4065,7 @@ bce_init_tpat_cpu(struct bce_softc *sc)

cpu_reg.spad_base = BCE_TPAT_SCRATCH;

cpu_reg.mips_view_base = 0x8000000;

- if ((BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5709) ||

- (BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5716)) {

+ if (BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5709) {

fw.ver_major = bce_TPAT_b09FwReleaseMajor;

fw.ver_minor = bce_TPAT_b09FwReleaseMinor;

fw.ver_fix = bce_TPAT_b09FwReleaseFix;

@@ -4171,8 +4162,7 @@ bce_init_cp_cpu(struct bce_softc *sc)

cpu_reg.spad_base = BCE_CP_SCRATCH;

cpu_reg.mips_view_base = 0x8000000;

- if ((BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5709) ||

- (BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5716)) {

+ if (BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5709) {

fw.ver_major = bce_CP_b09FwReleaseMajor;

fw.ver_minor = bce_CP_b09FwReleaseMinor;

fw.ver_fix = bce_CP_b09FwReleaseFix;

@@ -4269,8 +4259,7 @@ bce_init_com_cpu(struct bce_softc *sc)

cpu_reg.spad_base = BCE_COM_SCRATCH;

cpu_reg.mips_view_base = 0x8000000;

- if ((BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5709) ||

- (BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5716)) {

+ if (BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5709) {

fw.ver_major = bce_COM_b09FwReleaseMajor;

fw.ver_minor = bce_COM_b09FwReleaseMinor;

fw.ver_fix = bce_COM_b09FwReleaseFix;

@@ -4353,8 +4342,7 @@ bce_init_cpus(struct bce_softc *sc)

{

DBENTER(BCE_VERBOSE_RESET);

- if ((BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5709) ||

- (BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5716)) {

+ if (BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5709) {

if ((BCE_CHIP_REV(sc) == BCE_CHIP_REV_Ax)) {

bce_load_rv2p_fw(sc, bce_xi90_rv2p_proc1,

@@ -4402,8 +4390,7 @@ bce_init_ctx(struct bce_softc *sc)

rc = 0;

DBENTER(BCE_VERBOSE_RESET | BCE_VERBOSE_CTX);

- if ((BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5709) ||

- (BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5716)) {

+ if (BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5709) {

retry_cnt = CTX_INIT_RETRY_COUNT;

DBPRINT(sc, BCE_INFO_CTX, "Initializing 5709 context.\n");

@@ -4630,8 +4617,7 @@ bce_reset(struct bce_softc *sc, u32 reset_code)

DELAY(5);

/* Disable DMA */

- if ((BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5709) ||

- (BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5716)) {

+ if (BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5709) {

val = REG_RD(sc, BCE_MISC_NEW_CORE_CTL);

val &= ~BCE_MISC_NEW_CORE_CTL_DMA_ENABLE;

REG_WR(sc, BCE_MISC_NEW_CORE_CTL, val);

@@ -4653,8 +4639,7 @@ bce_reset(struct bce_softc *sc, u32 reset_code)

val = REG_RD(sc, BCE_MISC_ID);

/* Chip reset. */

- if ((BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5709) ||

- (BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5716)) {

+ if (BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5709) {

REG_WR(sc, BCE_MISC_COMMAND, BCE_MISC_COMMAND_SW_RESET);

REG_RD(sc, BCE_MISC_COMMAND);

DELAY(5);

@@ -4783,8 +4768,7 @@ bce_chipinit(struct bce_softc *sc)

val |= BCE_MQ_CONFIG_KNL_BYP_BLK_SIZE_256;

/* Enable bins used on the 5709. */

- if ((BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5709) ||

- (BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5716)) {

+ if (BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5709) {

val |= BCE_MQ_CONFIG_BIN_MQ_MODE;

if (BCE_CHIP_ID(sc) == BCE_CHIP_ID_5709_A1)

val |= BCE_MQ_CONFIG_HALT_DIS;

@@ -4938,8 +4922,7 @@ bce_blockinit(struct bce_softc *sc)

}

/* Enable DMA */

- if ((BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5709) ||

- (BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5716)) {

+ if (BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5709) {

val = REG_RD(sc, BCE_MISC_NEW_CORE_CTL);

val |= BCE_MISC_NEW_CORE_CTL_DMA_ENABLE;

REG_WR(sc, BCE_MISC_NEW_CORE_CTL, val);

@@ -4963,8 +4946,7 @@ bce_blockinit(struct bce_softc *sc)

}

/* Enable all remaining blocks in the MAC. */

- if ((BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5709) ||

- (BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5716))

+ if (BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5709)

REG_WR(sc, BCE_MISC_ENABLE_SET_BITS,

BCE_MISC_ENABLE_DEFAULT_XI);

else

@@ -5241,8 +5223,7 @@ bce_init_tx_context(struct bce_softc *sc)

DBENTER(BCE_VERBOSE_RESET | BCE_VERBOSE_SEND | BCE_VERBOSE_CTX);

/* Initialize the context ID for an L2 TX chain. */

- if ((BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5709) ||

- (BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5716)) {

+ if (BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5709) {

/* Set the CID type to support an L2 connection. */

val = BCE_L2CTX_TX_TYPE_TYPE_L2_XI |

BCE_L2CTX_TX_TYPE_SIZE_L2_XI;

@@ -5403,8 +5384,7 @@ bce_init_rx_context(struct bce_softc *sc)

* when pause frames can be stopped (the high

* watermark).

- if ((BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5709) ||

- (BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5716)) {

+ if (BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5709) {

u32 lo_water, hi_water;

if (sc->bce_flags && BCE_USING_TX_FLOW_CONTROL) {

@@ -5438,8 +5418,7 @@ bce_init_rx_context(struct bce_softc *sc)

CTX_WR(sc, GET_CID_ADDR(RX_CID), BCE_L2CTX_RX_CTX_TYPE, val);

/* Setup the MQ BIN mapping for l2_ctx_host_bseq. */

- if ((BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5709) ||

- (BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5716)) {

+ if (BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5709) {

val = REG_RD(sc, BCE_MQ_MAP_L2_5);

REG_WR(sc, BCE_MQ_MAP_L2_5, val | BCE_MQ_MAP_L2_5_ARM);

}

@@ -5655,8 +5634,7 @@ bce_init_pg_chain(struct bce_softc *sc)

}

/* Setup the MQ BIN mapping for host_pg_bidx. */

- if ((BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5709) ||

- (BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5716))

+ if (BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5709)

REG_WR(sc, BCE_MQ_MAP_L2_3, BCE_MQ_MAP_L2_3_DEFAULT);

CTX_WR(sc, GET_CID_ADDR(RX_CID), BCE_L2CTX_RX_PG_BUF_SIZE, 0);

@@ -9476,8 +9454,7 @@ bce_dump_ctx(struct bce_softc *sc, u16 cid)

"consumer index\n", CTX_RD(sc, GET_CID_ADDR(cid),

BCE_L2CTX_RX_NX_PG_BDIDX));

} else if (cid == TX_CID) {

- if ((BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5709) ||

- (BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5716)) {

+ if (BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5709) {

BCE_PRINTF(" 0x%08X - (L2CTX_TX_TYPE_XI) ctx type\n",

CTX_RD(sc, GET_CID_ADDR(cid),

BCE_L2CTX_TX_TYPE_XI));

@@ -9739,8 +9716,7 @@ bce_dump_ftqs(struct bce_softc *sc)

(BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_CPQ_VALID_CNT << 8) |

(BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_MGMQ_VALID_CNT);

- if ((BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5709) ||

- (BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5716))

+ if ((BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5709)

val = val |

(BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_RV2PCSQ_VALID_CNT_XI <<

24);

@@ -9773,8 +9749,7 @@ bce_dump_ftqs(struct bce_softc *sc)

BCE_PRINTF(" CS 0x%08X 0x%08X 0x%08X 0x%08X 0x%08X\n",

cmd, ctl, cur_depth, max_depth, valid_cnt);

- if ((BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5709) ||

- (BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5716)) {

+ if (BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5709) {

/* Input queue to the RV2P Command Scheduler */

cmd = REG_RD(sc, BCE_RV2PCSR_FTQ_CMD);

ctl = REG_RD(sc, BCE_RV2PCSR_FTQ_CTL);

diff --git a/sys/dev/bce/if_bcereg.h b/sys/dev/bce/if_bcereg.h
index 2bb589fcc7a2..172f33c66329 100644
--- a/sys/dev/bce/if_bcereg.h
+++ b/sys/dev/bce/if_bcereg.h

@@ -576,7 +576,6 @@ default: DBPRINT(sc, BCE_INSANE_PHY, \

#define BCE_CHIP_NUM_5706 0x57060000

#define BCE_CHIP_NUM_5708 0x57080000

#define BCE_CHIP_NUM_5709 0x57090000

-#define BCE_CHIP_NUM_5716 0x57160000

#define BCE_CHIP_REV(sc) (((sc)->bce_chipid) & 0x0000f000)

#define BCE_CHIP_REV_Ax 0x00000000

@@ -601,7 +600,6 @@ default: DBPRINT(sc, BCE_INSANE_PHY, \

#define BCE_CHIP_ID_5709_B1 0x57091010

#define BCE_CHIP_ID_5709_B2 0x57091020

#define BCE_CHIP_ID_5709_C0 0x57092000

-#define BCE_CHIP_ID_5716_C0 0x57162000

#define BCE_CHIP_BOND_ID(sc) (((sc)->bce_chipid) & 0xf)