1 files changed, 327 insertions, 334 deletions

diff --git a/sys/dev/drm2/i915/i915_drv.c b/sys/dev/drm2/i915/i915_drv.c
index 3109827a8096..e4bf06edd6d6 100644
--- a/sys/dev/drm2/i915/i915_drv.c
+++ b/sys/dev/drm2/i915/i915_drv.c
@@ -42,6 +42,44 @@ __FBSDID("$FreeBSD$");
 
 #include "fb_if.h"
 
+int intel_iommu_enabled = 0;
+TUNABLE_INT("drm.i915.intel_iommu_enabled", &intel_iommu_enabled);
+int intel_iommu_gfx_mapped = 0;
+TUNABLE_INT("drm.i915.intel_iommu_gfx_mapped", &intel_iommu_gfx_mapped);
+
+int i915_prefault_disable;
+TUNABLE_INT("drm.i915.prefault_disable", &i915_prefault_disable);
+int i915_semaphores = -1;
+TUNABLE_INT("drm.i915.semaphores", &i915_semaphores);
+static int i915_try_reset = 1;
+TUNABLE_INT("drm.i915.try_reset", &i915_try_reset);
+unsigned int i915_lvds_downclock = 0;
+TUNABLE_INT("drm.i915.lvds_downclock", &i915_lvds_downclock);
+int i915_vbt_sdvo_panel_type = -1;
+TUNABLE_INT("drm.i915.vbt_sdvo_panel_type", &i915_vbt_sdvo_panel_type);
+unsigned int i915_powersave = 1;
+TUNABLE_INT("drm.i915.powersave", &i915_powersave);
+int i915_enable_fbc = 0;
+TUNABLE_INT("drm.i915.enable_fbc", &i915_enable_fbc);
+int i915_enable_rc6 = 0;
+TUNABLE_INT("drm.i915.enable_rc6", &i915_enable_rc6);
+int i915_lvds_channel_mode;
+TUNABLE_INT("drm.i915.lvds_channel_mode", &i915_lvds_channel_mode);
+int i915_panel_use_ssc = -1;
+TUNABLE_INT("drm.i915.panel_use_ssc", &i915_panel_use_ssc);
+int i915_panel_ignore_lid = 0;
+TUNABLE_INT("drm.i915.panel_ignore_lid", &i915_panel_ignore_lid);
+int i915_panel_invert_brightness;
+TUNABLE_INT("drm.i915.panel_invert_brightness", &i915_panel_invert_brightness);
+int i915_modeset = 1;
+TUNABLE_INT("drm.i915.modeset", &i915_modeset);
+int i915_enable_ppgtt = -1;
+TUNABLE_INT("drm.i915.enable_ppgtt", &i915_enable_ppgtt);
+int i915_enable_hangcheck = 1;
+TUNABLE_INT("drm.i915.enable_hangcheck", &i915_enable_hangcheck);
+static int i915_enable_unsupported = 0;
+TUNABLE_INT("drm.i915.enable_unsupported", &i915_enable_unsupported);
+
 /* drv_PCI_IDs comes from drm_pciids.h, generated from drm_pciids.txt. */
 static drm_pci_id_list_t i915_pciidlist[] = {
 	i915_PCI_IDS
@@ -229,7 +267,7 @@ static const struct intel_device_info intel_haswell_m_info = {
 static const struct intel_gfx_device_id {
 	int device;
 	const struct intel_device_info *info;
-} pciidlist[] = {						/* aka */
+} i915_infolist[] = {		/* aka */
 	INTEL_VGA_DEVICE(0x3577, &intel_i830_info),		/* I830_M */
 	INTEL_VGA_DEVICE(0x2562, &intel_845g_info),		/* 845_G */
 	INTEL_VGA_DEVICE(0x3582, &intel_i85x_info),		/* I855_GM */
@@ -316,7 +354,61 @@ static const struct intel_gfx_device_id {
 	{0, 0}
 };
 
-static int i915_enable_unsupported;
+#define	PCI_VENDOR_INTEL		0x8086
+#define INTEL_PCH_DEVICE_ID_MASK	0xff00
+#define INTEL_PCH_IBX_DEVICE_ID_TYPE	0x3b00
+#define INTEL_PCH_CPT_DEVICE_ID_TYPE	0x1c00
+#define INTEL_PCH_PPT_DEVICE_ID_TYPE	0x1e00
+#define INTEL_PCH_LPT_DEVICE_ID_TYPE	0x8c00
+
+void intel_detect_pch(struct drm_device *dev)
+{
+	struct drm_i915_private *dev_priv = dev->dev_private;
+	device_t pch;
+	uint32_t id;
+
+	pch = pci_find_class(PCIC_BRIDGE, PCIS_BRIDGE_ISA);
+	if (pch != NULL && pci_get_vendor(pch) == PCI_VENDOR_INTEL) {
+		id = pci_get_device(pch) & INTEL_PCH_DEVICE_ID_MASK;
+		if (id == INTEL_PCH_IBX_DEVICE_ID_TYPE) {
+			dev_priv->pch_type = PCH_IBX;
+			dev_priv->num_pch_pll = 2;
+			DRM_DEBUG_KMS("Found Ibex Peak PCH\n");
+		} else if (id == INTEL_PCH_CPT_DEVICE_ID_TYPE) {
+			dev_priv->pch_type = PCH_CPT;
+			dev_priv->num_pch_pll = 2;
+			DRM_DEBUG_KMS("Found CougarPoint PCH\n");
+		} else if (id == INTEL_PCH_PPT_DEVICE_ID_TYPE) {
+			/* PantherPoint is CPT compatible */
+			dev_priv->pch_type = PCH_CPT;
+			dev_priv->num_pch_pll = 2;
+			DRM_DEBUG_KMS("Found PatherPoint PCH\n");
+		} else if (id == INTEL_PCH_LPT_DEVICE_ID_TYPE) {
+			dev_priv->pch_type = PCH_LPT;
+			dev_priv->num_pch_pll = 0;
+			DRM_DEBUG_KMS("Found LynxPoint PCH\n");
+		} else
+			DRM_DEBUG_KMS("No PCH detected\n");
+		KASSERT(dev_priv->num_pch_pll <= I915_NUM_PLLS,
+		    ("num_pch_pll %d\n", dev_priv->num_pch_pll));
+	} else
+		DRM_DEBUG_KMS("No Intel PCI-ISA bridge found\n");
+}
+
+bool i915_semaphore_is_enabled(struct drm_device *dev)
+{
+	if (INTEL_INFO(dev)->gen < 6)
+		return 0;
+
+	if (i915_semaphores >= 0)
+		return i915_semaphores;
+
+	/* Enable semaphores on SNB when IO remapping is off */
+	if (INTEL_INFO(dev)->gen == 6 && intel_iommu_gfx_mapped)
+		return false;
+
+	return 1;
+}
 
 static int i915_drm_freeze(struct drm_device *dev)
 {
@@ -355,7 +447,7 @@ static int i915_suspend(device_t kdev)
 	int error;
 
 	dev = device_get_softc(kdev);
-	if (dev == NULL || dev->dev_private == NULL) {
+	if (!dev || !dev->dev_private) {
 		DRM_ERROR("DRM not initialized, aborting suspend.\n");
 		return ENODEV;
 	}
@@ -363,7 +455,7 @@ static int i915_suspend(device_t kdev)
 	DRM_DEBUG_KMS("starting suspend\n");
 	error = i915_drm_freeze(dev);
 	if (error)
-		return (-error);
+		return -error;
 
 	error = bus_generic_suspend(kdev);
 	DRM_DEBUG_KMS("finished suspend %d\n", error);
@@ -429,8 +521,8 @@ static int i915_resume(device_t kdev)
 #endif
 
 	ret = i915_drm_thaw(dev);
-	if (ret != 0)
-		return (-ret);
+	if (ret)
+		return -ret;
 
 	drm_kms_helper_poll_enable(dev);
 	ret = bus_generic_resume(kdev);
@@ -438,321 +530,6 @@ static int i915_resume(device_t kdev)
 	return (ret);
 }
 
-static int
-i915_probe(device_t kdev)
-{
-	const struct intel_device_info *info;
-	int error;
-
-	error = drm_probe_helper(kdev, i915_pciidlist);
-	if (error != 0)
-		return (-error);
-	info = i915_get_device_id(pci_get_device(kdev));
-	if (info == NULL)
-		return (ENXIO);
-	return (0);
-}
-
-int i915_modeset;
-
-static int
-i915_attach(device_t kdev)
-{
-
-	if (i915_modeset == 1)
-		i915_driver_info.driver_features |= DRIVER_MODESET;
-	return (-drm_attach_helper(kdev, i915_pciidlist, &i915_driver_info));
-}
-
-static struct fb_info *
-i915_fb_helper_getinfo(device_t kdev)
-{
-	struct intel_fbdev *ifbdev;
-	drm_i915_private_t *dev_priv;
-	struct drm_device *dev;
-	struct fb_info *info;
-
-	dev = device_get_softc(kdev);
-	dev_priv = dev->dev_private;
-	ifbdev = dev_priv->fbdev;
-	if (ifbdev == NULL)
-		return (NULL);
-
-	info = ifbdev->helper.fbdev;
-
-	return (info);
-}
-
-const struct intel_device_info *
-i915_get_device_id(int device)
-{
-	const struct intel_gfx_device_id *did;
-
-	for (did = &pciidlist[0]; did->device != 0; did++) {
-		if (did->device != device)
-			continue;
-		if (did->info->not_supported && !i915_enable_unsupported)
-			return (NULL);
-		return (did->info);
-	}
-	return (NULL);
-}
-
-static device_method_t i915_methods[] = {
-	/* Device interface */
-	DEVMETHOD(device_probe,		i915_probe),
-	DEVMETHOD(device_attach,	i915_attach),
-	DEVMETHOD(device_suspend,	i915_suspend),
-	DEVMETHOD(device_resume,	i915_resume),
-	DEVMETHOD(device_detach,	drm_generic_detach),
-
-	/* Framebuffer service methods */
-	DEVMETHOD(fb_getinfo,		i915_fb_helper_getinfo),
-
-	DEVMETHOD_END
-};
-
-static driver_t i915_driver = {
-	"drmn",
-	i915_methods,
-	sizeof(struct drm_device)
-};
-
-extern devclass_t drm_devclass;
-DRIVER_MODULE_ORDERED(i915kms, vgapci, i915_driver, drm_devclass, 0, 0,
-    SI_ORDER_ANY);
-MODULE_DEPEND(i915kms, drmn, 1, 1, 1);
-MODULE_DEPEND(i915kms, agp, 1, 1, 1);
-MODULE_DEPEND(i915kms, iicbus, 1, 1, 1);
-MODULE_DEPEND(i915kms, iic, 1, 1, 1);
-MODULE_DEPEND(i915kms, iicbb, 1, 1, 1);
-
-int intel_iommu_enabled = 0;
-TUNABLE_INT("drm.i915.intel_iommu_enabled", &intel_iommu_enabled);
-int intel_iommu_gfx_mapped = 0;
-TUNABLE_INT("drm.i915.intel_iommu_gfx_mapped", &intel_iommu_gfx_mapped);
-
-int i915_prefault_disable;
-TUNABLE_INT("drm.i915.prefault_disable", &i915_prefault_disable);
-int i915_semaphores = -1;
-TUNABLE_INT("drm.i915.semaphores", &i915_semaphores);
-static int i915_try_reset = 1;
-TUNABLE_INT("drm.i915.try_reset", &i915_try_reset);
-unsigned int i915_lvds_downclock = 0;
-TUNABLE_INT("drm.i915.lvds_downclock", &i915_lvds_downclock);
-int i915_vbt_sdvo_panel_type = -1;
-TUNABLE_INT("drm.i915.vbt_sdvo_panel_type", &i915_vbt_sdvo_panel_type);
-unsigned int i915_powersave = 1;
-TUNABLE_INT("drm.i915.powersave", &i915_powersave);
-int i915_enable_fbc = 0;
-TUNABLE_INT("drm.i915.enable_fbc", &i915_enable_fbc);
-int i915_enable_rc6 = 0;
-TUNABLE_INT("drm.i915.enable_rc6", &i915_enable_rc6);
-int i915_lvds_channel_mode;
-TUNABLE_INT("drm.i915.lvds_channel_mode", &i915_lvds_channel_mode);
-int i915_panel_use_ssc = -1;
-TUNABLE_INT("drm.i915.panel_use_ssc", &i915_panel_use_ssc);
-int i915_panel_ignore_lid = 0;
-TUNABLE_INT("drm.i915.panel_ignore_lid", &i915_panel_ignore_lid);
-int i915_panel_invert_brightness;
-TUNABLE_INT("drm.i915.panel_invert_brightness", &i915_panel_invert_brightness);
-int i915_modeset = 1;
-TUNABLE_INT("drm.i915.modeset", &i915_modeset);
-int i915_enable_ppgtt = -1;
-TUNABLE_INT("drm.i915.enable_ppgtt", &i915_enable_ppgtt);
-int i915_enable_hangcheck = 1;
-TUNABLE_INT("drm.i915.enable_hangcheck", &i915_enable_hangcheck);
-TUNABLE_INT("drm.i915.enable_unsupported", &i915_enable_unsupported);
-
-#define	PCI_VENDOR_INTEL		0x8086
-#define INTEL_PCH_DEVICE_ID_MASK	0xff00
-#define INTEL_PCH_IBX_DEVICE_ID_TYPE	0x3b00
-#define INTEL_PCH_CPT_DEVICE_ID_TYPE	0x1c00
-#define INTEL_PCH_PPT_DEVICE_ID_TYPE	0x1e00
-#define INTEL_PCH_LPT_DEVICE_ID_TYPE	0x8c00
-
-void intel_detect_pch(struct drm_device *dev)
-{
-	struct drm_i915_private *dev_priv;
-	device_t pch;
-	uint32_t id;
-
-	dev_priv = dev->dev_private;
-	pch = pci_find_class(PCIC_BRIDGE, PCIS_BRIDGE_ISA);
-	if (pch != NULL && pci_get_vendor(pch) == PCI_VENDOR_INTEL) {
-		id = pci_get_device(pch) & INTEL_PCH_DEVICE_ID_MASK;
-		if (id == INTEL_PCH_IBX_DEVICE_ID_TYPE) {
-			dev_priv->pch_type = PCH_IBX;
-			dev_priv->num_pch_pll = 2;
-			DRM_DEBUG_KMS("Found Ibex Peak PCH\n");
-		} else if (id == INTEL_PCH_CPT_DEVICE_ID_TYPE) {
-			dev_priv->pch_type = PCH_CPT;
-			dev_priv->num_pch_pll = 2;
-			DRM_DEBUG_KMS("Found CougarPoint PCH\n");
-		} else if (id == INTEL_PCH_PPT_DEVICE_ID_TYPE) {
-			/* PantherPoint is CPT compatible */
-			dev_priv->pch_type = PCH_CPT;
-			dev_priv->num_pch_pll = 2;
-			DRM_DEBUG_KMS("Found PatherPoint PCH\n");
-		} else if (id == INTEL_PCH_LPT_DEVICE_ID_TYPE) {
-			dev_priv->pch_type = PCH_LPT;
-			dev_priv->num_pch_pll = 0;
-			DRM_DEBUG_KMS("Found LynxPoint PCH\n");
-		} else
-			DRM_DEBUG_KMS("No PCH detected\n");
-		KASSERT(dev_priv->num_pch_pll <= I915_NUM_PLLS,
-		    ("num_pch_pll %d\n", dev_priv->num_pch_pll));
-	} else
-		DRM_DEBUG_KMS("No Intel PCI-ISA bridge found\n");
-}
-
-bool i915_semaphore_is_enabled(struct drm_device *dev)
-{
-	if (INTEL_INFO(dev)->gen < 6)
-		return 0;
-
-	if (i915_semaphores >= 0)
-		return i915_semaphores;
-
-	/* Enable semaphores on SNB when IO remapping is off */
-	if (INTEL_INFO(dev)->gen == 6 && intel_iommu_gfx_mapped)
-		return false;
-
-	return 1;
-}
-
-void
-__gen6_gt_force_wake_get(struct drm_i915_private *dev_priv)
-{
-	int count;
-
-	count = 0;
-	while (count++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_ACK) & 1))
-		DELAY(10);
-
-	I915_WRITE_NOTRACE(FORCEWAKE, 1);
-	POSTING_READ(FORCEWAKE);
-
-	count = 0;
-	while (count++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_ACK) & 1) == 0)
-		DELAY(10);
-}
-
-void
-__gen6_gt_force_wake_mt_get(struct drm_i915_private *dev_priv)
-{
-	int count;
-
-	count = 0;
-	while (count++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_MT_ACK) & 1))
-		DELAY(10);
-
-	I915_WRITE_NOTRACE(FORCEWAKE_MT, _MASKED_BIT_ENABLE(1));
-	POSTING_READ(FORCEWAKE_MT);
-
-	count = 0;
-	while (count++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_MT_ACK) & 1) == 0)
-		DELAY(10);
-}
-
-void
-gen6_gt_force_wake_get(struct drm_i915_private *dev_priv)
-{
-
-	mtx_lock(&dev_priv->gt_lock);
-	if (dev_priv->forcewake_count++ == 0)
-		dev_priv->display.force_wake_get(dev_priv);
-	mtx_unlock(&dev_priv->gt_lock);
-}
-
-static void
-gen6_gt_check_fifodbg(struct drm_i915_private *dev_priv)
-{
-	u32 gtfifodbg;
-
-	gtfifodbg = I915_READ_NOTRACE(GTFIFODBG);
-	if ((gtfifodbg & GT_FIFO_CPU_ERROR_MASK) != 0) {
-		printf("MMIO read or write has been dropped %x\n", gtfifodbg);
-		I915_WRITE_NOTRACE(GTFIFODBG, GT_FIFO_CPU_ERROR_MASK);
-	}
-}
-
-void
-__gen6_gt_force_wake_put(struct drm_i915_private *dev_priv)
-{
-
-	I915_WRITE_NOTRACE(FORCEWAKE, 0);
-	/* The below doubles as a POSTING_READ */
-	gen6_gt_check_fifodbg(dev_priv);
-}
-
-void
-__gen6_gt_force_wake_mt_put(struct drm_i915_private *dev_priv)
-{
-
-	I915_WRITE_NOTRACE(FORCEWAKE_MT, _MASKED_BIT_DISABLE(1));
-	/* The below doubles as a POSTING_READ */
-	gen6_gt_check_fifodbg(dev_priv);
-}
-
-void
-gen6_gt_force_wake_put(struct drm_i915_private *dev_priv)
-{
-
-	mtx_lock(&dev_priv->gt_lock);
-	if (--dev_priv->forcewake_count == 0)
- 		dev_priv->display.force_wake_put(dev_priv);
-	mtx_unlock(&dev_priv->gt_lock);
-}
-
-int
-__gen6_gt_wait_for_fifo(struct drm_i915_private *dev_priv)
-{
-	int ret = 0;
-
-	if (dev_priv->gt_fifo_count < GT_FIFO_NUM_RESERVED_ENTRIES) {
-		int loop = 500;
-		u32 fifo = I915_READ_NOTRACE(GT_FIFO_FREE_ENTRIES);
-		while (fifo <= GT_FIFO_NUM_RESERVED_ENTRIES && loop--) {
-			DELAY(10);
-			fifo = I915_READ_NOTRACE(GT_FIFO_FREE_ENTRIES);
-		}
-		if (loop < 0 && fifo <= GT_FIFO_NUM_RESERVED_ENTRIES) {
-			printf("%s loop\n", __func__);
-			++ret;
-		}
-		dev_priv->gt_fifo_count = fifo;
-	}
-	dev_priv->gt_fifo_count--;
-
-	return (ret);
-}
-
-void vlv_force_wake_get(struct drm_i915_private *dev_priv)
-{
-	int count;
-
-	count = 0;
-
-	/* Already awake? */
-	if ((I915_READ(0x130094) & 0xa1) == 0xa1)
-		return;
-
-	I915_WRITE_NOTRACE(FORCEWAKE_VLV, 0xffffffff);
-	POSTING_READ(FORCEWAKE_VLV);
-
-	count = 0;
-	while (count++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_ACK_VLV) & 1) == 0)
-		DELAY(10);
-}
-
-void vlv_force_wake_put(struct drm_i915_private *dev_priv)
-{
-	I915_WRITE_NOTRACE(FORCEWAKE_VLV, 0xffff0000);
-	/* FIXME: confirm VLV behavior with Punit folks */
-	POSTING_READ(FORCEWAKE_VLV);
-}
-
 static int i8xx_do_reset(struct drm_device *dev)
 {
 	struct drm_i915_private *dev_priv = dev->dev_private;
@@ -808,8 +585,8 @@ static int i965_do_reset(struct drm_device *dev)
 	 */
 	gdrst = pci_read_config(dev->dev, I965_GDRST, 1);
 	pci_write_config(dev->dev, I965_GDRST,
-	    gdrst | GRDOM_RENDER | GRDOM_RESET_ENABLE, 1);
-
+			      gdrst | GRDOM_RENDER |
+			      GRDOM_RESET_ENABLE, 1);
 	ret =  wait_for(i965_reset_complete(dev), 500);
 	if (ret)
 		return ret;
@@ -817,7 +594,8 @@ static int i965_do_reset(struct drm_device *dev)
 	/* We can't reset render&media without also resetting display ... */
 	gdrst = pci_read_config(dev->dev, I965_GDRST, 1);
 	pci_write_config(dev->dev, I965_GDRST,
-			 gdrst | GRDOM_MEDIA | GRDOM_RESET_ENABLE, 1);
+			      gdrst | GRDOM_MEDIA |
+			      GRDOM_RESET_ENABLE, 1);
 
 	return wait_for(i965_reset_complete(dev), 500);
 }
@@ -866,8 +644,8 @@ static int gen6_do_reset(struct drm_device *dev)
 	    500, 0, "915rst");
 
 	/* If reset with a user forcewake, try to restore, otherwise turn it off */
- 	if (dev_priv->forcewake_count)
- 		dev_priv->display.force_wake_get(dev_priv);
+	if (dev_priv->forcewake_count)
+		dev_priv->display.force_wake_get(dev_priv);
 	else
 		dev_priv->display.force_wake_put(dev_priv);
 
@@ -875,7 +653,7 @@ static int gen6_do_reset(struct drm_device *dev)
 	dev_priv->gt_fifo_count = I915_READ_NOTRACE(GT_FIFO_FREE_ENTRIES);
 
 	mtx_unlock(&dev_priv->gt_lock);
-	return (ret);
+	return ret;
 }
 
 int intel_gpu_reset(struct drm_device *dev)
@@ -990,6 +768,7 @@ int i915_reset(struct drm_device *dev)
 		 * least the rps/rc6/emon init done within modeset_init_hw. For
 		 * some unknown reason, this blows up my ilk, so don't.
 		 */
+
 		DRM_UNLOCK(dev);
 
 		if (drm_core_check_feature(dev, DRIVER_MODESET))
@@ -1004,12 +783,226 @@ int i915_reset(struct drm_device *dev)
 	return 0;
 }
 
+const struct intel_device_info *
+i915_get_device_id(int device)
+{
+	const struct intel_gfx_device_id *did;
+
+	for (did = &i915_infolist[0]; did->device != 0; did++) {
+		if (did->device != device)
+			continue;
+		if (did->info->not_supported && !i915_enable_unsupported)
+			return (NULL);
+		return (did->info);
+	}
+	return (NULL);
+}
+
+static int i915_probe(device_t kdev)
+{
+	const struct intel_device_info *intel_info =
+		i915_get_device_id(pci_get_device(kdev));
+
+	if (intel_info == NULL)
+		return (ENXIO);
+
+	return -drm_probe_helper(kdev, i915_pciidlist);
+}
+
+static int i915_attach(device_t kdev)
+{
+
+	if (i915_modeset == 1)
+		i915_driver_info.driver_features |= DRIVER_MODESET;
+	return (-drm_attach_helper(kdev, i915_pciidlist, &i915_driver_info));
+}
+
+static struct fb_info *
+i915_fb_helper_getinfo(device_t kdev)
+{
+	struct intel_fbdev *ifbdev;
+	drm_i915_private_t *dev_priv;
+	struct drm_device *dev;
+	struct fb_info *info;
+
+	dev = device_get_softc(kdev);
+	dev_priv = dev->dev_private;
+	ifbdev = dev_priv->fbdev;
+	if (ifbdev == NULL)
+		return (NULL);
+
+	info = ifbdev->helper.fbdev;
+
+	return (info);
+}
+
+static device_method_t i915_methods[] = {
+	/* Device interface */
+	DEVMETHOD(device_probe,		i915_probe),
+	DEVMETHOD(device_attach,	i915_attach),
+	DEVMETHOD(device_suspend,	i915_suspend),
+	DEVMETHOD(device_resume,	i915_resume),
+	DEVMETHOD(device_detach,	drm_generic_detach),
+
+	/* Framebuffer service methods */
+	DEVMETHOD(fb_getinfo,		i915_fb_helper_getinfo),
+
+	DEVMETHOD_END
+};
+
+static driver_t i915_driver = {
+	"drmn",
+	i915_methods,
+	sizeof(struct drm_device)
+};
+
+extern devclass_t drm_devclass;
+DRIVER_MODULE_ORDERED(i915kms, vgapci, i915_driver, drm_devclass, 0, 0,
+    SI_ORDER_ANY);
+MODULE_DEPEND(i915kms, drmn, 1, 1, 1);
+MODULE_DEPEND(i915kms, agp, 1, 1, 1);
+MODULE_DEPEND(i915kms, iicbus, 1, 1, 1);
+MODULE_DEPEND(i915kms, iic, 1, 1, 1);
+MODULE_DEPEND(i915kms, iicbb, 1, 1, 1);
+
 /* We give fast paths for the really cool registers */
 #define NEEDS_FORCE_WAKE(dev_priv, reg) \
-       (((dev_priv)->info->gen >= 6) && \
-        ((reg) < 0x40000) &&            \
-        ((reg) != FORCEWAKE)) && \
-       (!IS_VALLEYVIEW((dev_priv)->dev))
+	(((dev_priv)->info->gen >= 6) && \
+	 ((reg) < 0x40000) &&            \
+	 ((reg) != FORCEWAKE)) && \
+	(!IS_VALLEYVIEW((dev_priv)->dev))
+
+void
+__gen6_gt_force_wake_get(struct drm_i915_private *dev_priv)
+{
+	int count;
+
+	count = 0;
+	while (count++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_ACK) & 1))
+		DELAY(10);
+
+	I915_WRITE_NOTRACE(FORCEWAKE, 1);
+	POSTING_READ(FORCEWAKE);
+
+	count = 0;
+	while (count++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_ACK) & 1) == 0)
+		DELAY(10);
+}
+
+void
+__gen6_gt_force_wake_mt_get(struct drm_i915_private *dev_priv)
+{
+	int count;
+
+	count = 0;
+	while (count++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_MT_ACK) & 1))
+		DELAY(10);
+
+	I915_WRITE_NOTRACE(FORCEWAKE_MT, _MASKED_BIT_ENABLE(1));
+	POSTING_READ(FORCEWAKE_MT);
+
+	count = 0;
+	while (count++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_MT_ACK) & 1) == 0)
+		DELAY(10);
+}
+
+void
+gen6_gt_force_wake_get(struct drm_i915_private *dev_priv)
+{
+
+	mtx_lock(&dev_priv->gt_lock);
+	if (dev_priv->forcewake_count++ == 0)
+		dev_priv->display.force_wake_get(dev_priv);
+	mtx_unlock(&dev_priv->gt_lock);
+}
+
+static void
+gen6_gt_check_fifodbg(struct drm_i915_private *dev_priv)
+{
+	u32 gtfifodbg;
+
+	gtfifodbg = I915_READ_NOTRACE(GTFIFODBG);
+	if ((gtfifodbg & GT_FIFO_CPU_ERROR_MASK) != 0) {
+		printf("MMIO read or write has been dropped %x\n", gtfifodbg);
+		I915_WRITE_NOTRACE(GTFIFODBG, GT_FIFO_CPU_ERROR_MASK);
+	}
+}
+
+void
+__gen6_gt_force_wake_put(struct drm_i915_private *dev_priv)
+{
+
+	I915_WRITE_NOTRACE(FORCEWAKE, 0);
+	/* The below doubles as a POSTING_READ */
+	gen6_gt_check_fifodbg(dev_priv);
+}
+
+void
+__gen6_gt_force_wake_mt_put(struct drm_i915_private *dev_priv)
+{
+
+	I915_WRITE_NOTRACE(FORCEWAKE_MT, _MASKED_BIT_DISABLE(1));
+	/* The below doubles as a POSTING_READ */
+	gen6_gt_check_fifodbg(dev_priv);
+}
+
+void
+gen6_gt_force_wake_put(struct drm_i915_private *dev_priv)
+{
+
+	mtx_lock(&dev_priv->gt_lock);
+	if (--dev_priv->forcewake_count == 0)
+ 		dev_priv->display.force_wake_put(dev_priv);
+	mtx_unlock(&dev_priv->gt_lock);
+}
+
+int
+__gen6_gt_wait_for_fifo(struct drm_i915_private *dev_priv)
+{
+	int ret = 0;
+
+	if (dev_priv->gt_fifo_count < GT_FIFO_NUM_RESERVED_ENTRIES) {
+		int loop = 500;
+		u32 fifo = I915_READ_NOTRACE(GT_FIFO_FREE_ENTRIES);
+		while (fifo <= GT_FIFO_NUM_RESERVED_ENTRIES && loop--) {
+			DELAY(10);
+			fifo = I915_READ_NOTRACE(GT_FIFO_FREE_ENTRIES);
+		}
+		if (loop < 0 && fifo <= GT_FIFO_NUM_RESERVED_ENTRIES) {
+			printf("%s loop\n", __func__);
+			++ret;
+		}
+		dev_priv->gt_fifo_count = fifo;
+	}
+	dev_priv->gt_fifo_count--;
+
+	return (ret);
+}
+
+void vlv_force_wake_get(struct drm_i915_private *dev_priv)
+{
+	int count;
+
+	count = 0;
+
+	/* Already awake? */
+	if ((I915_READ(0x130094) & 0xa1) == 0xa1)
+		return;
+
+	I915_WRITE_NOTRACE(FORCEWAKE_VLV, 0xffffffff);
+	POSTING_READ(FORCEWAKE_VLV);
+
+	count = 0;
+	while (count++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_ACK_VLV) & 1) == 0)
+		DELAY(10);
+}
+
+void vlv_force_wake_put(struct drm_i915_private *dev_priv)
+{
+	I915_WRITE_NOTRACE(FORCEWAKE_VLV, 0xffff0000);
+	/* FIXME: confirm VLV behavior with Punit folks */
+	POSTING_READ(FORCEWAKE_VLV);
+}
 
 #define __i915_read(x, y) \
 u##x i915_read##x(struct drm_i915_private *dev_priv, u32 reg) { \
@@ -1018,12 +1011,12 @@ u##x i915_read##x(struct drm_i915_private *dev_priv, u32 reg) { \
 		mtx_lock(&dev_priv->gt_lock); \
 		if (dev_priv->forcewake_count == 0) \
 			dev_priv->display.force_wake_get(dev_priv); \
-		val = DRM_READ##y(dev_priv->mmio_map, reg);	\
+		val = DRM_READ##x(dev_priv->mmio_map, reg); \
 		if (dev_priv->forcewake_count == 0) \
 			dev_priv->display.force_wake_put(dev_priv); \
 		mtx_unlock(&dev_priv->gt_lock); \
 	} else { \
-		val = DRM_READ##y(dev_priv->mmio_map, reg);	\
+		val = DRM_READ##x(dev_priv->mmio_map, reg); \
 	} \
 	trace_i915_reg_rw(false, reg, val, sizeof(val)); \
 	return val; \
@@ -1042,7 +1035,7 @@ void i915_write##x(struct drm_i915_private *dev_priv, u32 reg, u##x val) { \
 	if (NEEDS_FORCE_WAKE((dev_priv), (reg))) { \
 		__fifo_ret = __gen6_gt_wait_for_fifo(dev_priv); \
 	} \
-	DRM_WRITE##y(dev_priv->mmio_map, reg, val); \
+	DRM_WRITE##x(dev_priv->mmio_map, reg, val); \
 	if (__predict_false(__fifo_ret)) { \
 		gen6_gt_check_fifodbg(dev_priv); \
 	} \