2 files changed, 47 insertions, 0 deletions

diff --git a/sys/dev/gpio/gpio_if.m b/sys/dev/gpio/gpio_if.m
index 6306f336221a..70838cd1042b 100644
--- a/sys/dev/gpio/gpio_if.m
+++ b/sys/dev/gpio/gpio_if.m
@@ -40,6 +40,13 @@ CODE {
 	}
 
 	static int
+	gpio_default_nosupport(void)
+	{
+
+		return (EOPNOTSUPP);
+	}
+
+	static int
 	gpio_default_map_gpios(device_t bus, phandle_t dev,
 	    phandle_t gparent, int gcells, pcell_t *gpios, uint32_t *pin,
 	    uint32_t *flags)
@@ -151,3 +158,31 @@ METHOD int map_gpios {
         uint32_t *pin;
         uint32_t *flags;
 } DEFAULT gpio_default_map_gpios;
+
+#
+# Simultaneously read and/or change up to 32 adjacent pins.
+# If the device cannot change the pins simultaneously, returns EOPNOTSUPP.
+#
+# More details about using this interface can be found in sys/gpio.h
+#
+METHOD int pin_access_32 {
+	device_t dev;
+	uint32_t first_pin;
+	uint32_t clear_pins;
+	uint32_t change_pins;
+	uint32_t *orig_pins;
+} DEFAULT gpio_default_nosupport;
+
+#
+# Simultaneously configure up to 32 adjacent pins.
+# This is intended to change the configuration of all the pins simultaneously,
+# but unlike pin_access_32, this will not fail if the hardware can't do so.
+#
+# More details about using this interface can be found in sys/gpio.h
+#
+METHOD int pin_config_32 {
+	device_t dev;
+	uint32_t first_pin;
+	uint32_t num_pins;
+	uint32_t *pin_flags;
+} DEFAULT gpio_default_nosupport;
diff --git a/sys/dev/gpio/gpioc.c b/sys/dev/gpio/gpioc.c
index a5a9d8164781..36705ba67a8a 100644
--- a/sys/dev/gpio/gpioc.c
+++ b/sys/dev/gpio/gpioc.c
@@ -125,6 +125,8 @@ gpioc_ioctl(struct cdev *cdev, u_long cmd, caddr_t arg, int fflag,
 	struct gpioc_softc *sc = cdev->si_drv1;
 	struct gpio_pin pin;
 	struct gpio_req req;
+	struct gpio_access_32 *a32;
+	struct gpio_config_32 *c32;
 	uint32_t caps;
 
 	bus = GPIO_GET_BUS(sc->sc_pdev);
@@ -185,6 +187,16 @@ gpioc_ioctl(struct cdev *cdev, u_long cmd, caddr_t arg, int fflag,
 			res = GPIOBUS_PIN_SETNAME(bus, pin.gp_pin,
 			    pin.gp_name);
 			break;
+		case GPIOACCESS32:
+			a32 = (struct gpio_access_32 *)arg;
+			res = GPIO_PIN_ACCESS_32(sc->sc_pdev, a32->first_pin,
+			    a32->clear_pins, a32->orig_pins, &a32->orig_pins);
+			break;
+		case GPIOCONFIG32:
+			c32 = (struct gpio_config_32 *)arg;
+			res = GPIO_PIN_CONFIG_32(sc->sc_pdev, c32->first_pin,
+			    c32->num_pins, c32->pin_flags);
+			break;
 		default:
 			return (ENOTTY);
 			break;