aboutsummaryrefslogtreecommitdiff
path: root/sys/dev/le
diff options
context:
space:
mode:
authorMarius Strobl <marius@FreeBSD.org>2007-12-30 00:23:38 +0000
committerMarius Strobl <marius@FreeBSD.org>2007-12-30 00:23:38 +0000
commitd2d9ab366b2697c3e7f526c1e31140440d114e7f (patch)
treefb2a427930b4d246533f6f9c736cef387b064ea0 /sys/dev/le
parent9336e0699bda8a301cd2bfa37106b6ec5e32012e (diff)
Notes
Diffstat (limited to 'sys/dev/le')
-rw-r--r--sys/dev/le/am7990.c7
-rw-r--r--sys/dev/le/am79900.c7
2 files changed, 6 insertions, 8 deletions
diff --git a/sys/dev/le/am7990.c b/sys/dev/le/am7990.c
index 10a809d97d10..56a07d5330d2 100644
--- a/sys/dev/le/am7990.c
+++ b/sys/dev/le/am7990.c
@@ -421,10 +421,9 @@ am7990_intr(void *arg)
* Clear interrupt source flags and turn off interrupts. If we
* don't clear these flags before processing their sources we
* could completely miss some interrupt events as the NIC can
- * change these flags while we're in this handler. We turn off
- * interrupts so we don't get another RX interrupt while still
- * processing the previous one in ifp->if_input() with the
- * driver lock dropped.
+ * change these flags while we're in this handler. We toggle
+ * the interrupt enable bit in order to keep receiving them
+ * (some chips work without this, some don't).
*/
(*sc->sc_wrcsr)(sc, LE_CSR0, isr & ~(LE_C0_INEA | LE_C0_TDMD |
LE_C0_STOP | LE_C0_STRT | LE_C0_INIT));
diff --git a/sys/dev/le/am79900.c b/sys/dev/le/am79900.c
index abaed2dc3b64..5129eb60f7da 100644
--- a/sys/dev/le/am79900.c
+++ b/sys/dev/le/am79900.c
@@ -459,10 +459,9 @@ am79900_intr(void *arg)
* Clear interrupt source flags and turn off interrupts. If we
* don't clear these flags before processing their sources we
* could completely miss some interrupt events as the NIC can
- * change these flags while we're in this handler. We turn off
- * interrupts so we don't get another RX interrupt while still
- * processing the previous one in ifp->if_input() with the
- * driver lock dropped.
+ * change these flags while we're in this handler. We toggle
+ * the interrupt enable bit in order to keep receiving them
+ * (some chips work without this, some don't).
*/
(*sc->sc_wrcsr)(sc, LE_CSR0, isr & ~(LE_C0_INEA | LE_C0_TDMD |
LE_C0_STOP | LE_C0_STRT | LE_C0_INIT));