2 files changed, 131 insertions, 249 deletions

diff --git a/sys/dev/tl/if_tl.c b/sys/dev/tl/if_tl.c
index a256552c0ab9..b7f41001cf72 100644
--- a/sys/dev/tl/if_tl.c
+++ b/sys/dev/tl/if_tl.c
@@ -203,6 +203,7 @@ __FBSDID("$FreeBSD$");
 #include <sys/rman.h>
 
 #include <dev/mii/mii.h>
+#include <dev/mii/mii_bitbang.h>
 #include <dev/mii/miivar.h>
 
 #include <dev/pci/pcireg.h>
@@ -228,7 +229,7 @@ MODULE_DEPEND(tl, miibus, 1, 1, 1);
  * Various supported device vendors/types and their names.
  */
 
-static struct tl_type tl_devs[] = {
+static const struct tl_type const tl_devs[] = {
 	{ TI_VENDORID,	TI_DEVICEID_THUNDERLAN,
 		"Texas Instruments ThunderLAN" },
 	{ COMPAQ_VENDORID, COMPAQ_DEVICEID_NETEL_10,
@@ -290,10 +291,6 @@ static u_int8_t tl_eeprom_putbyte(struct tl_softc *, int);
 static u_int8_t	tl_eeprom_getbyte(struct tl_softc *, int, u_int8_t *);
 static int tl_read_eeprom(struct tl_softc *, caddr_t, int, int);
 
-static void tl_mii_sync(struct tl_softc *);
-static void tl_mii_send(struct tl_softc *, u_int32_t, int);
-static int tl_mii_readreg(struct tl_softc *, struct tl_mii_frame *);
-static int tl_mii_writereg(struct tl_softc *, struct tl_mii_frame *);
 static int tl_miibus_readreg(device_t, int, int);
 static int tl_miibus_writereg(device_t, int, int, int);
 static void tl_miibus_statchg(device_t);
@@ -318,6 +315,24 @@ static void tl_dio_clrbit(struct tl_softc *, int, int);
 static void tl_dio_setbit16(struct tl_softc *, int, int);
 static void tl_dio_clrbit16(struct tl_softc *, int, int);
 
+/*
+ * MII bit-bang glue
+ */
+static uint32_t tl_mii_bitbang_read(device_t);
+static void tl_mii_bitbang_write(device_t, uint32_t);
+
+static const struct mii_bitbang_ops tl_mii_bitbang_ops = {
+	tl_mii_bitbang_read,
+	tl_mii_bitbang_write,
+	{
+		TL_SIO_MDATA,	/* MII_BIT_MDO */
+		TL_SIO_MDATA,	/* MII_BIT_MDI */
+		TL_SIO_MCLK,	/* MII_BIT_MDC */
+		TL_SIO_MTXEN,	/* MII_BIT_DIR_HOST_PHY */
+		0,		/* MII_BIT_DIR_PHY_HOST */
+	}
+};
+
 #ifdef TL_USEIOSPACE
 #define TL_RES		SYS_RES_IOPORT
 #define TL_RID		TL_PCI_LOIO
@@ -360,7 +375,12 @@ static u_int8_t tl_dio_read8(sc, reg)
 	struct tl_softc		*sc;
 	int			reg;
 {
+
+	CSR_BARRIER(sc, TL_DIO_ADDR, 2,
+		BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
 	CSR_WRITE_2(sc, TL_DIO_ADDR, reg);
+	CSR_BARRIER(sc, TL_DIO_ADDR, 2,
+		BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
 	return(CSR_READ_1(sc, TL_DIO_DATA + (reg & 3)));
 }
 
@@ -368,7 +388,12 @@ static u_int16_t tl_dio_read16(sc, reg)
 	struct tl_softc		*sc;
 	int			reg;
 {
+
+	CSR_BARRIER(sc, TL_DIO_ADDR, 2,
+		BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
 	CSR_WRITE_2(sc, TL_DIO_ADDR, reg);
+	CSR_BARRIER(sc, TL_DIO_ADDR, 2,
+		BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
 	return(CSR_READ_2(sc, TL_DIO_DATA + (reg & 3)));
 }
 
@@ -376,7 +401,12 @@ static u_int32_t tl_dio_read32(sc, reg)
 	struct tl_softc		*sc;
 	int			reg;
 {
+
+	CSR_BARRIER(sc, TL_DIO_ADDR, 2,
+		BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
 	CSR_WRITE_2(sc, TL_DIO_ADDR, reg);
+	CSR_BARRIER(sc, TL_DIO_ADDR, 2,
+		BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
 	return(CSR_READ_4(sc, TL_DIO_DATA + (reg & 3)));
 }
 
@@ -385,9 +415,13 @@ static void tl_dio_write8(sc, reg, val)
 	int			reg;
 	int			val;
 {
+
+	CSR_BARRIER(sc, TL_DIO_ADDR, 2,
+		BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
 	CSR_WRITE_2(sc, TL_DIO_ADDR, reg);
+	CSR_BARRIER(sc, TL_DIO_ADDR, 2,
+		BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
 	CSR_WRITE_1(sc, TL_DIO_DATA + (reg & 3), val);
-	return;
 }
 
 static void tl_dio_write16(sc, reg, val)
@@ -395,9 +429,13 @@ static void tl_dio_write16(sc, reg, val)
 	int			reg;
 	int			val;
 {
+
+	CSR_BARRIER(sc, TL_DIO_ADDR, 2,
+		BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
 	CSR_WRITE_2(sc, TL_DIO_ADDR, reg);
+	CSR_BARRIER(sc, TL_DIO_ADDR, 2,
+		BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
 	CSR_WRITE_2(sc, TL_DIO_DATA + (reg & 3), val);
-	return;
 }
 
 static void tl_dio_write32(sc, reg, val)
@@ -405,9 +443,13 @@ static void tl_dio_write32(sc, reg, val)
 	int			reg;
 	int			val;
 {
+
+	CSR_BARRIER(sc, TL_DIO_ADDR, 2,
+		BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
 	CSR_WRITE_2(sc, TL_DIO_ADDR, reg);
+	CSR_BARRIER(sc, TL_DIO_ADDR, 2,
+		BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
 	CSR_WRITE_4(sc, TL_DIO_DATA + (reg & 3), val);
-	return;
 }
 
 static void
@@ -418,12 +460,16 @@ tl_dio_setbit(sc, reg, bit)
 {
 	u_int8_t			f;
 
+	CSR_BARRIER(sc, TL_DIO_ADDR, 2,
+		BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
 	CSR_WRITE_2(sc, TL_DIO_ADDR, reg);
+	CSR_BARRIER(sc, TL_DIO_ADDR, 2,
+		BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
 	f = CSR_READ_1(sc, TL_DIO_DATA + (reg & 3));
 	f |= bit;
+	CSR_BARRIER(sc, TL_DIO_DATA + (reg & 3), 1,
+		BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
 	CSR_WRITE_1(sc, TL_DIO_DATA + (reg & 3), f);
-
-	return;
 }
 
 static void
@@ -434,12 +480,16 @@ tl_dio_clrbit(sc, reg, bit)
 {
 	u_int8_t			f;
 
+	CSR_BARRIER(sc, TL_DIO_ADDR, 2,
+		BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
 	CSR_WRITE_2(sc, TL_DIO_ADDR, reg);
+	CSR_BARRIER(sc, TL_DIO_ADDR, 2,
+		BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
 	f = CSR_READ_1(sc, TL_DIO_DATA + (reg & 3));
 	f &= ~bit;
+	CSR_BARRIER(sc, TL_DIO_DATA + (reg & 3), 1,
+		BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
 	CSR_WRITE_1(sc, TL_DIO_DATA + (reg & 3), f);
-
-	return;
 }
 
 static void tl_dio_setbit16(sc, reg, bit)
@@ -449,12 +499,16 @@ static void tl_dio_setbit16(sc, reg, bit)
 {
 	u_int16_t			f;
 
+	CSR_BARRIER(sc, TL_DIO_ADDR, 2,
+		BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
 	CSR_WRITE_2(sc, TL_DIO_ADDR, reg);
+	CSR_BARRIER(sc, TL_DIO_ADDR, 2,
+		BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
 	f = CSR_READ_2(sc, TL_DIO_DATA + (reg & 3));
 	f |= bit;
+	CSR_BARRIER(sc, TL_DIO_DATA + (reg & 3), 2,
+		BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
 	CSR_WRITE_2(sc, TL_DIO_DATA + (reg & 3), f);
-
-	return;
 }
 
 static void tl_dio_clrbit16(sc, reg, bit)
@@ -464,12 +518,16 @@ static void tl_dio_clrbit16(sc, reg, bit)
 {
 	u_int16_t			f;
 
+	CSR_BARRIER(sc, TL_DIO_ADDR, 2,
+		BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
 	CSR_WRITE_2(sc, TL_DIO_ADDR, reg);
+	CSR_BARRIER(sc, TL_DIO_ADDR, 2,
+		BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
 	f = CSR_READ_2(sc, TL_DIO_DATA + (reg & 3));
 	f &= ~bit;
+	CSR_BARRIER(sc, TL_DIO_DATA + (reg & 3), 2,
+		BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
 	CSR_WRITE_2(sc, TL_DIO_DATA + (reg & 3), f);
-
-	return;
 }
 
 /*
@@ -608,61 +666,55 @@ tl_read_eeprom(sc, dest, off, cnt)
 	return(err ? 1 : 0);
 }
 
-static void
-tl_mii_sync(sc)
-	struct tl_softc		*sc;
+#define	TL_SIO_MII	(TL_SIO_MCLK | TL_SIO_MDATA | TL_SIO_MTXEN)
+
+/*
+ * Read the MII serial port for the MII bit-bang module.
+ */
+static uint32_t
+tl_mii_bitbang_read(device_t dev)
 {
-	register int		i;
+	struct tl_softc *sc;
+	uint32_t val;
 
-	tl_dio_clrbit(sc, TL_NETSIO, TL_SIO_MTXEN);
+	sc = device_get_softc(dev);
 
-	for (i = 0; i < 32; i++) {
-		tl_dio_setbit(sc, TL_NETSIO, TL_SIO_MCLK);
-		tl_dio_clrbit(sc, TL_NETSIO, TL_SIO_MCLK);
-	}
+	val = tl_dio_read8(sc, TL_NETSIO) & TL_SIO_MII;
+	CSR_BARRIER(sc, TL_NETSIO, 1,
+	    BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
 
-	return;
+	return (val);
 }
 
+/*
+ * Write the MII serial port for the MII bit-bang module.
+ */
 static void
-tl_mii_send(sc, bits, cnt)
-	struct tl_softc		*sc;
-	u_int32_t		bits;
-	int			cnt;
+tl_mii_bitbang_write(device_t dev, uint32_t val)
 {
-	int			i;
+	struct tl_softc *sc;
 
-	for (i = (0x1 << (cnt - 1)); i; i >>= 1) {
-		tl_dio_clrbit(sc, TL_NETSIO, TL_SIO_MCLK);
-		if (bits & i) {
-			tl_dio_setbit(sc, TL_NETSIO, TL_SIO_MDATA);
-		} else {
-			tl_dio_clrbit(sc, TL_NETSIO, TL_SIO_MDATA);
-		}
-		tl_dio_setbit(sc, TL_NETSIO, TL_SIO_MCLK);
-	}
+	sc = device_get_softc(dev);
+
+	val = (tl_dio_read8(sc, TL_NETSIO) & ~TL_SIO_MII) | val;
+	CSR_BARRIER(sc, TL_NETSIO, 1,
+	    BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
+	tl_dio_write8(sc, TL_NETSIO, val);
+	CSR_BARRIER(sc, TL_NETSIO, 1,
+	    BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
 }
 
 static int
-tl_mii_readreg(sc, frame)
-	struct tl_softc		*sc;
-	struct tl_mii_frame	*frame;
-	
+tl_miibus_readreg(dev, phy, reg)
+	device_t		dev;
+	int			phy, reg;
 {
-	int			i, ack;
-	int			minten = 0;
+	struct tl_softc		*sc;
+	int			minten, val;
 
-	tl_mii_sync(sc);
+	sc = device_get_softc(dev);
 
 	/*
-	 * Set up frame for RX.
-	 */
-	frame->mii_stdelim = TL_MII_STARTDELIM;
-	frame->mii_opcode = TL_MII_READOP;
-	frame->mii_turnaround = 0;
-	frame->mii_data = 0;
-	
-	/*
 	 * Turn off MII interrupt by forcing MINTEN low.
 	 */
 	minten = tl_dio_read8(sc, TL_NETSIO) & TL_SIO_MINTEN;
@@ -670,89 +722,26 @@ tl_mii_readreg(sc, frame)
 		tl_dio_clrbit(sc, TL_NETSIO, TL_SIO_MINTEN);
 	}
 
-	/*
- 	 * Turn on data xmit.
-	 */
-	tl_dio_setbit(sc, TL_NETSIO, TL_SIO_MTXEN);
-
-	/*
-	 * Send command/address info.
-	 */
-	tl_mii_send(sc, frame->mii_stdelim, 2);
-	tl_mii_send(sc, frame->mii_opcode, 2);
-	tl_mii_send(sc, frame->mii_phyaddr, 5);
-	tl_mii_send(sc, frame->mii_regaddr, 5);
-
-	/*
-	 * Turn off xmit.
-	 */
-	tl_dio_clrbit(sc, TL_NETSIO, TL_SIO_MTXEN);
-
-	/* Idle bit */
-	tl_dio_clrbit(sc, TL_NETSIO, TL_SIO_MCLK);
-	tl_dio_setbit(sc, TL_NETSIO, TL_SIO_MCLK);
-
-	/* Check for ack */
-	tl_dio_clrbit(sc, TL_NETSIO, TL_SIO_MCLK);
-	ack = tl_dio_read8(sc, TL_NETSIO) & TL_SIO_MDATA;
-
-	/* Complete the cycle */
-	tl_dio_setbit(sc, TL_NETSIO, TL_SIO_MCLK);
-
-	/*
-	 * Now try reading data bits. If the ack failed, we still
-	 * need to clock through 16 cycles to keep the PHYs in sync.
-	 */
-	if (ack) {
-		for(i = 0; i < 16; i++) {
-			tl_dio_clrbit(sc, TL_NETSIO, TL_SIO_MCLK);
-			tl_dio_setbit(sc, TL_NETSIO, TL_SIO_MCLK);
-		}
-		goto fail;
-	}
-
-	for (i = 0x8000; i; i >>= 1) {
-		tl_dio_clrbit(sc, TL_NETSIO, TL_SIO_MCLK);
-		if (!ack) {
-			if (tl_dio_read8(sc, TL_NETSIO) & TL_SIO_MDATA)
-				frame->mii_data |= i;
-		}
-		tl_dio_setbit(sc, TL_NETSIO, TL_SIO_MCLK);
-	}
+	val = mii_bitbang_readreg(dev, &tl_mii_bitbang_ops, phy, reg);
 
-fail:
-
-	tl_dio_setbit(sc, TL_NETSIO, TL_SIO_MCLK);
-	tl_dio_clrbit(sc, TL_NETSIO, TL_SIO_MCLK);
-
-	/* Reenable interrupts */
+	/* Reenable interrupts. */
 	if (minten) {
 		tl_dio_setbit(sc, TL_NETSIO, TL_SIO_MINTEN);
 	}
 
-	if (ack)
-		return(1);
-	return(0);
+	return (val);
 }
 
 static int
-tl_mii_writereg(sc, frame)
-	struct tl_softc		*sc;
-	struct tl_mii_frame	*frame;
-	
+tl_miibus_writereg(dev, phy, reg, data)
+	device_t		dev;
+	int			phy, reg, data;
 {
+	struct tl_softc		*sc;
 	int			minten;
 
-	tl_mii_sync(sc);
-
-	/*
-	 * Set up frame for TX.
-	 */
+	sc = device_get_softc(dev);
 
-	frame->mii_stdelim = TL_MII_STARTDELIM;
-	frame->mii_opcode = TL_MII_WRITEOP;
-	frame->mii_turnaround = TL_MII_TURNAROUND;
-	
 	/*
 	 * Turn off MII interrupt by forcing MINTEN low.
 	 */
@@ -761,67 +750,12 @@ tl_mii_writereg(sc, frame)
 		tl_dio_clrbit(sc, TL_NETSIO, TL_SIO_MINTEN);
 	}
 
-	/*
- 	 * Turn on data output.
-	 */
-	tl_dio_setbit(sc, TL_NETSIO, TL_SIO_MTXEN);
-
-	tl_mii_send(sc, frame->mii_stdelim, 2);
-	tl_mii_send(sc, frame->mii_opcode, 2);
-	tl_mii_send(sc, frame->mii_phyaddr, 5);
-	tl_mii_send(sc, frame->mii_regaddr, 5);
-	tl_mii_send(sc, frame->mii_turnaround, 2);
-	tl_mii_send(sc, frame->mii_data, 16);
+	mii_bitbang_writereg(dev, &tl_mii_bitbang_ops, phy, reg, data);
 
-	tl_dio_setbit(sc, TL_NETSIO, TL_SIO_MCLK);
-	tl_dio_clrbit(sc, TL_NETSIO, TL_SIO_MCLK);
-
-	/*
-	 * Turn off xmit.
-	 */
-	tl_dio_clrbit(sc, TL_NETSIO, TL_SIO_MTXEN);
-
-	/* Reenable interrupts */
-	if (minten)
+	/* Reenable interrupts. */
+	if (minten) {
 		tl_dio_setbit(sc, TL_NETSIO, TL_SIO_MINTEN);
-
-	return(0);
-}
-
-static int
-tl_miibus_readreg(dev, phy, reg)
-	device_t		dev;
-	int			phy, reg;
-{
-	struct tl_softc		*sc;
-	struct tl_mii_frame	frame;
-
-	sc = device_get_softc(dev);
-	bzero((char *)&frame, sizeof(frame));
-
-	frame.mii_phyaddr = phy;
-	frame.mii_regaddr = reg;
-	tl_mii_readreg(sc, &frame);
-
-	return(frame.mii_data);
-}
-
-static int
-tl_miibus_writereg(dev, phy, reg, data)
-	device_t		dev;
-	int			phy, reg, data;
-{
-	struct tl_softc		*sc;
-	struct tl_mii_frame	frame;
-
-	sc = device_get_softc(dev);
-	bzero((char *)&frame, sizeof(frame));
-
-	frame.mii_phyaddr = phy;
-	frame.mii_regaddr = reg;
-	frame.mii_data = data;
-
-	tl_mii_writereg(sc, &frame);
+	}
 
 	return(0);
 }
@@ -841,8 +775,6 @@ tl_miibus_statchg(dev)
 	} else {
 		tl_dio_clrbit(sc, TL_NETCMD, TL_CMD_DUPLEX);
 	}
-
-	return;
 }
 
 /*
@@ -865,8 +797,6 @@ tl_setmode(sc, media)
 			tl_dio_clrbit(sc, TL_NETCMD, TL_CMD_DUPLEX);
 		}
 	}
-
-	return;
 }
 
 /*
@@ -909,8 +839,6 @@ tl_setfilt(sc, addr, slot)
 
 	for (i = 0; i < ETHER_ADDR_LEN; i++)
 		tl_dio_write8(sc, regaddr + i, *(addr + i));
-
-	return;
 }
 
 /*
@@ -980,8 +908,6 @@ tl_setmulti(sc)
 
 	tl_dio_write32(sc, TL_HASH1, hashes[0]);
 	tl_dio_write32(sc, TL_HASH2, hashes[1]);
-
-	return;
 }
 
 /*
@@ -1000,7 +926,7 @@ tl_hardreset(dev)
 
 	sc = device_get_softc(dev);
 
-	tl_mii_sync(sc);
+	mii_bitbang_sync(dev, &tl_mii_bitbang_ops);
 
 	flags = BMCR_LOOP|BMCR_ISO|BMCR_PDOWN;
 
@@ -1010,11 +936,10 @@ tl_hardreset(dev)
 	tl_miibus_writereg(dev, 31, MII_BMCR, BMCR_ISO);
 	DELAY(50000);
 	tl_miibus_writereg(dev, 31, MII_BMCR, BMCR_LOOP|BMCR_ISO);
-	tl_mii_sync(sc);
+	mii_bitbang_sync(dev, &tl_mii_bitbang_ops);
 	while(tl_miibus_readreg(dev, 31, MII_BMCR) & BMCR_RESET);
 
 	DELAY(50000);
-	return;
 }
 
 static void
@@ -1072,8 +997,6 @@ tl_softreset(sc, internal)
 
 	/* Wait for things to settle down a little. */
 	DELAY(500);
-
-        return;
 }
 
 /*
@@ -1084,7 +1007,7 @@ static int
 tl_probe(dev)
 	device_t		dev;
 {
-	struct tl_type		*t;
+	const struct tl_type	*t;
 
 	t = tl_devs;
 
@@ -1105,7 +1028,7 @@ tl_attach(dev)
 	device_t		dev;
 {
 	u_int16_t		did, vid;
-	struct tl_type		*t;
+	const struct tl_type	*t;
 	struct ifnet		*ifp;
 	struct tl_softc		*sc;
 	int			error, flags, i, rid, unit;
@@ -1415,9 +1338,9 @@ static int
 tl_list_rx_init(sc)
 	struct tl_softc		*sc;
 {
-	struct tl_chain_data	*cd;
-	struct tl_list_data	*ld;
-	int			i;
+	struct tl_chain_data		*cd;
+	struct tl_list_data		*ld;
+	int				i;
 
 	cd = &sc->tl_cdata;
 	ld = sc->tl_ldata;
@@ -1783,8 +1706,6 @@ tl_intr(xsc)
 		tl_start_locked(ifp);
 
 	TL_UNLOCK(sc);
-
-	return;
 }
 
 static void
@@ -1843,8 +1764,6 @@ tl_stats_update(xsc)
 		mii = device_get_softc(sc->tl_miibus);
 		mii_tick(mii);
 	}
-
-	return;
 }
 
 /*
@@ -2046,8 +1965,6 @@ tl_start_locked(ifp)
 	 * Set a timeout in case the chip goes out to lunch.
 	 */
 	sc->tl_timer = 5;
-
-	return;
 }
 
 static void
@@ -2143,8 +2060,6 @@ tl_init_locked(sc)
 
 	/* Start the stats update counter */
 	callout_reset(&sc->tl_stat_callout, hz, tl_stats_update, sc);
-
-	return;
 }
 
 /*
@@ -2204,8 +2119,6 @@ tl_ifmedia_sts(ifp, ifmr)
 		ifmr->ifm_status = mii->mii_media_status;
 	}
 	TL_UNLOCK(sc);
-
-	return;
 }
 
 static int
@@ -2284,8 +2197,6 @@ tl_watchdog(sc)
 
 	tl_softreset(sc, 1);
 	tl_init_locked(sc);
-
-	return;
 }
 
 /*
@@ -2351,8 +2262,6 @@ tl_stop(sc)
 		sizeof(sc->tl_ldata->tl_tx_list));
 
 	ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
-
-	return;
 }
 
 /*
diff --git a/sys/dev/tl/if_tlreg.h b/sys/dev/tl/if_tlreg.h
index 4e340b1eee74..4a82cc5d9727 100644
--- a/sys/dev/tl/if_tlreg.h
+++ b/sys/dev/tl/if_tlreg.h
@@ -32,11 +32,10 @@
  * $FreeBSD$
  */
 
-
 struct tl_type {
 	u_int16_t		tl_vid;
 	u_int16_t		tl_did;
-	char			*tl_name;
+	const char		*tl_name;
 };
 
 /*
@@ -203,6 +202,7 @@ struct tl_softc {
 
 #define TL_INT_MASK		0x001C
 #define TL_VEC_MASK		0x1FE0
+
 /*
  * Host command register bits
  */
@@ -390,36 +390,6 @@ struct tl_softc {
 #define TL_MASK_MASK5		0x20
 #define TL_MASK_MASK4		0x10
 
-/*
- * MII frame format
- */
-#ifdef ANSI_DOESNT_ALLOW_BITFIELDS
-struct tl_mii_frame {
-	u_int16_t		mii_stdelim:2,
-				mii_opcode:2,
-				mii_phyaddr:5,
-				mii_regaddr:5,
-				mii_turnaround:2;
-	u_int16_t		mii_data;
-};
-#else
-struct tl_mii_frame {
-	u_int8_t		mii_stdelim;
-	u_int8_t		mii_opcode;
-	u_int8_t		mii_phyaddr;
-	u_int8_t		mii_regaddr;
-	u_int8_t		mii_turnaround;
-	u_int16_t		mii_data;
-};
-#endif
-/*
- * MII constants
- */
-#define TL_MII_STARTDELIM	0x01
-#define TL_MII_READOP		0x02
-#define TL_MII_WRITEOP		0x01
-#define TL_MII_TURNAROUND	0x02
-
 #define TL_LAST_FRAG		0x80000000
 #define TL_CSTAT_UNUSED		0x8000
 #define TL_CSTAT_FRAMECMP	0x4000
@@ -499,6 +469,9 @@ struct tl_stats {
 #define CSR_READ_2(sc, reg)		bus_read_2(sc->tl_res, reg)
 #define CSR_READ_1(sc, reg)		bus_read_1(sc->tl_res, reg)
 
+#define	CSR_BARRIER(sc, reg, length, flags)				\
+	bus_barrier(sc->tl_res, reg, length, flags)
+
 #define CMD_PUT(sc, x) CSR_WRITE_4(sc, TL_HOSTCMD, x)
 #define CMD_SET(sc, x)	\
 	CSR_WRITE_4(sc, TL_HOSTCMD, CSR_READ_4(sc, TL_HOSTCMD) | (x))