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authorGordon Bergling <gbe@FreeBSD.org>2022-04-09 08:34:48 +0000
committerGordon Bergling <gbe@FreeBSD.org>2022-04-09 08:34:48 +0000
commit74c6ca6fbf61a7879a91c5d0f68786c22ac8f0db (patch)
treecb9feeda7811f8c34768599941d601d6cc885fa6 /sys/dev/usb/serial
parentefd0fdfe289cde91ee612efb083673036d8b01d4 (diff)
Diffstat (limited to 'sys/dev/usb/serial')
-rw-r--r--sys/dev/usb/serial/umcs.h8
1 files changed, 4 insertions, 4 deletions
diff --git a/sys/dev/usb/serial/umcs.h b/sys/dev/usb/serial/umcs.h
index 288988c2d9b6..fe6fb45b90ea 100644
--- a/sys/dev/usb/serial/umcs.h
+++ b/sys/dev/usb/serial/umcs.h
@@ -45,7 +45,7 @@
* All these registers are documented only in full datasheet,
* which can be requested from MosChip tech support.
*/
-#define MCS7840_DEV_REG_SP1 0x00 /* Options for for UART 1, R/W */
+#define MCS7840_DEV_REG_SP1 0x00 /* Options for UART 1, R/W */
#define MCS7840_DEV_REG_CONTROL1 0x01 /* Control bits for UART 1,
* R/W */
#define MCS7840_DEV_REG_PINPONGHIGH 0x02 /* High bits of ping-pong
@@ -56,13 +56,13 @@
#define MCS7840_DEV_REG_GPIO 0x07 /* GPIO_0 and GPIO_1 bits,
* undocumented, see notes
* below R/W */
-#define MCS7840_DEV_REG_SP2 0x08 /* Options for for UART 2, R/W */
+#define MCS7840_DEV_REG_SP2 0x08 /* Options for UART 2, R/W */
#define MCS7840_DEV_REG_CONTROL2 0x09 /* Control bits for UART 2,
* R/W */
-#define MCS7840_DEV_REG_SP3 0x0a /* Options for for UART 3, R/W */
+#define MCS7840_DEV_REG_SP3 0x0a /* Options for UART 3, R/W */
#define MCS7840_DEV_REG_CONTROL3 0x0b /* Control bits for UART 3,
* R/W */
-#define MCS7840_DEV_REG_SP4 0x0c /* Options for for UART 4, R/W */
+#define MCS7840_DEV_REG_SP4 0x0c /* Options for UART 4, R/W */
#define MCS7840_DEV_REG_CONTROL4 0x0d /* Control bits for UART 4,
* R/W */
#define MCS7840_DEV_REG_PLL_DIV_M 0x0e /* Pre-diviedr for PLL, R/W */