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authorWarner Losh <imp@FreeBSD.org>2008-08-02 20:45:28 +0000
committerWarner Losh <imp@FreeBSD.org>2008-08-02 20:45:28 +0000
commitf043f9621ed33ac5b3ad7dd04ccff47aea8bfbe1 (patch)
treee1332b234a1a9fe02a2bf066270b21f216bab1c0 /sys/dev
parent96edbc847e6889474dcd0b9f01719561647cdbdc (diff)
Notes
Diffstat (limited to 'sys/dev')
-rw-r--r--sys/dev/wi/if_wi_pci.c10
-rw-r--r--sys/dev/wi/if_wireg.h9
2 files changed, 12 insertions, 7 deletions
diff --git a/sys/dev/wi/if_wi_pci.c b/sys/dev/wi/if_wi_pci.c
index cfbe4dc90802..958ba7ef4978 100644
--- a/sys/dev/wi/if_wi_pci.c
+++ b/sys/dev/wi/if_wi_pci.c
@@ -190,10 +190,10 @@ wi_pci_attach(device_t dev)
sc->wi_bmemhandle = rman_get_bushandle(sc->mem);
/*
- * From Linux driver:
* Write COR to enable PC card
* This is a subset of the protocol that the pccard bus code
- * would do.
+ * would do. In theory, we should parse the CIS to find the
+ * COR offset. In practice, the COR_OFFSET is always 0x3e0.
*/
CSM_WRITE_1(sc, WI_COR_OFFSET, WI_COR_VALUE);
reg = CSM_READ_1(sc, WI_COR_OFFSET);
@@ -208,10 +208,10 @@ wi_pci_attach(device_t dev)
if (error)
return (error);
- CSR_WRITE_2(sc, WI_HFA384X_PCICOR_OFF, 0x0080);
+ CSR_WRITE_2(sc, WI_PCICOR_OFF, WI_PCICOR_RESET);
DELAY(250000);
- CSR_WRITE_2(sc, WI_HFA384X_PCICOR_OFF, 0x0000);
+ CSR_WRITE_2(sc, WI_PCICOR_OFF, 0x0000);
DELAY(500000);
timeout=2000000;
@@ -220,7 +220,7 @@ wi_pci_attach(device_t dev)
DELAY(10);
if (timeout == 0) {
- device_printf(dev, "couldn't reset prism2.5 core.\n");
+ device_printf(dev, "couldn't reset prism pci core.\n");
wi_free(dev);
return(ENXIO);
}
diff --git a/sys/dev/wi/if_wireg.h b/sys/dev/wi/if_wireg.h
index 33cf5c9b4817..176e4a0056ae 100644
--- a/sys/dev/wi/if_wireg.h
+++ b/sys/dev/wi/if_wireg.h
@@ -51,7 +51,8 @@
#define WI_LOCAL_INTEN 0x40
#define WI_HFA384X_SWSUPPORT0_OFF 0x28
#define WI_PRISM2STA_MAGIC 0x4A2D
-#define WI_HFA384X_PCICOR_OFF 0x26
+#define WI_PCICOR_OFF 0x26
+#define WI_PCICOR_RESET 0x0080
/* Default port: 0 (only 0 exists on stations) */
#define WI_DEFAULT_PORT WI_PORT0
@@ -330,7 +331,7 @@
#define WI_HCR_HOLD 0x000f
#define WI_HCR_EEHOLD 0x00ce
-#define WI_COR_OFFSET 0x3e0 /* OK for PCI, must be bogus for pccard */
+#define WI_COR_OFFSET 0x3e0 /* OK for PCI, default COR for Prism PC Card */
#define WI_COR_VALUE 0x41
/*
@@ -430,6 +431,10 @@ struct wi_ver {
#define WI_NIC_P3_PCMCIA_ATS_ID 0x801D
#define WI_NIC_P3_PCMCIA_STR "RF:PRISM3(PCMCIA)"
+#define WI_NIC_P3_USB_AMD_ID 0x801E
+#define WI_NIC_P3_USB_SST_ID 0x801F
+#define WI_NIC_P3_USB_ATL_ID 0x8020
+
#define WI_NIC_P3_MINI_AMD_ID 0x8021 /* Prism3 Mini-PCI */
#define WI_NIC_P3_MINI_SST_ID 0x8022
#define WI_NIC_P3_MINI_ATL_ID 0x8023