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authorWarner Losh <imp@FreeBSD.org>2021-12-31 03:56:09 +0000
committerWarner Losh <imp@FreeBSD.org>2021-12-31 03:57:24 +0000
commitc09981f1422ef0d44042dacc5d1265392fba39f1 (patch)
tree3621074c619d202435c4eba5f315c56321b7f6bd /sys/mips/broadcom
parentfe532f1a50172b67781c1838948eceb45caf91d2 (diff)
Diffstat (limited to 'sys/mips/broadcom')
-rw-r--r--sys/mips/broadcom/bcm_bmips.c419
-rw-r--r--sys/mips/broadcom/bcm_bmips_exts.h189
-rw-r--r--sys/mips/broadcom/bcm_bmipsreg.h73
-rw-r--r--sys/mips/broadcom/bcm_machdep.c662
-rw-r--r--sys/mips/broadcom/bcm_machdep.h138
-rw-r--r--sys/mips/broadcom/bcm_mips.c696
-rw-r--r--sys/mips/broadcom/bcm_mips74k.c391
-rw-r--r--sys/mips/broadcom/bcm_mips74kreg.h67
-rw-r--r--sys/mips/broadcom/bcm_mipsvar.h111
-rw-r--r--sys/mips/broadcom/bcm_nvram_cfe.c501
-rw-r--r--sys/mips/broadcom/bcm_nvram_cfevar.h67
-rw-r--r--sys/mips/broadcom/bcm_pmu.c297
-rw-r--r--sys/mips/broadcom/bcma_nexus.c119
-rw-r--r--sys/mips/broadcom/bhnd_nexus.c281
-rw-r--r--sys/mips/broadcom/bhnd_nexusvar.h40
-rw-r--r--sys/mips/broadcom/files.broadcom32
-rw-r--r--sys/mips/broadcom/siba_nexus.c108
-rw-r--r--sys/mips/broadcom/std.broadcom9
-rw-r--r--sys/mips/broadcom/uart_bus_chipc.c80
-rw-r--r--sys/mips/broadcom/uart_cpu_chipc.c171
20 files changed, 0 insertions, 4451 deletions
diff --git a/sys/mips/broadcom/bcm_bmips.c b/sys/mips/broadcom/bcm_bmips.c
deleted file mode 100644
index 0efd4706941c..000000000000
--- a/sys/mips/broadcom/bcm_bmips.c
+++ /dev/null
@@ -1,419 +0,0 @@
-/*-
- * Copyright (c) 2016 Landon Fuller <landonf@FreeBSD.org>
- * Copyright (c) 2017 The FreeBSD Foundation
- * All rights reserved.
- *
- * Portions of this software were developed by Landon Fuller
- * under sponsorship from the FreeBSD Foundation.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer,
- * without modification.
- * 2. Redistributions in binary form must reproduce at minimum a disclaimer
- * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
- * redistribution must be conditioned upon including a substantially
- * similar Disclaimer requirement for further binary redistribution.
- *
- * NO WARRANTY
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
- * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
- * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
- * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
- * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- * THE POSSIBILITY OF SUCH DAMAGES.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/kernel.h>
-#include <sys/bus.h>
-#include <sys/module.h>
-#include <sys/proc.h>
-
-#include <machine/bus.h>
-#include <sys/rman.h>
-
-#include <machine/intr.h>
-#include <machine/resource.h>
-
-#include <dev/bhnd/bhnd.h>
-#include <dev/bhnd/siba/sibareg.h>
-
-#include "pic_if.h"
-
-#include "bcm_mipsvar.h"
-#include "bcm_bmipsreg.h"
-
-/*
- * BMIPS32 and BMIPS3300 core driver.
- *
- * These cores are only found on siba(4) chipsets, allowing
- * us to assume the availability of siba interrupt registers.
- */
-
-struct bcm_bmips_softc;
-
-static int bcm_bmips_pic_intr(void *arg);
-static void bcm_bmips_mask_irq(struct bcm_bmips_softc *sc, u_int mips_irq,
- u_int ivec);
-static void bcm_bmips_unmask_irq(struct bcm_bmips_softc *sc, u_int mips_irq,
- u_int ivec);
-
-static const struct bhnd_device bcm_bmips_devs[] = {
- BHND_DEVICE(BCM, MIPS33, NULL, NULL, BHND_DF_SOC),
- BHND_DEVICE_END
-};
-
-struct bcm_bmips_softc {
- struct bcm_mips_softc bcm_mips; /**< parent softc */
- device_t dev;
- struct resource *mem; /**< cpu core registers */
- int mem_rid;
- struct resource *cfg; /**< cpu core's cfg0 register block */
- int cfg_rid;
-};
-
-#define BCM_BMIPS_NCPU_IRQS 5 /**< MIPS HW IRQs 0-4 are assignable */
-#define BCM_BMIPS_TIMER_IRQ 5 /**< MIPS HW IRQ5 is always assigned to the timer */
-
-static int
-bcm_bmips_probe(device_t dev)
-{
- const struct bhnd_device *id;
-
- id = bhnd_device_lookup(dev, bcm_bmips_devs, sizeof(bcm_bmips_devs[0]));
- if (id == NULL)
- return (ENXIO);
-
- /* Check the chip type; should only be found on siba(4) chipsets */
- if (bhnd_get_chipid(dev)->chip_type != BHND_CHIPTYPE_SIBA)
- return (ENXIO);
-
- bhnd_set_default_core_desc(dev);
- return (BUS_PROBE_DEFAULT);
-}
-
-static int
-bcm_bmips_attach(device_t dev)
-{
- struct bcm_bmips_softc *sc;
- int error;
-
- sc = device_get_softc(dev);
- sc->dev = dev;
-
- /* Allocate our core's register block */
- sc->mem_rid = 0;
- sc->mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->mem_rid,
- RF_ACTIVE);
- if (sc->mem == NULL) {
- device_printf(dev, "failed to allocate cpu register block\n");
- error = ENXIO;
- goto failed;
- }
-
- /* Determine the resource ID for our siba CFG0 registers */
- sc->cfg_rid = bhnd_get_port_rid(dev, BHND_PORT_AGENT, 0, 0);
- if (sc->cfg_rid == -1) {
- device_printf(dev, "missing required cfg0 register block\n");
- error = ENXIO;
- goto failed;
- }
-
- /* Allocate our CFG0 register block */
- sc->cfg = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->cfg_rid,
- RF_ACTIVE|RF_SHAREABLE);
- if (sc->cfg == NULL) {
- device_printf(dev, "failed to allocate cfg0 register block\n");
- error = ENXIO;
- goto failed;
- }
-
- /* Clear interrupt map */
- bus_write_4(sc->cfg, SIBA_CFG0_INTVEC, 0x0); /* MIPS IRQ0 */
- bus_write_4(sc->cfg, SIBA_CFG0_IPSFLAG, 0x0); /* MIPS IRQ1-4 */
-
- /* Initialize the generic BHND MIPS driver state */
- error = bcm_mips_attach(dev, BCM_BMIPS_NCPU_IRQS, BCM_BMIPS_TIMER_IRQ,
- bcm_bmips_pic_intr);
- if (error)
- goto failed;
-
- return (0);
-
-failed:
- if (sc->mem != NULL)
- bus_release_resource(dev, SYS_RES_MEMORY, sc->mem_rid, sc->mem);
-
- if (sc->cfg != NULL)
- bus_release_resource(dev, SYS_RES_MEMORY, sc->cfg_rid, sc->cfg);
-
- return (error);
-}
-
-static int
-bcm_bmips_detach(device_t dev)
-{
- struct bcm_bmips_softc *sc;
- int error;
-
- sc = device_get_softc(dev);
-
- if ((error = bcm_mips_detach(dev)))
- return (error);
-
- bus_release_resource(dev, SYS_RES_MEMORY, sc->mem_rid, sc->mem);
- bus_release_resource(dev, SYS_RES_MEMORY, sc->cfg_rid, sc->cfg);
-
- return (0);
-}
-
-/* PIC_DISABLE_INTR() */
-static void
-bcm_bmips_pic_disable_intr(device_t dev, struct intr_irqsrc *irqsrc)
-{
- struct bcm_bmips_softc *sc;
- struct bcm_mips_irqsrc *isrc;
-
- sc = device_get_softc(dev);
- isrc = (struct bcm_mips_irqsrc *)irqsrc;
-
- KASSERT(isrc->cpuirq != NULL, ("no assigned MIPS IRQ"));
-
- bcm_bmips_mask_irq(sc, isrc->cpuirq->mips_irq, isrc->ivec);
-}
-
-/* PIC_ENABLE_INTR() */
-static void
-bcm_bmips_pic_enable_intr(device_t dev, struct intr_irqsrc *irqsrc)
-{
- struct bcm_bmips_softc *sc;
- struct bcm_mips_irqsrc *isrc;
-
- sc = device_get_softc(dev);
- isrc = (struct bcm_mips_irqsrc *)irqsrc;
-
- KASSERT(isrc->cpuirq != NULL, ("no assigned MIPS IRQ"));
-
- bcm_bmips_unmask_irq(sc, isrc->cpuirq->mips_irq, isrc->ivec);
-}
-
-/* PIC_PRE_ITHREAD() */
-static void
-bcm_bmips_pic_pre_ithread(device_t dev, struct intr_irqsrc *isrc)
-{
- bcm_bmips_pic_disable_intr(dev, isrc);
-}
-
-/* PIC_POST_ITHREAD() */
-static void
-bcm_bmips_pic_post_ithread(device_t dev, struct intr_irqsrc *isrc)
-{
- bcm_bmips_pic_enable_intr(dev, isrc);
-}
-
-/* PIC_POST_FILTER() */
-static void
-bcm_bmips_pic_post_filter(device_t dev, struct intr_irqsrc *isrc)
-{
-}
-
-/**
- * Disable routing of backplane interrupt vector @p ivec to MIPS IRQ
- * @p mips_irq.
- */
-static void
-bcm_bmips_mask_irq(struct bcm_bmips_softc *sc, u_int mips_irq, u_int ivec)
-{
- KASSERT(ivec < SIBA_MAX_INTR, ("invalid sbflag# ivec"));
- KASSERT(mips_irq < sc->bcm_mips.num_cpuirqs, ("invalid MIPS IRQ %u",
- mips_irq));
-
- if (mips_irq == 0) {
- uint32_t sbintvec;
-
- sbintvec = bus_read_4(sc->cfg, SIBA_CFG0_INTVEC);
- sbintvec &= ~(1 << ivec);
- bus_write_4(sc->cfg, SIBA_CFG0_INTVEC, sbintvec);
- } else {
- uint32_t ipsflag;
-
- /* Can we route this via ipsflag? */
- KASSERT(((1 << ivec) & SIBA_IPS_INT1_MASK) != 0,
- ("cannot route high sbflag# ivec %u", ivec));
-
- ipsflag = bus_read_4(sc->cfg, SIBA_CFG0_IPSFLAG);
- ipsflag &= ~(
- ((1 << ivec) << SIBA_IPS_INT_SHIFT(mips_irq)) &
- SIBA_IPS_INT_MASK(mips_irq));
- bus_write_4(sc->cfg, SIBA_CFG0_IPSFLAG, ipsflag);
- }
-
-}
-
-/**
- * Enable routing of an interrupt.
- */
-static void
-bcm_bmips_unmask_irq(struct bcm_bmips_softc *sc, u_int mips_irq, u_int ivec)
-{
- KASSERT(ivec < SIBA_MAX_INTR, ("invalid sbflag# ivec"));
- KASSERT(mips_irq < sc->bcm_mips.num_cpuirqs, ("invalid MIPS IRQ %u",
- mips_irq));
-
- if (mips_irq == 0) {
- uint32_t sbintvec;
-
- sbintvec = bus_read_4(sc->cfg, SIBA_CFG0_INTVEC);
- sbintvec |= (1 << ivec);
- bus_write_4(sc->cfg, SIBA_CFG0_INTVEC, sbintvec);
- } else {
- uint32_t ipsflag;
-
- /* Can we route this via ipsflag? */
- KASSERT(((1 << ivec) & SIBA_IPS_INT1_MASK) != 0,
- ("cannot route high sbflag# ivec %u", ivec));
-
- ipsflag = bus_read_4(sc->cfg, SIBA_CFG0_IPSFLAG);
- ipsflag |= (ivec << SIBA_IPS_INT_SHIFT(mips_irq)) &
- SIBA_IPS_INT_MASK(mips_irq);
- bus_write_4(sc->cfg, SIBA_CFG0_IPSFLAG, ipsflag);
- }
-}
-
-/* our MIPS CPU interrupt filter */
-static int
-bcm_bmips_pic_intr(void *arg)
-{
- struct bcm_bmips_softc *sc;
- struct bcm_mips_cpuirq *cpuirq;
- struct bcm_mips_irqsrc *isrc_solo;
- uint32_t sbintvec, sbstatus;
- u_int mips_irq, i;
- int error;
-
- cpuirq = arg;
- sc = (struct bcm_bmips_softc*)cpuirq->sc;
-
- /* Fetch current interrupt state */
- sbstatus = bus_read_4(sc->cfg, SIBA_CFG0_FLAGST);
-
- /* Fetch mask of interrupt vectors routed to this MIPS IRQ */
- mips_irq = cpuirq->mips_irq;
- if (mips_irq == 0) {
- sbintvec = bus_read_4(sc->cfg, SIBA_CFG0_INTVEC);
- } else {
- uint32_t ipsflag;
-
- ipsflag = bus_read_4(sc->cfg, SIBA_CFG0_IPSFLAG);
-
- /* Map to an intvec-compatible representation */
- switch (mips_irq) {
- case 1:
- sbintvec = (ipsflag & SIBA_IPS_INT1_MASK) >>
- SIBA_IPS_INT1_SHIFT;
- break;
- case 2:
- sbintvec = (ipsflag & SIBA_IPS_INT2_MASK) >>
- SIBA_IPS_INT2_SHIFT;
- break;
- case 3:
- sbintvec = (ipsflag & SIBA_IPS_INT3_MASK) >>
- SIBA_IPS_INT3_SHIFT;
- break;
- case 4:
- sbintvec = (ipsflag & SIBA_IPS_INT4_MASK) >>
- SIBA_IPS_INT4_SHIFT;
- break;
- default:
- panic("invalid irq %u", mips_irq);
- }
- }
-
- /* Ignore interrupts not routed to this MIPS IRQ */
- sbstatus &= sbintvec;
-
- /* Handle isrc_solo direct dispatch path */
- isrc_solo = cpuirq->isrc_solo;
- if (isrc_solo != NULL) {
- if (sbstatus & BCM_MIPS_IVEC_MASK(isrc_solo)) {
- error = intr_isrc_dispatch(&isrc_solo->isrc,
- curthread->td_intr_frame);
- if (error) {
- device_printf(sc->dev, "Stray interrupt %u "
- "detected\n", isrc_solo->ivec);
- bcm_bmips_pic_disable_intr(sc->dev,
- &isrc_solo->isrc);
- }
- }
-
- sbstatus &= ~(BCM_MIPS_IVEC_MASK(isrc_solo));
- if (sbstatus == 0)
- return (FILTER_HANDLED);
-
- /* Report and mask additional stray interrupts */
- while ((i = fls(sbstatus)) != 0) {
- i--; /* Get a 0-offset interrupt. */
- sbstatus &= ~(1 << i);
-
- device_printf(sc->dev, "Stray interrupt %u "
- "detected\n", i);
- bcm_bmips_mask_irq(sc, mips_irq, i);
- }
-
- return (FILTER_HANDLED);
- }
-
- /* Standard dispatch path */
- while ((i = fls(sbstatus)) != 0) {
- i--; /* Get a 0-offset interrupt. */
- sbstatus &= ~(1 << i);
-
- KASSERT(i < nitems(sc->bcm_mips.isrcs), ("invalid ivec %u", i));
-
- error = intr_isrc_dispatch(&sc->bcm_mips.isrcs[i].isrc,
- curthread->td_intr_frame);
- if (error) {
- device_printf(sc->dev, "Stray interrupt %u detected\n",
- i);
- bcm_bmips_mask_irq(sc, mips_irq, i);
- continue;
- }
- }
-
- return (FILTER_HANDLED);
-}
-
-static device_method_t bcm_bmips_methods[] = {
- /* Device interface */
- DEVMETHOD(device_probe, bcm_bmips_probe),
- DEVMETHOD(device_attach, bcm_bmips_attach),
- DEVMETHOD(device_detach, bcm_bmips_detach),
-
- /* Interrupt controller interface */
- DEVMETHOD(pic_disable_intr, bcm_bmips_pic_disable_intr),
- DEVMETHOD(pic_enable_intr, bcm_bmips_pic_enable_intr),
- DEVMETHOD(pic_pre_ithread, bcm_bmips_pic_pre_ithread),
- DEVMETHOD(pic_post_ithread, bcm_bmips_pic_post_ithread),
- DEVMETHOD(pic_post_filter, bcm_bmips_pic_post_filter),
-
- DEVMETHOD_END
-};
-
-static devclass_t bcm_mips_devclass;
-
-DEFINE_CLASS_1(bcm_mips, bcm_bmips_driver, bcm_bmips_methods, sizeof(struct bcm_bmips_softc), bcm_mips_driver);
-EARLY_DRIVER_MODULE(bcm_bmips, bhnd, bcm_bmips_driver, bcm_mips_devclass, 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE);
-
-MODULE_VERSION(bcm_bmips, 1);
-MODULE_DEPEND(bcm_bmips, bhnd, 1, 1, 1);
diff --git a/sys/mips/broadcom/bcm_bmips_exts.h b/sys/mips/broadcom/bcm_bmips_exts.h
deleted file mode 100644
index 7e28d7b9b5ed..000000000000
--- a/sys/mips/broadcom/bcm_bmips_exts.h
+++ /dev/null
@@ -1,189 +0,0 @@
-/*-
- * Copyright 2000,2001,2002,2003 Broadcom Corporation.
- * All rights reserved.
- *
- * This file is derived from the sbmips32.h header distributed
- * by Broadcom with the CFE 1.4.2 sources.
- *
- * This software is furnished under license and may be used and
- * copied only in accordance with the following terms and
- * conditions. Subject to these conditions, you may download,
- * copy, install, use, modify and distribute modified or unmodified
- * copies of this software in source and/or binary form. No title
- * or ownership is transferred hereby.
- *
- * 1) Any source code used, modified or distributed must reproduce
- * and retain this copyright notice and list of conditions
- * as they appear in the source file.
- *
- * 2) No right is granted to use any trade name, trademark, or
- * logo of Broadcom Corporation. The "Broadcom Corporation"
- * name may not be used to endorse or promote products derived
- * from this software without the prior written permission of
- * Broadcom Corporation.
- *
- * 3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED
- * WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
- * PURPOSE, OR NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT
- * SHALL BROADCOM BE LIABLE FOR ANY DAMAGES WHATSOEVER, AND IN
- * PARTICULAR, BROADCOM SHALL NOT BE LIABLE FOR DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
- * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
- * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
- * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
- * TORT (INCLUDING NEGLIGENCE OR OTHERWISE), EVEN IF ADVISED OF
- * THE POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-/* *********************************************************************
- * Broadcom Common Firmware Environment (CFE)
- *
- * MIPS32 CPU definitions File: sbmips32.h
- *
- * This module contains constants and macros specific to the
- * Broadcom MIPS32 core. In addition to generic MIPS32, it
- * includes definitions for the MIP32-01 and MIPS3302 OCP cores
- * for the Silicon Backplane.
- *
- *********************************************************************/
-
-#ifndef _MIPS_BROADCOM_BCM_BMIPS_EXTS_H_
-#define _MIPS_BROADCOM_BCM_BMIPS_EXTS_H_
-
-#include <machine/cpufunc.h>
-
-/*
- * The following Broadcom Custom CP0 Registers appear in the Broadcom
- * BMIPS330x MIPS32 core.
- */
-
-#define BMIPS_COP_0_BCMCFG 22
-
-/*
- * Custom CP0 Accessors
- */
-
-#define BCM_BMIPS_RW32_COP0_SEL(n,r,s) \
-static __inline uint32_t \
-bcm_bmips_rd_ ## n(void) \
-{ \
- int v0; \
- __asm __volatile ("mfc0 %[v0], $"__XSTRING(r)", "__XSTRING(s)";" \
- : [v0] "=&r"(v0)); \
- mips_barrier(); \
- return (v0); \
-} \
-static __inline void \
-bcm_bmips_wr_ ## n(uint32_t a0) \
-{ \
- __asm __volatile ("mtc0 %[a0], $"__XSTRING(r)", "__XSTRING(s)";" \
- __XSTRING(COP0_SYNC)";" \
- "nop;" \
- "nop;" \
- : \
- : [a0] "r"(a0)); \
- mips_barrier(); \
-} struct __hack
-
-BCM_BMIPS_RW32_COP0_SEL(pllcfg1, MIPS_COP_0_CONFIG, 1);
-BCM_BMIPS_RW32_COP0_SEL(pllcfg2, MIPS_COP_0_CONFIG, 2);
-BCM_BMIPS_RW32_COP0_SEL(clksync, MIPS_COP_0_CONFIG, 3);
-BCM_BMIPS_RW32_COP0_SEL(pllcfg3, MIPS_COP_0_CONFIG, 4);
-BCM_BMIPS_RW32_COP0_SEL(rstcfg, MIPS_COP_0_CONFIG, 5);
-
-/*
- * Broadcom PLLConfig1 Register (22, select 1)
- */
-
-/* SoftMIPSPLLCfg */
-#define BMIPS_BCMCFG_PLLCFG1_MC_SHIFT 10
-#define BMIPS_BCMCFG_PLLCFG1_MC_MASK 0xFFFFFC00
-
-/* SoftISBPLLCfg */
-#define BMIPS_BCMCFG_PLLCFG1_BC_SHIFT 5
-#define BMIPS_BCMCFG_PLLCFG1_BC_MASK 0x000003E0
-
-/* SoftRefPLLCfg */
-#define BMIPS_BCMCFG_PLLCFG1_PC_SHIFT 0
-#define BMIPS_BCMCFG_PLLCFG1_PC_MASK 0x0000001F
-
-/*
- * Broadcom PLLConfig2 Register (22, select 2)
- */
-
-/* Soft1to1ClkRatio */
-#define BMIPS_BCMCFG_PLLCFG2_CR (1<<23)
-
-/* SoftUSBxPLLCfg */
-#define BMIPS_BCMCFG_PLLCFG2_UC_SHIFT 15
-#define BMIPS_BCMCFG_PLLCFG2_UC_MASK 0x007F8000
-
-/* SoftIDExPLLCfg */
-#define BMIPS_BCMCFG_PLLCFG2_IC_SHIFT 7
-#define BMIPS_BCMCFG_PLLCFG2_IC_MASK 0x00007F80
-
-#define BMIPS_BCMCFG_PLLCFG2_BE (1<<6) /* ISBxSoftCfgEnable */
-#define BMIPS_BCMCFG_PLLCFG2_UE (1<<5) /* USBxSoftCfgEnable */
-#define BMIPS_BCMCFG_PLLCFG2_IE (1<<4) /* IDExSoftCfgEnable */
-#define BMIPS_BCMCFG_PLLCFG2_CA (1<<3) /* CfgActive */
-#define BMIPS_BCMCFG_PLLCFG2_CF (1<<2) /* RefSoftCfgEnable */
-#define BMIPS_BCMCFG_PLLCFG2_CI (1<<1) /* ISBSoftCfgEnable */
-#define BMIPS_BCMCFG_PLLCFG2_CC (1<<0) /* MIPSSoftCfgEnable */
-
-/*
- * Broadcom ClkSync Register (22, select 3)
- */
-/* SoftClkCfgHigh */
-#define BMIPS_BCMCFG_CLKSYNC_CH_SHIFT 16
-#define BMIPS_BCMCFG_CLKSYNC_CH_MASK 0xFFFF0000
-
-/* SoftClkCfgLow */
-#define BMIPS_BCMCFG_CLKSYNC_CL_SHIFT 0
-#define BMIPS_BCMCFG_CLKSYNC_CL_MASK 0x0000FFFF
-
-/*
- * Broadcom ISBxPLLConfig3 Register (22, select 4)
- */
-
-/* AsyncClkRatio */
-#define BMIPS_BCMCFG_PLLCFG3_AR_SHIFT 23
-#define BMIPS_BCMCFG_PLLCFG3_AR_MASK 0x01800000
-
-#define BMIPS_BCMCFG_PLLCFG3_SM (1<<22) /* SyncMode */
-
-/* SoftISBxPLLCfg */
-#define BMIPS_BCMCFG_PLLCFG3_IC_SHIFT 0
-#define BMIPS_BCMCFG_PLLCFG3_IC_MASK 0x003FFFFF
-
-/*
- * Broadcom BRCMRstConfig Register (22, select 5)
- */
-
-#define BMIPS_BCMCFG_RSTCFG_SR (1<<18) /* SSMR */
-#define BMIPS_BCMCFG_RSTCFG_DT (1<<16) /* BHTD */
-
-/* RStSt */
-#define BMIPS_BCMCFG_RSTCFG_RS_SHIFT 8
-#define BMIPS_BCMCFG_RSTCFG_RS_MASK 0x00001F00
-#define BMIPS_BCMCFG_RST_OTHER 0x00
-#define BMIPS_BCMCFG_RST_SH 0x01
-#define BMIPS_BCMCFG_RST_SS 0x02
-#define BMIPS_BCMCFG_RST_EJTAG 0x04
-#define BMIPS_BCMCFG_RST_WDOG 0x08
-#define BMIPS_BCMCFG_RST_CRC 0x10
-
-#define BMIPS_BCMCFG_RSTCFG_CR (1<<7) /* RStCr */
-
-/* WBMD */
-#define BMIPS_BCMCFG_RSTCFG_WD_SHIFT 3
-#define BMIPS_BCMCFG_RSTCFG_WD_MASK 0x00000078
-
-#define BMIPS_BCMCFG_RSTCFG_SS (1<<2) /* SSR */
-#define BMIPS_BCMCFG_RSTCFG_SH (1<<1) /* SHR */
-#define BMIPS_BCMCFG_RSTCFG_BR (1<<0) /* BdR */
-
-#endif /* _MIPS_BROADCOM_BCM_BMIPS_EXTS_H_ */
diff --git a/sys/mips/broadcom/bcm_bmipsreg.h b/sys/mips/broadcom/bcm_bmipsreg.h
deleted file mode 100644
index ff77a20e667e..000000000000
--- a/sys/mips/broadcom/bcm_bmipsreg.h
+++ /dev/null
@@ -1,73 +0,0 @@
-/*-
- * Copyright (c) 2016 Landon Fuller <landonf@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer,
- * without modification.
- * 2. Redistributions in binary form must reproduce at minimum a disclaimer
- * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
- * redistribution must be conditioned upon including a substantially
- * similar Disclaimer requirement for further binary redistribution.
- *
- * NO WARRANTY
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
- * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
- * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
- * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
- * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- * THE POSSIBILITY OF SUCH DAMAGES.
- *
- * $FreeBSD$
- */
-
-#ifndef _MIPS_BROADCOM_BMIPSREG_H_
-#define _MIPS_BROADCOM_BMIPSREG_H_
-
-/*
- * Common BMIPS32/BMIPS3300 Registers
- */
-#define BCM_BMIPS_CORECTL 0x00 /**< core control */
-#define BCM_BMIPS_CORECTL_FORCE_RST 0x01 /**< force reset */
-#define BCM_BMIPS_CORECTL_NO_FLSH_EXC 0x02 /**< flash exception disable */
-#define BCM_BMIPS_INTR_STATUS 0x20 /**< interrupt status */
-#define BCM_BMIPS_INTR_MASK 0x24 /**< interrupt mask */
-#define BCM_BMIPS_TIMER_INTMASK 0x01 /**< timer interrupt mask */
-#define BCM_BMIPS_TIMER_CTRL 0x28 /**< timer interval (?) */
-
-/*
- * Broadcom BMIPS32 (BHND_COREID_MIPS)
- */
-
-#define BCM_BMIPS32_CORECTL BCM_BMIPS_CORECTL
-#define BCM_BMIPS32_BIST_STATUS 0x04 /**< built-in self-test status */
-#define BCM_BMIPS32_INTR_STATUS BCM_BMIPS_INTR_STATUS
-#define BCM_BMIPS32_INTR_MASK BCM_BMIPS_INTR_MASK
-#define BCM_BMIPS32_TIMER_CTRL BCM_BMIPS_TIMER_CTRL
-
-/*
- * Broadcom BMIPS3300+ (BHND_COREID_MIPS33)
- */
-
-#define BCM_BMIPS33_CORECTL BCM_BMIPS_CORECTL
-#define BCM_BMIPS33_BIST_CTRL 0x04 /**< build-in self-test control */
-#define BCM_BMIPS33_BIST_CTRL_DUMP 0x01 /**< BIST dump */
-#define BCM_BMIPS33_BIST_CTRL_DEBUG 0x02 /**< BIST debug */
-#define BCM_BMIPS33_BIST_CTRL_HOLD 0x04 /**< BIST hold */
-#define BCM_BMIPS33_BIST_STATUS 0x08 /**< built-in self-test status */
-#define BCM_BMIPS33_INTR_STATUS BCM_BMIPS_INTR_STATUS
-#define BCM_BMIPS33_INTR_MASK BCM_BMIPS_INTR_MASK
-#define BCM_BMIPS33_TIMER_CTRL BCM_BMIPS_TIMER_CTRL
-#define BCM_BMIPS33_TEST_MUX_SEL 0x30 /**< test multiplexer select (?) */
-#define BCM_BMIPS33_TEST_MUX_EN 0x34 /**< test multiplexer enable (?) */
-#define BCM_BMIPS33_EJTAG_GPIO_EN 0x2C /**< ejtag gpio enable */
-
-#endif /* _MIPS_BROADCOM_BMIPSREG_H_ */
diff --git a/sys/mips/broadcom/bcm_machdep.c b/sys/mips/broadcom/bcm_machdep.c
deleted file mode 100644
index 581fffdd899d..000000000000
--- a/sys/mips/broadcom/bcm_machdep.c
+++ /dev/null
@@ -1,662 +0,0 @@
-/*-
- * Copyright (c) 2007 Bruce M. Simpson.
- * Copyright (c) 2016 Michael Zhilin <mizhka@gmail.com>
- * Copyright (c) 2016 Landon Fuller <landonf@FreeBSD.org>
- * Copyright (c) 2017 The FreeBSD Foundation
- * All rights reserved.
- *
- * Portions of this software were developed by Landon Fuller
- * under sponsorship from the FreeBSD Foundation.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include "opt_ddb.h"
-
-#include <sys/param.h>
-#include <sys/conf.h>
-#include <sys/kernel.h>
-#include <sys/systm.h>
-#include <sys/imgact.h>
-#include <sys/bio.h>
-#include <sys/buf.h>
-#include <sys/bus.h>
-#include <sys/cpu.h>
-#include <sys/cons.h>
-#include <sys/exec.h>
-#include <sys/ucontext.h>
-#include <sys/proc.h>
-#include <sys/kdb.h>
-#include <sys/ptrace.h>
-#include <sys/reboot.h>
-#include <sys/signalvar.h>
-#include <sys/sysent.h>
-#include <sys/sysproto.h>
-#include <sys/user.h>
-
-#include <vm/vm.h>
-#include <vm/vm_param.h>
-#include <vm/vm_object.h>
-#include <vm/vm_page.h>
-#include <vm/vm_phys.h>
-#include <vm/vm_dumpset.h>
-
-#include <machine/cache.h>
-#include <machine/clock.h>
-#include <machine/cpu.h>
-#include <machine/cpuinfo.h>
-#include <machine/cpufunc.h>
-#include <machine/cpuregs.h>
-#include <machine/hwfunc.h>
-#include <machine/intr_machdep.h>
-#include <machine/locore.h>
-#include <machine/md_var.h>
-#include <machine/pte.h>
-#include <machine/sigframe.h>
-#include <machine/trap.h>
-
-#include <dev/bhnd/bhnd.h>
-#include <dev/bhnd/bhndreg.h>
-#include <dev/bhnd/bhnd_eromvar.h>
-
-#include <dev/bhnd/bcma/bcma_eromvar.h>
-
-#include <dev/bhnd/siba/sibareg.h>
-#include <dev/bhnd/siba/sibavar.h>
-
-#include <dev/bhnd/cores/chipc/chipcreg.h>
-#include <dev/bhnd/cores/pmu/bhnd_pmureg.h>
-
-#include "bcm_machdep.h"
-#include "bcm_bmips_exts.h"
-
-#ifdef CFE
-#include <dev/cfe/cfe_api.h>
-#include <dev/cfe/cfe_error.h>
-#endif
-
-#if 0
-#define BCM_TRACE(_fmt, ...) printf(_fmt, ##__VA_ARGS__)
-#else
-#define BCM_TRACE(_fmt, ...)
-#endif
-
-static int bcm_init_platform_data(struct bcm_platform *bp);
-
-static int bcm_find_core(struct bcm_platform *bp,
- const struct bhnd_core_match *descs, size_t num_descs,
- struct bhnd_core_info *info, uintptr_t *addr);
-
-static int bcm_erom_probe_and_attach(bhnd_erom_class_t **erom_cls,
- kobj_ops_t erom_ops, bhnd_erom_t *erom, size_t esize,
- struct bhnd_erom_io *eio, struct bhnd_chipid *cid);
-
-extern int *edata;
-extern int *end;
-
-/* from sys/mips/mips/machdep.c */
-extern char cpu_model[];
-
-static struct bcm_platform bcm_platform_data;
-static bool bcm_platform_data_avail = false;
-
-#ifdef CFE
-static struct bcm_nvram_iocfe bcm_cfe_nvram;
-#endif
-
-static const struct bhnd_core_match bcm_chipc_cores[] = {
- { BHND_MATCH_CORE(BHND_MFGID_BCM, BHND_COREID_CC) },
- { BHND_MATCH_CORE(BHND_MFGID_BCM, BHND_COREID_4706_CC) },
-};
-
-static const struct bhnd_core_match bcm_cpu0_cores[] = {
- {
- BHND_MATCH_CORE_CLASS(BHND_DEVCLASS_CPU),
- BHND_MATCH_CORE_UNIT(0)
- }
-};
-
-static const struct bhnd_core_match bcm_pmu_cores[] = {
- { BHND_MATCH_CORE(BHND_MFGID_BCM, BHND_COREID_PMU) },
-};
-
-struct bcm_platform *
-bcm_get_platform(void)
-{
- if (!bcm_platform_data_avail)
- panic("platform data not available");
-
- return (&bcm_platform_data);
-}
-
-static bus_addr_t
-bcm_get_bus_addr(void)
-{
- long maddr;
-
- if (resource_long_value("bhnd", 0, "maddr", &maddr) == 0)
- return ((u_long)maddr);
-
- return (BHND_DEFAULT_CHIPC_ADDR);
-}
-
-static bus_size_t
-bcm_get_bus_size(void)
-{
- long msize;
-
- if (resource_long_value("bhnd", 0, "msize", &msize) == 0)
- return ((u_long)msize);
-
- return (BHND_DEFAULT_ENUM_SIZE);
-}
-
-/**
- * Search the device enumeration table for a core matching @p descs,
- *
- * @param bp Platform state containing a valid EROM parser.
- * @param descs The core match descriptor table.
- * @param num_descs The number of match descriptors in @p descs.
- * @param[out] info If non-NULL, will be populated with the core
- * info.
- * @param[out] addr If non-NULL, will be populated with the core's
- * physical register address.
- */
-static int
-bcm_find_core(struct bcm_platform *bp, const struct bhnd_core_match *descs,
- size_t num_descs, struct bhnd_core_info *info, uintptr_t *addr)
-{
- bhnd_addr_t b_addr;
- bhnd_size_t b_size;
- int error;
-
- /* Fetch core info */
- for (size_t i = 0; i < num_descs; i++) {
- error = bhnd_erom_lookup_core_addr(&bp->erom.obj, &descs[i],
- BHND_PORT_DEVICE, 0, 0, info, &b_addr, &b_size);
-
- /* Terminate search on first match */
- if (error == 0)
- break;
-
- /* Terminate on first error (other than core not found) */
- if (error != ENOENT)
- return (error);
-
- /* Continue search ... */
- }
-
- /* Provide the core's base address */
- if (addr != NULL && b_addr > UINTPTR_MAX) {
- BCM_ERR("core address %#jx overflows native address width\n",
- (uintmax_t)b_addr);
- return (ERANGE);
- }
-
- if (addr != NULL)
- *addr = b_addr;
-
- return (0);
-}
-
-/**
- * Read a variable directly from NVRAM, decoding as @p type.
- *
- * @param bp Platform state.
- * @param name The raw name of the variable to be fetched,
- * including any device path (/pci/1/1/varname) or
- * alias prefix (0:varname).
- * @param[out] buf On success, the requested value will be written
- * to this buffer. This argment may be NULL if
- * the value is not desired.
- * @param[in,out] len The capacity of @p buf. On success, will be set
- * to the actual size of the requested value.
- * @param type The data type to be written to @p buf.
- *
- * @retval 0 success
- * @retval ENOMEM If @p buf is non-NULL and a buffer of @p len is too
- * small to hold the requested value.
- * @retval ENOENT If @p name is not found.
- * @retval EFTYPE If the variable data cannot be coerced to @p type.
- * @retval ERANGE If value coercion would overflow @p type.
- * @retval non-zero If parsing NVRAM otherwise fails, a regular unix error
- * code will be returned.
- */
-int
-bcm_get_nvram(struct bcm_platform *bp, const char *name, void *buf, size_t *len,
- bhnd_nvram_type type)
-{
- if (bp->nvram_io == NULL || bp->nvram_cls == NULL)
- return (ENOENT);
-
- return (bhnd_nvram_data_getvar_direct(bp->nvram_cls, bp->nvram_io, name,
- buf, len, type));
-}
-
-/**
- * Probe and attach a bhnd_erom parser instance for the bhnd bus.
- *
- * @param[out] erom_cls The probed EROM class.
- * @param[out] erom_ops The storage to be used when compiling
- * @p erom_cls.
- * @param[out] erom The storage to be used when initializing the
- * static instance of @p erom_cls.
- * @param esize The total available number of bytes allocated
- * for @p erom. If this is less than is required
- * by @p erom_cls ENOMEM will be returned.
- * @param eio EROM I/O callbacks to be used.
- * @param[out] cid On success, the probed chip identification.
- */
-static int
-bcm_erom_probe_and_attach(bhnd_erom_class_t **erom_cls, kobj_ops_t erom_ops,
- bhnd_erom_t *erom, size_t esize, struct bhnd_erom_io *eio,
- struct bhnd_chipid *cid)
-{
- bhnd_erom_class_t **clsp;
- bus_addr_t bus_addr;
- int error, prio, result;
-
- *erom_cls = NULL;
- prio = 0;
-
- /* Map our first bus core for the erom probe */
- bus_addr = bcm_get_bus_addr();
- if ((error = bhnd_erom_io_map(eio, bus_addr, BHND_DEFAULT_CORE_SIZE))) {
- BCM_ERR("failed to map first core at %#jx+%#jx: %d\n",
- (uintmax_t)bus_addr, (uintmax_t)BHND_DEFAULT_CORE_SIZE,
- error);
-
- return (error);
- }
-
- SET_FOREACH(clsp, bhnd_erom_class_set) {
- struct bhnd_chipid pcid;
- bhnd_erom_class_t *cls;
- struct kobj_ops kops;
-
- cls = *clsp;
-
- /* Compile the class' ops table */
- kobj_class_compile_static(cls, &kops);
-
- /* Probe the bus address */
- result = bhnd_erom_probe(cls, eio, NULL, &pcid);
-
- /* Drop pointer to stack allocated ops table */
- cls->ops = NULL;
-
- /* The parser did not match if an error was returned */
- if (result > 0)
- continue;
-
- /* Check for a new highest priority match */
- if (*erom_cls == NULL || result > prio) {
- prio = result;
-
- *cid = pcid;
- *erom_cls = cls;
- }
-
- /* Terminate immediately on BUS_PROBE_SPECIFIC */
- if (result == BUS_PROBE_SPECIFIC)
- break;
- }
-
- /* Valid EROM class probed? */
- if (*erom_cls == NULL) {
- BCM_ERR("no erom parser found for root bus at %#jx\n",
- (uintmax_t)bus_addr);
-
- return (ENOENT);
- }
-
- /* Using the provided storage, recompile the erom class ... */
- kobj_class_compile_static(*erom_cls, erom_ops);
-
- /* ... and initialize the erom parser instance */
- error = bhnd_erom_init_static(*erom_cls, erom, esize, cid, eio);
-
- return (error);
-}
-
-/**
- * Populate platform configuration data.
- */
-static int
-bcm_init_platform_data(struct bcm_platform *bp)
-{
- bus_addr_t bus_addr, bus_size;
- bus_space_tag_t erom_bst;
- bus_space_handle_t erom_bsh;
- bool aob, pmu;
- int error;
-
- bus_addr = bcm_get_bus_addr();
- bus_size = bcm_get_bus_size();
-
-#ifdef CFE
- /* Fetch CFE console handle (if any). Must be initialized before
- * any calls to printf/early_putc. */
- if ((bp->cfe_console = cfe_getstdhandle(CFE_STDHANDLE_CONSOLE)) < 0)
- bp->cfe_console = -1;
-
- /* Probe CFE NVRAM sources */
- bp->nvram_io = &bcm_cfe_nvram.io;
- error = bcm_nvram_find_cfedev(&bcm_cfe_nvram, &bp->nvram_cls);
- if (error) {
- bp->nvram_io = NULL;
- bp->nvram_cls = NULL;
- }
-#endif /* CFE */
-
- /* Probe and attach device table provider, populating our
- * chip identification */
- erom_bst = mips_bus_space_generic;
- erom_bsh = BCM_SOC_BSH(bus_addr, 0);
-
- error = bhnd_erom_iobus_init(&bp->erom_io, bus_addr, bus_size, erom_bst,
- erom_bsh);
- if (error) {
- BCM_ERR("failed to initialize erom I/O callbacks: %d\n", error);
- return (error);
- }
-
- error = bcm_erom_probe_and_attach(&bp->erom_impl, &bp->erom_ops,
- &bp->erom.obj, sizeof(bp->erom), &bp->erom_io.eio, &bp->cid);
- if (error) {
- BCM_ERR("error attaching erom parser: %d\n", error);
- bhnd_erom_io_fini(&bp->erom_io.eio);
- return (error);
- }
-
- if (bootverbose)
- bhnd_erom_dump(&bp->erom.obj);
-
- /* Fetch chipcommon core info */
- error = bcm_find_core(bp, bcm_chipc_cores, nitems(bcm_chipc_cores),
- &bp->cc_id, &bp->cc_addr);
- if (error) {
- BCM_ERR("error locating chipc core: %d\n", error);
- return (error);
- }
-
- /* All hex formatted IDs are within the range of 0x4000-0x9C3F (40000-1) */
- if (bp->cid.chip_id >= 0x4000 && bp->cid.chip_id <= 0x9C3F)
- snprintf(cpu_model, 10, "BCM%hX", bp->cid.chip_id);
- else
- snprintf(cpu_model, 10, "BCM%hu", bp->cid.chip_id);
-
- /* Fetch chipc capability flags */
- bp->cc_caps = BCM_SOC_READ_4(bp->cc_addr, CHIPC_CAPABILITIES);
- bp->cc_caps_ext = 0x0;
-
- if (CHIPC_HWREV_HAS_CAP_EXT(bp->cc_id.hwrev))
- bp->cc_caps_ext = BCM_CHIPC_READ_4(bp, CHIPC_CAPABILITIES_EXT);
-
- /* Fetch PMU info */
- pmu = CHIPC_GET_FLAG(bp->cc_caps, CHIPC_CAP_PMU);
- aob = CHIPC_GET_FLAG(bp->cc_caps_ext, CHIPC_CAP2_AOB);
-
- if (pmu && aob) {
- /* PMU block mapped to a PMU core on the Always-on-Bus (aob) */
- error = bcm_find_core(bp, bcm_pmu_cores, nitems(bcm_pmu_cores),
- &bp->pmu_id, &bp->pmu_addr);
- if (error) {
- BCM_ERR("error locating pmu core: %d\n", error);
- return (error);
- }
- } else if (pmu) {
- /* PMU block mapped to chipc */
- bp->pmu_addr = bp->cc_addr;
- bp->pmu_id = bp->cc_id;
- } else {
- /* No PMU */
- bp->pmu_addr = 0x0;
- memset(&bp->pmu_id, 0, sizeof(bp->pmu_id));
- }
-
- /* Initialize PMU query state */
- if (pmu) {
- error = bhnd_pmu_query_init(&bp->pmu, NULL, bp->cid,
- &bcm_pmu_soc_io, bp);
- if (error) {
- BCM_ERR("bhnd_pmu_query_init() failed: %d\n", error);
- return (error);
- }
- }
-
- /* Find CPU core info */
- error = bcm_find_core(bp, bcm_cpu0_cores, nitems(bcm_cpu0_cores),
- &bp->cpu_id, &bp->cpu_addr);
- if (error) {
- BCM_ERR("error locating CPU core: %d\n", error);
- return (error);
- }
-
- /* Initialize our platform service registry */
- if ((error = bhnd_service_registry_init(&bp->services))) {
- BCM_ERR("error initializing service registry: %d\n", error);
- return (error);
- }
-
- bcm_platform_data_avail = true;
- return (0);
-}
-
-void
-platform_cpu_init()
-{
- /* Nothing special */
-}
-
-static void
-mips_init(void)
-{
- int i, j;
-
- printf("entry: mips_init()\n");
-
-#ifdef CFE
- /*
- * Query DRAM memory map from CFE.
- */
- physmem = 0;
- for (i = 0; i < 10; i += 2) {
- int result;
- uint64_t addr, len, type;
-
- result = cfe_enummem(i / 2, 0, &addr, &len, &type);
- if (result < 0) {
- BCM_TRACE("There is no phys memory for: %d\n", i);
- phys_avail[i] = phys_avail[i + 1] = 0;
- break;
- }
- if (type != CFE_MI_AVAILABLE) {
- BCM_TRACE("phys memory is not available: %d\n", i);
- continue;
- }
-
- phys_avail[i] = addr;
- if (i == 0 && addr == 0) {
- /*
- * If this is the first physical memory segment probed
- * from CFE, omit the region at the start of physical
- * memory where the kernel has been loaded.
- */
- phys_avail[i] += MIPS_KSEG0_TO_PHYS(kernel_kseg0_end);
- }
-
- BCM_TRACE("phys memory is available for: %d\n", i);
- BCM_TRACE(" => addr = %jx\n", addr);
- BCM_TRACE(" => len = %jd\n", len);
-
- phys_avail[i + 1] = addr + len;
- physmem += len;
- }
-
- BCM_TRACE("Total phys memory is : %ld\n", physmem);
- realmem = btoc(physmem);
-#endif
-
- for (j = 0; j < i; j++)
- dump_avail[j] = phys_avail[j];
-
- physmem = realmem;
-
- init_param1();
- init_param2(physmem);
- mips_cpu_init();
- pmap_bootstrap();
- mips_proc0_init();
- mutex_init();
- kdb_init();
-#ifdef KDB
- if (boothowto & RB_KDB)
- kdb_enter(KDB_WHY_BOOTFLAGS, "Boot flags requested debugger");
-#endif
-}
-
-void
-platform_reset(void)
-{
- struct bcm_platform *bp;
- bool bcm4785war;
-
- printf("bcm::platform_reset()\n");
- intr_disable();
-
-#ifdef CFE
- /* Fall back on CFE if reset requested during platform
- * data initialization */
- if (!bcm_platform_data_avail) {
- cfe_exit(0, 0);
- while (1);
- }
-#endif
-
- bp = bcm_get_platform();
- bcm4785war = false;
-
- /* Handle BCM4785-specific behavior */
- if (bp->cid.chip_id == BHND_CHIPID_BCM4785) {
- bcm4785war = true;
-
- /* Switch to async mode */
- bcm_bmips_wr_pllcfg3(BMIPS_BCMCFG_PLLCFG3_SM);
- }
-
- /* Set watchdog (PMU or ChipCommon) */
- if (bp->pmu_addr != 0x0) {
- BCM_PMU_WRITE_4(bp, BHND_PMU_WATCHDOG, 1);
- } else
- BCM_CHIPC_WRITE_4(bp, CHIPC_WATCHDOG, 1);
-
- /* BCM4785 */
- if (bcm4785war) {
- mips_sync();
- __asm __volatile("wait");
- }
-
- while (1);
-}
-
-void
-platform_start(__register_t a0, __register_t a1, __register_t a2,
- __register_t a3)
-{
- vm_offset_t kernend;
- uint64_t platform_counter_freq;
- int error;
-
- /* clear the BSS and SBSS segments */
- kernend = (vm_offset_t)&end;
- memset(&edata, 0, kernend - (vm_offset_t)(&edata));
-
- mips_postboot_fixup();
-
- /* Initialize pcpu stuff */
- mips_pcpu0_init();
-
-#ifdef CFE
- /*
- * Initialize CFE firmware trampolines. This must be done
- * before any CFE APIs are called, including writing
- * to the CFE console.
- *
- * CFE passes the following values in registers:
- * a0: firmware handle
- * a2: firmware entry point
- * a3: entry point seal
- */
- if (a3 == CFE_EPTSEAL)
- cfe_init(a0, a2);
-#endif
-
- /* Init BCM platform data */
- if ((error = bcm_init_platform_data(&bcm_platform_data)))
- panic("bcm_init_platform_data() failed: %d", error);
-
- platform_counter_freq = bcm_get_cpufreq(bcm_get_platform());
-
- /* CP0 ticks every two cycles */
- mips_timer_early_init(platform_counter_freq / 2);
-
- cninit();
-
- mips_init();
-
- mips_timer_init_params(platform_counter_freq, 1);
-}
-
-/*
- * CFE-based EARLY_PRINTF support. To use, add the following to the kernel
- * config:
- * option EARLY_PRINTF
- * option CFE
- * device cfe
- */
-#if defined(EARLY_PRINTF) && defined(CFE)
-static void
-bcm_cfe_eputc(int c)
-{
- unsigned char ch;
- int handle;
-
- ch = (unsigned char) c;
-
- /* bcm_get_platform() cannot be used here, as we may be called
- * from bcm_init_platform_data(). */
- if ((handle = bcm_platform_data.cfe_console) < 0)
- return;
-
- if (ch == '\n')
- early_putc('\r');
-
- while ((cfe_write(handle, &ch, 1)) == 0)
- continue;
-}
-
-early_putc_t *early_putc = bcm_cfe_eputc;
-#endif /* EARLY_PRINTF */
diff --git a/sys/mips/broadcom/bcm_machdep.h b/sys/mips/broadcom/bcm_machdep.h
deleted file mode 100644
index 7a8b155961b9..000000000000
--- a/sys/mips/broadcom/bcm_machdep.h
+++ /dev/null
@@ -1,138 +0,0 @@
-/*-
- * Copyright (c) 2016 Landon Fuller <landonf@FreeBSD.org>
- * Copyright (c) 2017 The FreeBSD Foundation
- * All rights reserved.
- *
- * Portions of this software were developed by Landon Fuller
- * under sponsorship from the FreeBSD Foundation.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer,
- * without modification.
- * 2. Redistributions in binary form must reproduce at minimum a disclaimer
- * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
- * redistribution must be conditioned upon including a substantially
- * similar Disclaimer requirement for further binary redistribution.
- *
- * NO WARRANTY
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
- * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
- * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
- * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
- * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- * THE POSSIBILITY OF SUCH DAMAGES.
- *
- * $FreeBSD$
- */
-
-#ifndef _MIPS_BROADCOM_BCM_MACHDEP_H_
-#define _MIPS_BROADCOM_BCM_MACHDEP_H_
-
-#include <machine/cpufunc.h>
-#include <machine/cpuregs.h>
-
-#include <dev/bhnd/bhnd.h>
-#include <dev/bhnd/bhnd_eromvar.h>
-
-#include <dev/bhnd/cores/pmu/bhnd_pmuvar.h>
-
-#include "bcm_nvram_cfevar.h"
-
-extern const struct bhnd_pmu_io bcm_pmu_soc_io;
-
-struct bcm_platform {
- struct bhnd_chipid cid; /**< chip id */
- struct bhnd_core_info cc_id; /**< chipc core info */
- uintptr_t cc_addr; /**< chipc core phys address */
- uint32_t cc_caps; /**< chipc capabilities */
- uint32_t cc_caps_ext; /**< chipc extended capabilies */
-
- struct bhnd_core_info cpu_id; /**< cpu core info */
- uintptr_t cpu_addr; /**< cpu core phys address */
-
- /* On non-AOB devices, the PMU register block is mapped to chipc;
- * the pmu_id and pmu_addr values will be copied from cc_id
- * and cc_addr. */
- struct bhnd_core_info pmu_id; /**< PMU core info */
- uintptr_t pmu_addr; /**< PMU core phys address, or
- 0x0 if no PMU */
-
- struct bhnd_pmu_query pmu; /**< PMU query instance */
-
- bhnd_erom_class_t *erom_impl; /**< erom parser class */
- struct kobj_ops erom_ops; /**< compiled kobj opcache */
- struct bhnd_erom_iobus erom_io; /**< erom I/O callbacks */
- union {
- bhnd_erom_static_t data;
- bhnd_erom_t obj;
- } erom;
-
- struct bhnd_nvram_io *nvram_io; /**< NVRAM I/O context, or NULL if unavailable */
- bhnd_nvram_data_class *nvram_cls; /**< NVRAM data class, or NULL if unavailable */
-
- struct bhnd_service_registry services; /**< platform service providers */
-
-#ifdef CFE
- int cfe_console; /**< Console handle, or -1 */
-#endif
-};
-
-struct bcm_platform *bcm_get_platform(void);
-
-uint64_t bcm_get_cpufreq(struct bcm_platform *bp);
-uint64_t bcm_get_sifreq(struct bcm_platform *bp);
-uint64_t bcm_get_alpfreq(struct bcm_platform *bp);
-uint64_t bcm_get_ilpfreq(struct bcm_platform *bp);
-
-u_int bcm_get_uart_rclk(struct bcm_platform *bp);
-
-int bcm_get_nvram(struct bcm_platform *bp,
- const char *name, void *outp, size_t *olen,
- bhnd_nvram_type type);
-
-#define BCM_ERR(fmt, ...) \
- printf("%s: " fmt, __FUNCTION__, ##__VA_ARGS__)
-
-#define BCM_SOC_BSH(_addr, _offset) \
- ((bus_space_handle_t)BCM_SOC_ADDR((_addr), (_offset)))
-
-#define BCM_SOC_ADDR(_addr, _offset) \
- MIPS_PHYS_TO_KSEG1((_addr) + (_offset))
-
-#define BCM_SOC_READ_4(_addr, _offset) \
- readl(BCM_SOC_ADDR((_addr), (_offset)))
-#define BCM_SOC_WRITE_4(_addr, _reg, _val) \
- writel(BCM_SOC_ADDR((_addr), (_offset)), (_val))
-
-#define BCM_CORE_ADDR(_bp, _name, _reg) \
- BCM_SOC_ADDR(_bp->_name, (_reg))
-
-#define BCM_CORE_READ_4(_bp, _name, _reg) \
- readl(BCM_CORE_ADDR(_bp, _name, (_reg)))
-#define BCM_CORE_WRITE_4(_bp, _name, _reg, _val) \
- writel(BCM_CORE_ADDR(_bp, _name, (_reg)), (_val))
-
-#define BCM_CHIPC_READ_4(_bp, _reg) \
- BCM_CORE_READ_4(_bp, cc_addr, (_reg))
-#define BCM_CHIPC_WRITE_4(_bp, _reg, _val) \
- BCM_CORE_WRITE_4(_bp, cc_addr, (_reg), (_val))
-
-#define BCM_CPU_READ_4(_bp, _reg) \
- BCM_CORE_READ_4(_bp, cpu_addr, (_reg))
-#define BCM_CPU_WRITE_4(_bp, _reg, _val) \
- BCM_CORE_WRITE_4(_bp, cpu_addr, (_reg), (_val))
-
-#define BCM_PMU_READ_4(_bp, _reg) \
- BCM_CORE_READ_4(_bp, pmu_addr, (_reg))
-#define BCM_PMU_WRITE_4(_bp, _reg, _val) \
- BCM_CORE_WRITE_4(_bp, pmu_addr, (_reg), (_val))
-
-#endif /* _MIPS_BROADCOM_BCM_MACHDEP_H_ */
diff --git a/sys/mips/broadcom/bcm_mips.c b/sys/mips/broadcom/bcm_mips.c
deleted file mode 100644
index 2c4e8e696a8b..000000000000
--- a/sys/mips/broadcom/bcm_mips.c
+++ /dev/null
@@ -1,696 +0,0 @@
-/*-
- * Copyright (c) 2017 The FreeBSD Foundation
- *
- * This software was developed by Landon Fuller under sponsorship from
- * the FreeBSD Foundation.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/kernel.h>
-#include <sys/bus.h>
-#include <sys/module.h>
-#include <sys/limits.h>
-#include <sys/systm.h>
-
-#include <machine/bus.h>
-#include <machine/intr.h>
-#include <machine/resource.h>
-#include <sys/rman.h>
-
-#include <dev/bhnd/bhnd.h>
-#include <dev/bhnd/siba/sibareg.h>
-
-#include "pic_if.h"
-
-#include "bcm_mipsvar.h"
-
-/*
- * Broadcom MIPS core driver.
- *
- * Abstract driver for Broadcom MIPS CPU/PIC cores.
- */
-
-static uintptr_t bcm_mips_pic_xref(struct bcm_mips_softc *sc);
-static device_t bcm_mips_find_bhnd_parent(device_t dev);
-static int bcm_mips_retain_cpu_intr(struct bcm_mips_softc *sc,
- struct bcm_mips_irqsrc *isrc, struct resource *res);
-static int bcm_mips_release_cpu_intr(struct bcm_mips_softc *sc,
- struct bcm_mips_irqsrc *isrc, struct resource *res);
-
-static const int bcm_mips_debug = 0;
-
-#define DPRINTF(fmt, ...) do { \
- if (bcm_mips_debug) \
- printf("%s: " fmt, __FUNCTION__, ##__VA_ARGS__); \
-} while (0)
-
-#define DENTRY(dev, fmt, ...) do { \
- if (bcm_mips_debug) \
- printf("%s(%s, " fmt ")\n", __FUNCTION__, \
- device_get_nameunit(dev), ##__VA_ARGS__); \
-} while (0)
-
-/**
- * Register all interrupt source definitions.
- */
-static int
-bcm_mips_register_isrcs(struct bcm_mips_softc *sc)
-{
- const char *name;
- uintptr_t xref;
- int error;
-
- xref = bcm_mips_pic_xref(sc);
-
- name = device_get_nameunit(sc->dev);
- for (size_t ivec = 0; ivec < nitems(sc->isrcs); ivec++) {
- sc->isrcs[ivec].ivec = ivec;
- sc->isrcs[ivec].cpuirq = NULL;
- sc->isrcs[ivec].refs = 0;
-
- error = intr_isrc_register(&sc->isrcs[ivec].isrc, sc->dev,
- xref, "%s,%u", name, ivec);
- if (error) {
- for (size_t i = 0; i < ivec; i++)
- intr_isrc_deregister(&sc->isrcs[i].isrc);
-
- device_printf(sc->dev, "error registering IRQ %zu: "
- "%d\n", ivec, error);
- return (error);
- }
- }
-
- return (0);
-}
-
-/**
- * Initialize the given @p cpuirq state as unavailable.
- *
- * @param sc BHND MIPS driver instance state.
- * @param cpuirq The CPU IRQ state to be initialized.
- *
- * @retval 0 success
- * @retval non-zero if initializing @p cpuirq otherwise fails, a regular
- * unix error code will be returned.
- */
-static int
-bcm_mips_init_cpuirq_unavail(struct bcm_mips_softc *sc,
- struct bcm_mips_cpuirq *cpuirq)
-{
- BCM_MIPS_LOCK(sc);
-
- KASSERT(cpuirq->sc == NULL, ("cpuirq already initialized"));
- cpuirq->sc = sc;
- cpuirq->mips_irq = 0;
- cpuirq->irq_rid = -1;
- cpuirq->irq_res = NULL;
- cpuirq->irq_cookie = NULL;
- cpuirq->isrc_solo = NULL;
- cpuirq->refs = 0;
-
- BCM_MIPS_UNLOCK(sc);
-
- return (0);
-}
-
-/**
- * Allocate required resources and initialize the given @p cpuirq state.
- *
- * @param sc BHND MIPS driver instance state.
- * @param cpuirq The CPU IRQ state to be initialized.
- * @param rid The resource ID to be assigned for the CPU IRQ resource,
- * or -1 if no resource should be assigned.
- * @param irq The MIPS HW IRQ# to be allocated.
- * @param filter The interrupt filter to be setup.
- *
- * @retval 0 success
- * @retval non-zero if initializing @p cpuirq otherwise fails, a regular
- * unix error code will be returned.
- */
-static int
-bcm_mips_init_cpuirq(struct bcm_mips_softc *sc, struct bcm_mips_cpuirq *cpuirq,
- int rid, u_int irq, driver_filter_t filter)
-{
- struct resource *res;
- void *cookie;
- u_int irq_real;
- int error;
-
- /* Must fall within MIPS HW IRQ range */
- if (irq >= NHARD_IRQS)
- return (EINVAL);
-
- /* HW IRQs are numbered relative to SW IRQs */
- irq_real = irq + NSOFT_IRQS;
-
- /* Try to assign and allocate the resource */
- BCM_MIPS_LOCK(sc);
-
- KASSERT(cpuirq->sc == NULL, ("cpuirq already initialized"));
-
- error = bus_set_resource(sc->dev, SYS_RES_IRQ, rid, irq_real, 1);
- if (error) {
- BCM_MIPS_UNLOCK(sc);
- device_printf(sc->dev, "failed to assign interrupt %u: "
- "%d\n", irq, error);
- return (error);
- }
-
- res = bus_alloc_resource_any(sc->dev, SYS_RES_IRQ, &rid, RF_ACTIVE);
- if (res == NULL) {
- BCM_MIPS_UNLOCK(sc);
- device_printf(sc->dev, "failed to allocate interrupt "
- "%u resource\n", irq);
- bus_delete_resource(sc->dev, SYS_RES_IRQ, rid);
- return (ENXIO);
- }
-
- error = bus_setup_intr(sc->dev, res,
- INTR_TYPE_MISC | INTR_MPSAFE | INTR_EXCL, filter, NULL, cpuirq,
- &cookie);
- if (error) {
- BCM_MIPS_UNLOCK(sc);
-
- printf("failed to setup internal interrupt handler: %d\n",
- error);
-
- bus_release_resource(sc->dev, SYS_RES_IRQ, rid, res);
- bus_delete_resource(sc->dev, SYS_RES_IRQ, rid);
-
- return (error);
- }
-
- /* Initialize CPU IRQ state */
- cpuirq->sc = sc;
- cpuirq->mips_irq = irq;
- cpuirq->irq_rid = rid;
- cpuirq->irq_res = res;
- cpuirq->irq_cookie = cookie;
- cpuirq->isrc_solo = NULL;
- cpuirq->refs = 0;
-
- BCM_MIPS_UNLOCK(sc);
- return (0);
-}
-
-/**
- * Free any resources associated with the given @p cpuirq state.
- *
- * @param sc BHND MIPS driver instance state.
- * @param cpuirq A CPU IRQ instance previously successfully initialized
- * via bcm_mips_init_cpuirq().
- *
- * @retval 0 success
- * @retval non-zero if finalizing @p cpuirq otherwise fails, a regular
- * unix error code will be returned.
- */
-static int
-bcm_mips_fini_cpuirq(struct bcm_mips_softc *sc, struct bcm_mips_cpuirq *cpuirq)
-{
- int error;
-
- BCM_MIPS_LOCK(sc);
-
- if (cpuirq->sc == NULL) {
- KASSERT(cpuirq->irq_res == NULL, ("leaking cpuirq resource"));
-
- BCM_MIPS_UNLOCK(sc);
- return (0); /* not initialized */
- }
-
- if (cpuirq->refs != 0) {
- BCM_MIPS_UNLOCK(sc);
- return (EBUSY);
- }
-
- if (cpuirq->irq_cookie != NULL) {
- KASSERT(cpuirq->irq_res != NULL, ("resource missing"));
-
- error = bus_teardown_intr(sc->dev, cpuirq->irq_res,
- cpuirq->irq_cookie);
- if (error) {
- BCM_MIPS_UNLOCK(sc);
- return (error);
- }
-
- cpuirq->irq_cookie = NULL;
- }
-
- if (cpuirq->irq_res != NULL) {
- bus_release_resource(sc->dev, SYS_RES_IRQ, cpuirq->irq_rid,
- cpuirq->irq_res);
- cpuirq->irq_res = NULL;
- }
-
- if (cpuirq->irq_rid != -1) {
- bus_delete_resource(sc->dev, SYS_RES_IRQ, cpuirq->irq_rid);
- cpuirq->irq_rid = -1;
- }
-
- BCM_MIPS_UNLOCK(sc);
-
- return (0);
-}
-
-static int
-bcm_mips_attach_default(device_t dev)
-{
- /* subclassing drivers must provide an implementation of
- * DEVICE_ATTACH() */
- panic("device_attach() unimplemented");
-}
-
-/**
- * BHND MIPS device attach.
- *
- * This must be called from subclass drivers' DEVICE_ATTACH().
- *
- * @param dev BHND MIPS device.
- * @param num_cpuirqs The number of usable MIPS HW IRQs.
- * @param timer_irq The MIPS HW IRQ assigned to the MIPS CPU timer.
- * @param filter The subclass's core-specific IRQ dispatch filter. Will be
- * passed the associated bcm_mips_cpuirq instance as its argument.
- */
-int
-bcm_mips_attach(device_t dev, u_int num_cpuirqs, u_int timer_irq,
- driver_filter_t filter)
-{
- struct bcm_mips_softc *sc;
- struct intr_pic *pic;
- uintptr_t xref;
- u_int irq_rid;
- rman_res_t irq;
- int error;
-
- sc = device_get_softc(dev);
- sc->dev = dev;
- sc->num_cpuirqs = num_cpuirqs;
- sc->timer_irq = timer_irq;
-
- /* Must not exceed the actual size of our fixed IRQ array */
- if (sc->num_cpuirqs > nitems(sc->cpuirqs)) {
- device_printf(dev, "%u nirqs exceeds maximum supported %zu",
- sc->num_cpuirqs, nitems(sc->cpuirqs));
- return (ENXIO);
- }
-
- pic = NULL;
- xref = bcm_mips_pic_xref(sc);
-
- BCM_MIPS_LOCK_INIT(sc);
-
- /* Register our interrupt sources */
- if ((error = bcm_mips_register_isrcs(sc))) {
- BCM_MIPS_LOCK_DESTROY(sc);
- return (error);
- }
-
- /* Initialize our CPU interrupt state */
- irq_rid = bhnd_get_intr_count(dev); /* last bhnd-assigned RID + 1 */
- irq = 0;
- for (u_int i = 0; i < sc->num_cpuirqs; i++) {
- /* Must not overflow signed resource ID representation */
- if (irq_rid >= INT_MAX) {
- device_printf(dev, "exhausted IRQ resource IDs\n");
- error = ENOMEM;
- goto failed;
- }
-
- if (irq == sc->timer_irq) {
- /* Mark the CPU timer's IRQ as unavailable */
- error = bcm_mips_init_cpuirq_unavail(sc,
- &sc->cpuirqs[i]);
- } else {
- /* Initialize state */
- error = bcm_mips_init_cpuirq(sc, &sc->cpuirqs[i],
- irq_rid, irq, filter);
- }
-
- if (error)
- goto failed;
-
- /* Increment IRQ and resource ID for next allocation */
- irq_rid++;
- irq++;
- }
-
- /* Sanity check; our shared IRQ must be available */
- if (sc->num_cpuirqs <= BCM_MIPS_IRQ_SHARED)
- panic("missing shared interrupt %d\n", BCM_MIPS_IRQ_SHARED);
-
- if (sc->cpuirqs[BCM_MIPS_IRQ_SHARED].irq_rid == -1)
- panic("shared interrupt %d unavailable", BCM_MIPS_IRQ_SHARED);
-
- /* Register PIC */
- if ((pic = intr_pic_register(dev, xref)) == NULL) {
- device_printf(dev, "error registering PIC\n");
- error = ENXIO;
- goto failed;
- }
-
- return (0);
-
-failed:
- /* Deregister PIC before performing any other cleanup */
- if (pic != NULL)
- intr_pic_deregister(dev, 0);
-
- /* Deregister all interrupt sources */
- for (size_t i = 0; i < nitems(sc->isrcs); i++)
- intr_isrc_deregister(&sc->isrcs[i].isrc);
-
- /* Free our MIPS CPU interrupt handler state */
- for (u_int i = 0; i < sc->num_cpuirqs; i++)
- bcm_mips_fini_cpuirq(sc, &sc->cpuirqs[i]);
-
- BCM_MIPS_LOCK_DESTROY(sc);
- return (error);
-}
-
-int
-bcm_mips_detach(device_t dev)
-{
- struct bcm_mips_softc *sc;
-
- sc = device_get_softc(dev);
-
- /* Deregister PIC before performing any other cleanup */
- intr_pic_deregister(dev, 0);
-
- /* Deregister all interrupt sources */
- for (size_t i = 0; i < nitems(sc->isrcs); i++)
- intr_isrc_deregister(&sc->isrcs[i].isrc);
-
- /* Free our MIPS CPU interrupt handler state */
- for (u_int i = 0; i < sc->num_cpuirqs; i++)
- bcm_mips_fini_cpuirq(sc, &sc->cpuirqs[i]);
-
- return (0);
-}
-
-/* PIC_MAP_INTR() */
-static int
-bcm_mips_pic_map_intr(device_t dev, struct intr_map_data *d,
- struct intr_irqsrc **isrcp)
-{
- struct bcm_mips_softc *sc;
- struct bcm_mips_intr_map_data *data;
-
- sc = device_get_softc(dev);
-
- if (d->type != INTR_MAP_DATA_BCM_MIPS) {
- DENTRY(dev, "type=%d", d->type);
- return (ENOTSUP);
- }
-
- data = (struct bcm_mips_intr_map_data *)d;
- DENTRY(dev, "type=%d, ivec=%u", d->type, data->ivec);
- if (data->ivec < 0 || data->ivec >= nitems(sc->isrcs))
- return (EINVAL);
-
- *isrcp = &sc->isrcs[data->ivec].isrc;
- return (0);
-}
-
-/* PIC_SETUP_INTR() */
-static int
-bcm_mips_pic_setup_intr(device_t dev, struct intr_irqsrc *irqsrc,
- struct resource *res, struct intr_map_data *data)
-{
- struct bcm_mips_softc *sc;
- struct bcm_mips_irqsrc *isrc;
- int error;
-
- sc = device_get_softc(dev);
- isrc = (struct bcm_mips_irqsrc *)irqsrc;
-
- /* Assign a CPU interrupt */
- BCM_MIPS_LOCK(sc);
- error = bcm_mips_retain_cpu_intr(sc, isrc, res);
- BCM_MIPS_UNLOCK(sc);
-
- return (error);
-}
-
-/* PIC_TEARDOWN_INTR() */
-static int
-bcm_mips_pic_teardown_intr(device_t dev, struct intr_irqsrc *irqsrc,
- struct resource *res, struct intr_map_data *data)
-{
- struct bcm_mips_softc *sc;
- struct bcm_mips_irqsrc *isrc;
- int error;
-
- sc = device_get_softc(dev);
- isrc = (struct bcm_mips_irqsrc *)irqsrc;
-
- /* Release the CPU interrupt */
- BCM_MIPS_LOCK(sc);
- error = bcm_mips_release_cpu_intr(sc, isrc, res);
- BCM_MIPS_UNLOCK(sc);
-
- return (error);
-}
-
-/** return our PIC's xref */
-static uintptr_t
-bcm_mips_pic_xref(struct bcm_mips_softc *sc)
-{
- uintptr_t xref;
-
- /* Determine our interrupt domain */
- xref = BHND_BUS_GET_INTR_DOMAIN(device_get_parent(sc->dev), sc->dev,
- true);
- KASSERT(xref != 0, ("missing interrupt domain"));
-
- return (xref);
-}
-
-/**
- * Walk up the device tree from @p dev until we find a bhnd-attached core,
- * returning either the core, or NULL if @p dev is not attached under a bhnd
- * bus.
- */
-static device_t
-bcm_mips_find_bhnd_parent(device_t dev)
-{
- device_t core, bus;
- devclass_t bhnd_class;
-
- bhnd_class = devclass_find("bhnd");
- core = dev;
- while ((bus = device_get_parent(core)) != NULL) {
- if (device_get_devclass(bus) == bhnd_class)
- return (core);
-
- core = bus;
- }
-
- /* Not found */
- return (NULL);
-}
-
-/**
- * Retain @p isrc and assign a MIPS CPU interrupt on behalf of @p res; if
- * the @p isrc already has a MIPS CPU interrupt assigned, the existing
- * reference will be left unmodified.
- *
- * @param sc BHND MIPS driver state.
- * @param isrc The interrupt source corresponding to @p res.
- * @param res The interrupt resource for which a MIPS CPU IRQ will be
- * assigned.
- */
-static int
-bcm_mips_retain_cpu_intr(struct bcm_mips_softc *sc,
- struct bcm_mips_irqsrc *isrc, struct resource *res)
-{
- struct bcm_mips_cpuirq *cpuirq;
- bhnd_devclass_t devclass;
- device_t core;
-
- BCM_MIPS_LOCK_ASSERT(sc, MA_OWNED);
-
- /* Prefer existing assignment */
- if (isrc->cpuirq != NULL) {
- KASSERT(isrc->cpuirq->refs > 0, ("assigned IRQ has no "
- "references"));
-
- /* Increment our reference count */
- if (isrc->refs == UINT_MAX)
- return (ENOMEM); /* would overflow */
-
- isrc->refs++;
- return (0);
- }
-
- /* Use the device class of the bhnd core to which the interrupt
- * vector is routed to determine whether a shared interrupt should
- * be preferred. */
- devclass = BHND_DEVCLASS_OTHER;
- core = bcm_mips_find_bhnd_parent(rman_get_device(res));
- if (core != NULL)
- devclass = bhnd_get_class(core);
-
- switch (devclass) {
- case BHND_DEVCLASS_CC:
- case BHND_DEVCLASS_CC_B:
- case BHND_DEVCLASS_PMU:
- case BHND_DEVCLASS_RAM:
- case BHND_DEVCLASS_MEMC:
- case BHND_DEVCLASS_CPU:
- case BHND_DEVCLASS_SOC_ROUTER:
- case BHND_DEVCLASS_SOC_BRIDGE:
- case BHND_DEVCLASS_EROM:
- case BHND_DEVCLASS_NVRAM:
- /* Always use a shared interrupt for these devices */
- cpuirq = &sc->cpuirqs[BCM_MIPS_IRQ_SHARED];
- break;
-
- case BHND_DEVCLASS_PCI:
- case BHND_DEVCLASS_PCIE:
- case BHND_DEVCLASS_PCCARD:
- case BHND_DEVCLASS_ENET:
- case BHND_DEVCLASS_ENET_MAC:
- case BHND_DEVCLASS_ENET_PHY:
- case BHND_DEVCLASS_WLAN:
- case BHND_DEVCLASS_WLAN_MAC:
- case BHND_DEVCLASS_WLAN_PHY:
- case BHND_DEVCLASS_USB_HOST:
- case BHND_DEVCLASS_USB_DEV:
- case BHND_DEVCLASS_USB_DUAL:
- case BHND_DEVCLASS_OTHER:
- case BHND_DEVCLASS_INVALID:
- default:
- /* Fall back on a shared interrupt */
- cpuirq = &sc->cpuirqs[BCM_MIPS_IRQ_SHARED];
-
- /* Try to assign a dedicated MIPS HW interrupt */
- for (u_int i = 0; i < sc->num_cpuirqs; i++) {
- if (i == BCM_MIPS_IRQ_SHARED)
- continue;
-
- if (sc->cpuirqs[i].irq_rid == -1)
- continue; /* unavailable */
-
- if (sc->cpuirqs[i].refs != 0)
- continue; /* already assigned */
-
- /* Found an unused CPU IRQ */
- cpuirq = &sc->cpuirqs[i];
- break;
- }
-
- break;
- }
-
- DPRINTF("routing backplane interrupt vector %u to MIPS IRQ %u\n",
- isrc->ivec, cpuirq->mips_irq);
-
- KASSERT(isrc->cpuirq == NULL, ("CPU IRQ already assigned"));
- KASSERT(isrc->refs == 0, ("isrc has active references with no "
- "assigned CPU IRQ"));
- KASSERT(cpuirq->refs == 1 || cpuirq->isrc_solo == NULL,
- ("single isrc dispatch enabled on cpuirq with multiple refs"));
-
- /* Verify that bumping the cpuirq refcount below will not overflow */
- if (cpuirq->refs == UINT_MAX)
- return (ENOMEM);
-
- /* Increment cpuirq refcount on behalf of the isrc */
- cpuirq->refs++;
-
- /* Increment isrc refcount on behalf of the caller */
- isrc->refs++;
-
- /* Assign the IRQ to the isrc */
- isrc->cpuirq = cpuirq;
-
- /* Can we enable the single isrc dispatch path? */
- if (cpuirq->refs == 1 && cpuirq->mips_irq != BCM_MIPS_IRQ_SHARED)
- cpuirq->isrc_solo = isrc;
-
- return (0);
-}
-
-/**
- * Release the MIPS CPU interrupt assigned to @p isrc on behalf of @p res.
- *
- * @param sc BHND MIPS driver state.
- * @param isrc The interrupt source corresponding to @p res.
- * @param res The interrupt resource being activated.
- */
-static int
-bcm_mips_release_cpu_intr(struct bcm_mips_softc *sc,
- struct bcm_mips_irqsrc *isrc, struct resource *res)
-{
- struct bcm_mips_cpuirq *cpuirq;
-
- BCM_MIPS_LOCK_ASSERT(sc, MA_OWNED);
-
- /* Decrement the refcount */
- KASSERT(isrc->refs > 0, ("isrc over-release"));
- isrc->refs--;
-
- /* Nothing else to do if the isrc is still actively referenced */
- if (isrc->refs > 0)
- return (0);
-
- /* Otherwise, we need to release our CPU IRQ reference */
- cpuirq = isrc->cpuirq;
- isrc->cpuirq = NULL;
-
- KASSERT(cpuirq != NULL, ("no assigned IRQ"));
- KASSERT(cpuirq->refs > 0, ("cpuirq over-release"));
-
- /* Disable single isrc dispatch path */
- if (cpuirq->refs == 1 && cpuirq->isrc_solo != NULL) {
- KASSERT(cpuirq->isrc_solo == isrc, ("invalid solo isrc"));
- cpuirq->isrc_solo = NULL;
- }
-
- cpuirq->refs--;
-
- return (0);
-}
-
-static device_method_t bcm_mips_methods[] = {
- /* Device interface */
- DEVMETHOD(device_attach, bcm_mips_attach_default),
- DEVMETHOD(device_detach, bcm_mips_detach),
-
- /* Interrupt controller interface */
- DEVMETHOD(pic_map_intr, bcm_mips_pic_map_intr),
- DEVMETHOD(pic_setup_intr, bcm_mips_pic_setup_intr),
- DEVMETHOD(pic_teardown_intr, bcm_mips_pic_teardown_intr),
-
- DEVMETHOD_END
-};
-
-DEFINE_CLASS_0(bcm_mips, bcm_mips_driver, bcm_mips_methods, sizeof(struct bcm_mips_softc));
-
-MODULE_VERSION(bcm_mips, 1);
-MODULE_DEPEND(bcm_mips, bhnd, 1, 1, 1);
diff --git a/sys/mips/broadcom/bcm_mips74k.c b/sys/mips/broadcom/bcm_mips74k.c
deleted file mode 100644
index dc86d4736b88..000000000000
--- a/sys/mips/broadcom/bcm_mips74k.c
+++ /dev/null
@@ -1,391 +0,0 @@
-/*-
- * Copyright (c) 2016 Michael Zhilin <mizhka@gmail.com>
- * Copyright (c) 2016 Landon Fuller <landonf@FreeBSD.org>
- * Copyright (c) 2017 The FreeBSD Foundation
- * All rights reserved.
- *
- * Portions of this software were developed by Landon Fuller
- * under sponsorship from the FreeBSD Foundation.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer,
- * without modification.
- * 2. Redistributions in binary form must reproduce at minimum a disclaimer
- * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
- * redistribution must be conditioned upon including a substantially
- * similar Disclaimer requirement for further binary redistribution.
- *
- * NO WARRANTY
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
- * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
- * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
- * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
- * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- * THE POSSIBILITY OF SUCH DAMAGES.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/kernel.h>
-#include <sys/bus.h>
-#include <sys/module.h>
-#include <sys/proc.h>
-
-#include <machine/bus.h>
-#include <sys/rman.h>
-
-#include <machine/cpufunc.h>
-#include <machine/intr.h>
-#include <machine/resource.h>
-
-#include <dev/bhnd/bhnd.h>
-#include <dev/bhnd/bcma/bcma_dmp.h>
-
-#include "pic_if.h"
-
-#include "bcm_machdep.h"
-
-#include "bcm_mipsvar.h"
-#include "bcm_mips74kreg.h"
-
-/*
- * Broadcom MIPS74K Core
- *
- * These cores are only found on bcma(4) chipsets.
- */
-
-struct bcm_mips74k_softc;
-
-static int bcm_mips74k_pic_intr(void *arg);
-static void bcm_mips74k_mask_irq(struct bcm_mips74k_softc *sc,
- u_int mips_irq, u_int ivec);
-static void bcm_mips74k_unmask_irq(struct bcm_mips74k_softc *sc,
- u_int mips_irq, u_int ivec);
-
-static const struct bhnd_device bcm_mips74k_devs[] = {
- BHND_DEVICE(MIPS, MIPS74K, NULL, NULL, BHND_DF_SOC),
- BHND_DEVICE_END
-};
-
-struct bcm_mips74k_softc {
- struct bcm_mips_softc bcm_mips; /**< parent softc */
- device_t dev;
- struct resource *mem; /**< cpu core registers */
- int mem_rid;
-};
-
-/* Early routing of the CPU timer interrupt is required */
-static void
-bcm_mips74k_timer_init(void *unused)
-{
- struct bcm_platform *bp;
- u_int irq;
- uint32_t mask;
-
- bp = bcm_get_platform();
-
- /* Must be a MIPS74K core attached to a BCMA interconnect */
- if (!bhnd_core_matches(&bp->cpu_id, &(struct bhnd_core_match) {
- BHND_MATCH_CORE(BHND_MFGID_MIPS, BHND_COREID_MIPS74K)
- })) {
- if (bootverbose) {
- BCM_ERR("not a MIPS74K core: %s %s\n",
- bhnd_vendor_name(bp->cpu_id.vendor),
- bhnd_core_name(&bp->cpu_id));
- }
-
- return;
- }
-
- if (!BHND_CHIPTYPE_IS_BCMA_COMPATIBLE(bp->cid.chip_type)) {
- if (bootverbose)
- BCM_ERR("not a BCMA device\n");
- return;
- }
-
- /* Route the timer bus ivec to the CPU's timer IRQ, and disable any
- * other vectors assigned to the IRQ. */
- irq = BCM_MIPS74K_GET_TIMER_IRQ();
- mask = BCM_MIPS74K_INTR_SEL_FLAG(BCM_MIPS74K_TIMER_IVEC);
-
- BCM_CPU_WRITE_4(bp, BCM_MIPS74K_INTR_SEL(irq), mask);
-}
-
-static int
-bcm_mips74k_probe(device_t dev)
-{
- const struct bhnd_device *id;
- const struct bhnd_chipid *cid;
-
- id = bhnd_device_lookup(dev, bcm_mips74k_devs,
- sizeof(bcm_mips74k_devs[0]));
- if (id == NULL)
- return (ENXIO);
-
- /* Check the chip type; the MIPS74K core should only be found
- * on bcma(4) chipsets (and we rely on bcma OOB interrupt
- * routing). */
- cid = bhnd_get_chipid(dev);
- if (!BHND_CHIPTYPE_IS_BCMA_COMPATIBLE(cid->chip_type))
- return (ENXIO);
-
- bhnd_set_default_core_desc(dev);
- return (BUS_PROBE_DEFAULT);
-}
-
-static int
-bcm_mips74k_attach(device_t dev)
-{
- struct bcm_mips74k_softc *sc;
- u_int timer_irq;
- int error;
-
- sc = device_get_softc(dev);
- sc->dev = dev;
-
- /* Allocate our core's register block */
- sc->mem_rid = 0;
- sc->mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->mem_rid,
- RF_ACTIVE);
- if (sc->mem == NULL) {
- device_printf(dev, "failed to allocate cpu register block\n");
- return (ENXIO);
- }
-
- /* Clear interrupt map */
- timer_irq = BCM_MIPS74K_GET_TIMER_IRQ();
- for (size_t i = 0; i < BCM_MIPS74K_NUM_INTR; i++) {
- /* We don't use the timer IRQ; leave it routed to the
- * MIPS CPU */
- if (i == timer_irq)
- continue;
-
- bus_write_4(sc->mem, BCM_MIPS74K_INTR_SEL(i), 0);
- }
-
- /* Initialize the generic BHND MIPS driver state */
- error = bcm_mips_attach(dev, BCM_MIPS74K_NUM_INTR, timer_irq,
- bcm_mips74k_pic_intr);
- if (error) {
- bus_release_resource(dev, SYS_RES_MEMORY, sc->mem_rid, sc->mem);
- return (error);
- }
-
- return (0);
-}
-
-static int
-bcm_mips74k_detach(device_t dev)
-{
- struct bcm_mips74k_softc *sc;
- int error;
-
- sc = device_get_softc(dev);
-
- if ((error = bcm_mips_detach(dev)))
- return (error);
-
- bus_release_resource(dev, SYS_RES_MEMORY, sc->mem_rid, sc->mem);
-
- return (0);
-}
-
-/* PIC_DISABLE_INTR() */
-static void
-bcm_mips74k_pic_disable_intr(device_t dev, struct intr_irqsrc *irqsrc)
-{
- struct bcm_mips74k_softc *sc;
- struct bcm_mips_irqsrc *isrc;
-
- sc = device_get_softc(dev);
- isrc = (struct bcm_mips_irqsrc *)irqsrc;
-
- KASSERT(isrc->cpuirq != NULL, ("no assigned MIPS IRQ"));
-
- bcm_mips74k_mask_irq(sc, isrc->cpuirq->mips_irq, isrc->ivec);
-}
-
-/* PIC_ENABLE_INTR() */
-static void
-bcm_mips74k_pic_enable_intr(device_t dev, struct intr_irqsrc *irqsrc)
-{
- struct bcm_mips74k_softc *sc;
- struct bcm_mips_irqsrc *isrc;
-
- sc = device_get_softc(dev);
- isrc = (struct bcm_mips_irqsrc *)irqsrc;
-
- KASSERT(isrc->cpuirq != NULL, ("no assigned MIPS IRQ"));
-
- bcm_mips74k_unmask_irq(sc, isrc->cpuirq->mips_irq, isrc->ivec);
-}
-
-/* PIC_PRE_ITHREAD() */
-static void
-bcm_mips74k_pic_pre_ithread(device_t dev, struct intr_irqsrc *isrc)
-{
- bcm_mips74k_pic_disable_intr(dev, isrc);
-}
-
-/* PIC_POST_ITHREAD() */
-static void
-bcm_mips74k_pic_post_ithread(device_t dev, struct intr_irqsrc *isrc)
-{
- bcm_mips74k_pic_enable_intr(dev, isrc);
-}
-
-/* PIC_POST_FILTER() */
-static void
-bcm_mips74k_pic_post_filter(device_t dev, struct intr_irqsrc *isrc)
-{
-}
-
-/**
- * Disable routing of backplane interrupt vector @p ivec to MIPS IRQ
- * @p mips_irq.
- */
-static void
-bcm_mips74k_mask_irq(struct bcm_mips74k_softc *sc, u_int mips_irq, u_int ivec)
-{
- uint32_t oobsel;
-
- KASSERT(mips_irq < sc->bcm_mips.num_cpuirqs, ("invalid MIPS IRQ %u",
- mips_irq));
- KASSERT(mips_irq < BCM_MIPS74K_NUM_INTR, ("unsupported MIPS IRQ %u",
- mips_irq));
- KASSERT(ivec < BCMA_OOB_NUM_BUSLINES, ("invalid backplane ivec"));
-
- oobsel = bus_read_4(sc->mem, BCM_MIPS74K_INTR_SEL(mips_irq));
- oobsel &= ~(BCM_MIPS74K_INTR_SEL_FLAG(ivec));
- bus_write_4(sc->mem, BCM_MIPS74K_INTR_SEL(mips_irq), oobsel);
-}
-
-/**
- * Enable routing of an interrupt.
- */
-static void
-bcm_mips74k_unmask_irq(struct bcm_mips74k_softc *sc, u_int mips_irq, u_int ivec)
-{
- uint32_t oobsel;
-
- KASSERT(mips_irq < sc->bcm_mips.num_cpuirqs, ("invalid MIPS IRQ %u",
- mips_irq));
- KASSERT(mips_irq < BCM_MIPS74K_NUM_INTR, ("unsupported MIPS IRQ %u",
- mips_irq));
- KASSERT(ivec < BCMA_OOB_NUM_BUSLINES, ("invalid backplane ivec"));
-
- oobsel = bus_read_4(sc->mem, BCM_MIPS74K_INTR_SEL(mips_irq));
- oobsel |= BCM_MIPS74K_INTR_SEL_FLAG(ivec);
- bus_write_4(sc->mem, BCM_MIPS74K_INTR_SEL(mips_irq), oobsel);
-}
-
-/* our MIPS CPU interrupt filter */
-static int
-bcm_mips74k_pic_intr(void *arg)
-{
- struct bcm_mips74k_softc *sc;
- struct bcm_mips_cpuirq *cpuirq;
- struct bcm_mips_irqsrc *isrc_solo;
- uint32_t oobsel, intr;
- u_int i;
- int error;
-
- cpuirq = arg;
- sc = (struct bcm_mips74k_softc*)cpuirq->sc;
-
- /* Fetch current interrupt state */
- intr = bus_read_4(sc->mem, BCM_MIPS74K_INTR_STATUS);
-
- /* Fetch mask of interrupt vectors routed to this MIPS IRQ */
- KASSERT(cpuirq->mips_irq < BCM_MIPS74K_NUM_INTR,
- ("invalid irq %u", cpuirq->mips_irq));
-
- oobsel = bus_read_4(sc->mem, BCM_MIPS74K_INTR_SEL(cpuirq->mips_irq));
-
- /* Ignore interrupts not routed to this MIPS IRQ */
- intr &= oobsel;
-
- /* Handle isrc_solo direct dispatch path */
- isrc_solo = cpuirq->isrc_solo;
- if (isrc_solo != NULL) {
- if (intr & BCM_MIPS_IVEC_MASK(isrc_solo)) {
- error = intr_isrc_dispatch(&isrc_solo->isrc,
- curthread->td_intr_frame);
- if (error) {
- device_printf(sc->dev, "Stray interrupt %u "
- "detected\n", isrc_solo->ivec);
- bcm_mips74k_pic_disable_intr(sc->dev,
- &isrc_solo->isrc);
- }
- }
-
- intr &= ~(BCM_MIPS_IVEC_MASK(isrc_solo));
- if (intr == 0)
- return (FILTER_HANDLED);
-
- /* Report and mask additional stray interrupts */
- while ((i = fls(intr)) != 0) {
- i--; /* Get a 0-offset interrupt. */
- intr &= ~(1 << i);
-
- device_printf(sc->dev, "Stray interrupt %u "
- "detected\n", i);
- bcm_mips74k_mask_irq(sc, cpuirq->mips_irq, i);
- }
-
- return (FILTER_HANDLED);
- }
-
- /* Standard dispatch path */
- while ((i = fls(intr)) != 0) {
- i--; /* Get a 0-offset interrupt. */
- intr &= ~(1 << i);
-
- KASSERT(i < nitems(sc->bcm_mips.isrcs), ("invalid ivec %u", i));
-
- error = intr_isrc_dispatch(&sc->bcm_mips.isrcs[i].isrc,
- curthread->td_intr_frame);
- if (error) {
- device_printf(sc->dev, "Stray interrupt %u detected\n",
- i);
- bcm_mips74k_mask_irq(sc, cpuirq->mips_irq, i);
- continue;
- }
- }
-
- return (FILTER_HANDLED);
-}
-
-static device_method_t bcm_mips74k_methods[] = {
- /* Device interface */
- DEVMETHOD(device_probe, bcm_mips74k_probe),
- DEVMETHOD(device_attach, bcm_mips74k_attach),
- DEVMETHOD(device_detach, bcm_mips74k_detach),
-
- /* Interrupt controller interface */
- DEVMETHOD(pic_disable_intr, bcm_mips74k_pic_disable_intr),
- DEVMETHOD(pic_enable_intr, bcm_mips74k_pic_enable_intr),
- DEVMETHOD(pic_pre_ithread, bcm_mips74k_pic_pre_ithread),
- DEVMETHOD(pic_post_ithread, bcm_mips74k_pic_post_ithread),
- DEVMETHOD(pic_post_filter, bcm_mips74k_pic_post_filter),
-
- DEVMETHOD_END
-};
-
-static devclass_t bcm_mips_devclass;
-
-DEFINE_CLASS_1(bcm_mips, bcm_mips74k_driver, bcm_mips74k_methods, sizeof(struct bcm_mips_softc), bcm_mips_driver);
-EARLY_DRIVER_MODULE(bcm_mips74k, bhnd, bcm_mips74k_driver, bcm_mips_devclass, 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE);
-SYSINIT(cpu_init, SI_SUB_CPU, SI_ORDER_FIRST, bcm_mips74k_timer_init, NULL);
-MODULE_VERSION(bcm_mips74k, 1);
-MODULE_DEPEND(bcm_mips74k, bhnd, 1, 1, 1);
diff --git a/sys/mips/broadcom/bcm_mips74kreg.h b/sys/mips/broadcom/bcm_mips74kreg.h
deleted file mode 100644
index 92e8a8e53ef0..000000000000
--- a/sys/mips/broadcom/bcm_mips74kreg.h
+++ /dev/null
@@ -1,67 +0,0 @@
-/*-
- * Copyright (c) 2016 Landon Fuller <landonf@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer,
- * without modification.
- * 2. Redistributions in binary form must reproduce at minimum a disclaimer
- * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
- * redistribution must be conditioned upon including a substantially
- * similar Disclaimer requirement for further binary redistribution.
- *
- * NO WARRANTY
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
- * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
- * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
- * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
- * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- * THE POSSIBILITY OF SUCH DAMAGES.
- *
- * $FreeBSD$
- */
-
-#ifndef _MIPS_BROADCOM_MIPS74KREG_H_
-#define _MIPS_BROADCOM_MIPS74KREG_H_
-
-#define BCM_MIPS74K_CORECTL 0x00 /**< core control */
-#define BCM_MIPS74K_EXCBASE 0x04 /**< exception base */
-
-#define BCM_MIPS74K_BIST_STATUS 0x0C /**< built-in self-test status */
-#define BCM_MIPS74K_INTR_STATUS 0x10 /**< interrupt status */
-
-/* INTR(0-5)_MASK map bcma(4) OOB interrupt bus lines to MIPS hardware
- * interrupts. */
-#define BCM_MIPS74K_INTR0_SEL 0x14 /**< IRQ0 OOBSEL mask */
-#define BCM_MIPS74K_INTR1_SEL 0x18 /**< IRQ1 OOBSEL mask */
-#define BCM_MIPS74K_INTR2_SEL 0x1C /**< IRQ2 OOBSEL mask */
-#define BCM_MIPS74K_INTR3_SEL 0x20 /**< IRQ3 OOBSEL mask */
-#define BCM_MIPS74K_INTR4_SEL 0x24 /**< IRQ4 OOBSEL mask */
-#define BCM_MIPS74K_INTR5_SEL 0x28 /**< IRQ5 OOBSEL mask */
-#define BCM_MIPS74K_NUM_INTR 6 /**< routable CPU interrupt count */
-
-#define BCM_MIPS74K_INTR_SEL(_intr) \
- (BCM_MIPS74K_INTR0_SEL + ((_intr) * 4))
-#define BCM_MIPS74K_INTR_SEL_FLAG(_i) (1<<_i)
-
-#define BCM_MIPS74K_TIMER_IVEC 31 /**< MIPS timer's bus interrupt vector */
-
-#define BCM_MIPS74K_NMI_MASK 0x2C /**< nmi mask */
-
-#define BCM_MIPS74K_GPIO_SEL 0x40 /**< gpio select */
-#define BCM_MIPS74K_GPIO_OUT 0x44 /**< gpio output enable */
-#define BCM_MIPS74K_GPIO_EN 0x48 /**< gpio enable */
-
-/** The MIPS timer interrupt IRQ assignment */
-#define BCM_MIPS74K_GET_TIMER_IRQ() \
- ((mips_rd_intctl() & MIPS_INTCTL_IPTI_MASK) >> MIPS_INTCTL_IPTI_SHIFT)
-
-#endif /* _MIPS_BROADCOM_MIPS74KREG_H_ */
diff --git a/sys/mips/broadcom/bcm_mipsvar.h b/sys/mips/broadcom/bcm_mipsvar.h
deleted file mode 100644
index bb530ae6c3ee..000000000000
--- a/sys/mips/broadcom/bcm_mipsvar.h
+++ /dev/null
@@ -1,111 +0,0 @@
-/*-
- * Copyright (c) 2017 The FreeBSD Foundation
- *
- * This software was developed by Landon Fuller under sponsorship from
- * the FreeBSD Foundation.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer,
- * without modification.
- * 2. Redistributions in binary form must reproduce at minimum a disclaimer
- * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
- * redistribution must be conditioned upon including a substantially
- * similar Disclaimer requirement for further binary redistribution.
- *
- * NO WARRANTY
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
- * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
- * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
- * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
- * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- * THE POSSIBILITY OF SUCH DAMAGES.
- *
- * $FreeBSD$
- */
-
-#ifndef _MIPS_BROADCOM_BCM_MIPSVAR_H_
-#define _MIPS_BROADCOM_BCM_MIPSVAR_H_
-
-#include <sys/param.h>
-#include <sys/bus.h>
-#include <sys/intr.h>
-#include <sys/lock.h>
-
-#include <machine/intr.h>
-
-DECLARE_CLASS(bcm_mips_driver);
-
-struct bcm_mips_irqsrc;
-struct bcm_mips_softc;
-
-#define BCM_MIPS_NINTR 32 /**< maximum number of addressable backplane interrupt vectors */
-#define BCM_MIPS_IRQ_SHARED 0 /**< MIPS CPU IRQ reserved for shared interrupt handling */
-#define INTR_MAP_DATA_BCM_MIPS INTR_MAP_DATA_PLAT_2 /**< Broadcom MIPS PIC interrupt map data type */
-
-int bcm_mips_attach(device_t dev, u_int num_cpuirqs, u_int timer_irq,
- driver_filter_t filter);
-int bcm_mips_detach(device_t dev);
-
-/**
- * Broadcom MIPS PIC interrupt map data.
- */
-struct bcm_mips_intr_map_data {
- struct intr_map_data mdata;
- u_int ivec; /**< bus interrupt vector */
-};
-
-/**
- * Nested MIPS CPU interrupt handler state.
- */
-struct bcm_mips_cpuirq {
- struct bcm_mips_softc *sc; /**< driver instance state, or NULL if uninitialized. */
- u_int mips_irq; /**< mips hardware interrupt number (relative to NSOFT_IRQ) */
- int irq_rid; /**< mips IRQ resource id, or -1 if this entry is unavailable */
- struct resource *irq_res; /**< mips interrupt resource */
- void *irq_cookie; /**< mips interrupt handler cookie, or NULL */
- struct bcm_mips_irqsrc *isrc_solo; /**< solo isrc assigned to this interrupt, or NULL */
- u_int refs; /**< isrc consumer refcount */
-};
-
-/**
- * Broadcom MIPS PIC interrupt source definition.
- */
-struct bcm_mips_irqsrc {
- struct intr_irqsrc isrc;
- u_int ivec; /**< bus interrupt vector */
- u_int refs; /**< active reference count */
- struct bcm_mips_cpuirq *cpuirq; /**< assigned MIPS HW IRQ, or NULL if no assignment */
-};
-
-/**
- * bcm_mips driver instance state. Must be first member of all subclass
- * softc structures.
- */
-struct bcm_mips_softc {
- device_t dev;
- struct bcm_mips_cpuirq cpuirqs[NREAL_IRQS]; /**< nested CPU IRQ handlers */
- u_int num_cpuirqs; /**< number of nested CPU IRQ handlers */
- u_int timer_irq; /**< CPU timer IRQ */
- struct bcm_mips_irqsrc isrcs[BCM_MIPS_NINTR];
- struct mtx mtx;
-};
-
-#define BCM_MIPS_IVEC_MASK(_isrc) (1 << ((_isrc)->ivec))
-
-#define BCM_MIPS_LOCK_INIT(sc) \
- mtx_init(&(sc)->mtx, device_get_nameunit((sc)->dev), \
- "bhnd mips driver lock", MTX_DEF)
-#define BCM_MIPS_LOCK(sc) mtx_lock(&(sc)->mtx)
-#define BCM_MIPS_UNLOCK(sc) mtx_unlock(&(sc)->mtx)
-#define BCM_MIPS_LOCK_ASSERT(sc, what) mtx_assert(&(sc)->mtx, what)
-#define BCM_MIPS_LOCK_DESTROY(sc) mtx_destroy(&(sc)->mtx)
-
-#endif /* _MIPS_BROADCOM_BCM_MIPSVAR_H_ */
diff --git a/sys/mips/broadcom/bcm_nvram_cfe.c b/sys/mips/broadcom/bcm_nvram_cfe.c
deleted file mode 100644
index 380a27318622..000000000000
--- a/sys/mips/broadcom/bcm_nvram_cfe.c
+++ /dev/null
@@ -1,501 +0,0 @@
-/*-
- * Copyright (c) 2016 Landon Fuller <landonf@FreeBSD.org>
- * Copyright (c) 2017 The FreeBSD Foundation
- * All rights reserved.
- *
- * Portions of this software were developed by Landon Fuller
- * under sponsorship from the FreeBSD Foundation.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer,
- * without modification.
- * 2. Redistributions in binary form must reproduce at minimum a disclaimer
- * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
- * redistribution must be conditioned upon including a substantially
- * similar Disclaimer requirement for further binary redistribution.
- *
- * NO WARRANTY
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
- * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
- * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
- * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
- * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- * THE POSSIBILITY OF SUCH DAMAGES.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-/*
- * BHND CFE NVRAM driver.
- *
- * Provides access to device NVRAM via CFE.
- */
-
-#include <sys/param.h>
-#include <sys/kernel.h>
-#include <sys/bus.h>
-#include <sys/limits.h>
-#include <sys/malloc.h>
-#include <sys/module.h>
-#include <sys/systm.h>
-
-#include <machine/bus.h>
-#include <sys/rman.h>
-#include <machine/resource.h>
-
-#include <dev/bhnd/bhnd.h>
-
-#include <dev/cfe/cfe_api.h>
-#include <dev/cfe/cfe_error.h>
-#include <dev/cfe/cfe_ioctl.h>
-
-#include "bhnd_nvram_if.h"
-
-#include "bcm_machdep.h"
-#include "bcm_nvram_cfevar.h"
-
-BHND_NVRAM_IOPS_DEFN(iocfe)
-
-#define IOCFE_LOG(_io, _fmt, ...) \
- printf("%s/%s: " _fmt, __FUNCTION__, (_io)->dname, ##__VA_ARGS__)
-
-static int bcm_nvram_iocfe_init(struct bcm_nvram_iocfe *iocfe,
- char *dname);
-
-/** Known CFE NVRAM device names, in probe order. */
-static char *nvram_cfe_devs[] = {
- "nflash0.nvram", /* NAND */
- "nflash1.nvram",
- "flash0.nvram",
- "flash1.nvram",
-};
-
-/** Supported CFE NVRAM formats, in probe order. */
-static bhnd_nvram_data_class * const nvram_cfe_fmts[] = {
- &bhnd_nvram_bcm_class,
- &bhnd_nvram_tlv_class
-};
-
-static int
-bhnd_nvram_cfe_probe(device_t dev)
-{
- struct bcm_platform *bp;
-
- /* Fetch platform NVRAM I/O context */
- bp = bcm_get_platform();
- if (bp->nvram_io == NULL)
- return (ENXIO);
-
- KASSERT(bp->nvram_cls != NULL, ("missing NVRAM class"));
-
- /* Set the device description */
- device_set_desc(dev, bhnd_nvram_data_class_desc(bp->nvram_cls));
-
- /* Refuse wildcard attachments */
- return (BUS_PROBE_NOWILDCARD);
-}
-
-static int
-bhnd_nvram_cfe_attach(device_t dev)
-{
- struct bcm_platform *bp;
- struct bhnd_nvram_cfe_softc *sc;
- int error;
-
- bp = bcm_get_platform();
- KASSERT(bp->nvram_io != NULL, ("missing NVRAM I/O context"));
- KASSERT(bp->nvram_cls != NULL, ("missing NVRAM class"));
-
- sc = device_get_softc(dev);
- sc->dev = dev;
-
- error = bhnd_nvram_store_parse_new(&sc->store, bp->nvram_io,
- bp->nvram_cls);
- if (error)
- return (error);
-
- error = bhnd_service_registry_add(&bp->services, dev,
- BHND_SERVICE_NVRAM, 0);
- if (error) {
- bhnd_nvram_store_free(sc->store);
- return (error);
- }
-
- return (error);
-}
-
-static int
-bhnd_nvram_cfe_resume(device_t dev)
-{
- return (0);
-}
-
-static int
-bhnd_nvram_cfe_suspend(device_t dev)
-{
- return (0);
-}
-
-static int
-bhnd_nvram_cfe_detach(device_t dev)
-{
- struct bcm_platform *bp;
- struct bhnd_nvram_cfe_softc *sc;
- int error;
-
- bp = bcm_get_platform();
- sc = device_get_softc(dev);
-
- error = bhnd_service_registry_remove(&bp->services, dev,
- BHND_SERVICE_ANY);
- if (error)
- return (error);
-
- bhnd_nvram_store_free(sc->store);
-
- return (0);
-}
-
-static int
-bhnd_nvram_cfe_getvar(device_t dev, const char *name, void *buf, size_t *len,
- bhnd_nvram_type type)
-{
- struct bhnd_nvram_cfe_softc *sc = device_get_softc(dev);
-
- return (bhnd_nvram_store_getvar(sc->store, name, buf, len, type));
-}
-
-static int
-bhnd_nvram_cfe_setvar(device_t dev, const char *name, const void *buf,
- size_t len, bhnd_nvram_type type)
-{
- struct bhnd_nvram_cfe_softc *sc = device_get_softc(dev);
-
- return (bhnd_nvram_store_setvar(sc->store, name, buf, len, type));
-}
-
-/**
- * Find, open, identify, and initialize an I/O context mapping the CFE NVRAM
- * device.
- *
- * @param[out] iocfe On success, an I/O context mapping the CFE NVRAM
- * device.
- * @param[out] cls On success, the identified NVRAM data format
- * class.
- *
- * @retval 0 success. the caller inherits ownership of @p iocfe.
- * @retval non-zero if no usable CFE NVRAM device can be found, a standard
- * unix error will be returned.
- */
-int
-bcm_nvram_find_cfedev(struct bcm_nvram_iocfe *iocfe,
- bhnd_nvram_data_class **cls)
-{
- char *dname;
- int devinfo;
- int error, result;
-
- for (u_int i = 0; i < nitems(nvram_cfe_fmts); i++) {
- *cls = nvram_cfe_fmts[i];
-
- for (u_int j = 0; j < nitems(nvram_cfe_devs); j++) {
- dname = nvram_cfe_devs[j];
-
- /* Does the device exist? */
- if ((devinfo = cfe_getdevinfo(dname)) < 0) {
- if (devinfo != CFE_ERR_DEVNOTFOUND) {
- BCM_ERR("cfe_getdevinfo(%s) failed: "
- "%d\n", dname, devinfo);
- }
-
- continue;
- }
-
- /* Open for reading */
- if ((error = bcm_nvram_iocfe_init(iocfe, dname)))
- continue;
-
- /* Probe */
- result = bhnd_nvram_data_probe(*cls, &iocfe->io);
- if (result <= 0) {
- /* Found a supporting NVRAM data class */
- return (0);
- }
-
- /* Keep searching */
- bhnd_nvram_io_free(&iocfe->io);
- }
- }
-
- return (ENODEV);
-}
-
-/**
- * Initialize a new CFE device-backed I/O context.
- *
- * The caller is responsible for releasing all resources held by the returned
- * I/O context via bhnd_nvram_io_free().
- *
- * @param[out] io On success, will be initialized as an I/O context for
- * CFE device @p dname.
- * @param dname The name of the CFE device to be opened for reading.
- *
- * @retval 0 success.
- * @retval non-zero if opening @p dname otherwise fails, a standard unix
- * error will be returned.
- */
-static int
-bcm_nvram_iocfe_init(struct bcm_nvram_iocfe *iocfe, char *dname)
-{
- nvram_info_t nvram_info;
- int cerr, devinfo, dtype, rlen;
- int64_t nv_offset;
- u_int nv_size;
- bool req_blk_erase;
- int error;
-
- iocfe->io.iops = &bhnd_nvram_iocfe_ops;
- iocfe->dname = dname;
-
- /* Try to open the device */
- iocfe->fd = cfe_open(dname);
- if (iocfe->fd <= 0) {
- IOCFE_LOG(iocfe, "cfe_open() failed: %d\n", iocfe->fd);
-
- return (ENXIO);
- }
-
- /* Try to fetch device info */
- if ((devinfo = cfe_getdevinfo(iocfe->dname)) < 0) {
- IOCFE_LOG(iocfe, "cfe_getdevinfo() failed: %d\n", devinfo);
- error = ENXIO;
- goto failed;
- }
-
- /* Verify device type */
- dtype = devinfo & CFE_DEV_MASK;
- switch (dtype) {
- case CFE_DEV_FLASH:
- case CFE_DEV_NVRAM:
- /* Valid device type */
- break;
- default:
- IOCFE_LOG(iocfe, "unknown device type: %d\n", dtype);
- error = ENXIO;
- goto failed;
- }
-
- /* Try to fetch nvram info from CFE */
- cerr = cfe_ioctl(iocfe->fd, IOCTL_NVRAM_GETINFO,
- (unsigned char *)&nvram_info, sizeof(nvram_info), &rlen, 0);
- if (cerr == CFE_OK) {
- /* Sanity check the result; must not be a negative integer */
- if (nvram_info.nvram_size < 0 ||
- nvram_info.nvram_offset < 0)
- {
- IOCFE_LOG(iocfe, "invalid NVRAM layout (%d/%d)\n",
- nvram_info.nvram_size, nvram_info.nvram_offset);
- error = ENXIO;
- goto failed;
- }
-
- nv_offset = nvram_info.nvram_offset;
- nv_size = nvram_info.nvram_size;
- req_blk_erase = (nvram_info.nvram_eraseflg != 0);
- } else if (cerr != CFE_OK && cerr != CFE_ERR_INV_COMMAND) {
- IOCFE_LOG(iocfe, "IOCTL_NVRAM_GETINFO failed: %d\n", cerr);
- error = ENXIO;
- goto failed;
- }
-
- /* Fall back on flash info.
- *
- * This is known to be required on the Asus RT-N53 (CFE 5.70.55.33,
- * BBP 1.0.37, BCM5358UB0), where IOCTL_NVRAM_GETINFO returns
- * CFE_ERR_INV_COMMAND.
- */
- if (cerr == CFE_ERR_INV_COMMAND) {
- flash_info_t fi;
-
- cerr = cfe_ioctl(iocfe->fd, IOCTL_FLASH_GETINFO,
- (unsigned char *)&fi, sizeof(fi), &rlen, 0);
-
- if (cerr != CFE_OK) {
- IOCFE_LOG(iocfe, "IOCTL_FLASH_GETINFO failed %d\n",
- cerr);
- error = ENXIO;
- goto failed;
- }
-
- nv_offset = 0x0;
- nv_size = fi.flash_size;
- req_blk_erase = !(fi.flash_flags & FLASH_FLAG_NOERASE);
- }
-
- /* Verify that the full NVRAM layout can be represented via size_t */
- if (nv_size > SIZE_MAX || SIZE_MAX - nv_size < nv_offset) {
- IOCFE_LOG(iocfe, "invalid NVRAM layout (%#x/%#jx)\n",
- nv_size, (intmax_t)nv_offset);
- error = ENXIO;
- goto failed;
- }
-
- iocfe->offset = nv_offset;
- iocfe->size = nv_size;
- iocfe->req_blk_erase = req_blk_erase;
-
- return (CFE_OK);
-
-failed:
- if (iocfe->fd >= 0)
- cfe_close(iocfe->fd);
-
- return (error);
-}
-
-static void
-bhnd_nvram_iocfe_free(struct bhnd_nvram_io *io)
-{
- struct bcm_nvram_iocfe *iocfe = (struct bcm_nvram_iocfe *)io;
-
- /* CFE I/O instances are statically allocated; we do not need to free
- * the instance itself */
- cfe_close(iocfe->fd);
-}
-
-static size_t
-bhnd_nvram_iocfe_getsize(struct bhnd_nvram_io *io)
-{
- struct bcm_nvram_iocfe *iocfe = (struct bcm_nvram_iocfe *)io;
- return (iocfe->size);
-}
-
-static int
-bhnd_nvram_iocfe_setsize(struct bhnd_nvram_io *io, size_t size)
-{
- /* unsupported */
- return (ENODEV);
-}
-
-static int
-bhnd_nvram_iocfe_read_ptr(struct bhnd_nvram_io *io, size_t offset,
- const void **ptr, size_t nbytes, size_t *navail)
-{
- /* unsupported */
- return (ENODEV);
-}
-
-static int
-bhnd_nvram_iocfe_write_ptr(struct bhnd_nvram_io *io, size_t offset,
- void **ptr, size_t nbytes, size_t *navail)
-{
- /* unsupported */
- return (ENODEV);
-}
-
-static int
-bhnd_nvram_iocfe_write(struct bhnd_nvram_io *io, size_t offset, void *buffer,
- size_t nbytes)
-{
- /* unsupported */
- return (ENODEV);
-}
-
-static int
-bhnd_nvram_iocfe_read(struct bhnd_nvram_io *io, size_t offset, void *buffer,
- size_t nbytes)
-{
- struct bcm_nvram_iocfe *iocfe;
- size_t remain;
- int64_t cfe_offset;
- int nr, nreq;
-
- iocfe = (struct bcm_nvram_iocfe *)io;
-
- /* Determine (and validate) the base CFE offset */
-#if (SIZE_MAX > INT64_MAX)
- if (iocfe->offset > INT64_MAX || offset > INT64_MAX)
- return (ENXIO);
-#endif
-
- if (INT64_MAX - offset < iocfe->offset)
- return (ENXIO);
-
- cfe_offset = iocfe->offset + offset;
-
- /* Verify that cfe_offset + nbytes is representable */
- if (INT64_MAX - cfe_offset < nbytes)
- return (ENXIO);
-
- /* Perform the read */
- for (remain = nbytes; remain > 0;) {
- void *p;
- size_t nread;
- int64_t cfe_noff;
-
- nread = (nbytes - remain);
- cfe_noff = cfe_offset + nread;
- p = ((uint8_t *)buffer + nread);
- nreq = ummin(INT_MAX, remain);
-
- nr = cfe_readblk(iocfe->fd, cfe_noff, p, nreq);
- if (nr < 0) {
- IOCFE_LOG(iocfe, "cfe_readblk() failed: %d\n", nr);
- return (ENXIO);
- }
-
- /* Check for unexpected short read */
- if (nr == 0 && remain > 0) {
- /* If the request fits entirely within the CFE
- * device range, we shouldn't hit EOF */
- if (remain < iocfe->size &&
- iocfe->size - remain > offset)
- {
- IOCFE_LOG(iocfe, "cfe_readblk() returned "
- "unexpected short read (%d/%d)\n", nr,
- nreq);
- return (ENXIO);
- }
- }
-
- if (nr == 0)
- break;
-
- remain -= nr;
- }
-
- /* Check for short read */
- if (remain > 0)
- return (ENXIO);
-
- return (0);
-}
-
-static device_method_t bhnd_nvram_cfe_methods[] = {
- /* Device interface */
- DEVMETHOD(device_probe, bhnd_nvram_cfe_probe),
- DEVMETHOD(device_attach, bhnd_nvram_cfe_attach),
- DEVMETHOD(device_resume, bhnd_nvram_cfe_resume),
- DEVMETHOD(device_suspend, bhnd_nvram_cfe_suspend),
- DEVMETHOD(device_detach, bhnd_nvram_cfe_detach),
-
- /* NVRAM interface */
- DEVMETHOD(bhnd_nvram_getvar, bhnd_nvram_cfe_getvar),
- DEVMETHOD(bhnd_nvram_setvar, bhnd_nvram_cfe_setvar),
-
- DEVMETHOD_END
-};
-
-DEFINE_CLASS_0(bhnd_nvram, bhnd_nvram_cfe, bhnd_nvram_cfe_methods,
- sizeof(struct bhnd_nvram_cfe_softc));
-EARLY_DRIVER_MODULE(bhnd_nvram_cfe, nexus, bhnd_nvram_cfe,
- bhnd_nvram_devclass, NULL, NULL, BUS_PASS_BUS + BUS_PASS_ORDER_EARLY);
diff --git a/sys/mips/broadcom/bcm_nvram_cfevar.h b/sys/mips/broadcom/bcm_nvram_cfevar.h
deleted file mode 100644
index dc082d586cec..000000000000
--- a/sys/mips/broadcom/bcm_nvram_cfevar.h
+++ /dev/null
@@ -1,67 +0,0 @@
-/*-
- * Copyright (c) 2015-2016 Landon Fuller <landonf@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer,
- * without modification.
- * 2. Redistributions in binary form must reproduce at minimum a disclaimer
- * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
- * redistribution must be conditioned upon including a substantially
- * similar Disclaimer requirement for further binary redistribution.
- *
- * NO WARRANTY
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
- * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
- * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
- * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
- * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- * THE POSSIBILITY OF SUCH DAMAGES.
- *
- * $FreeBSD$
- */
-
-#ifndef _MIPS_BROADCOM_BCM_NVRAM_CFE_H_
-#define _MIPS_BROADCOM_BCM_NVRAM_CFE_H_
-
-#include <sys/param.h>
-#include <sys/bus.h>
-
-#include <dev/bhnd/nvram/bhnd_nvram.h>
-#include <dev/bhnd/nvram/bhnd_nvram_iovar.h>
-#include <dev/bhnd/nvram/bhnd_nvram_store.h>
-
-struct bcm_nvram_iocfe;
-
-int bcm_nvram_find_cfedev(struct bcm_nvram_iocfe *iocfe,
- bhnd_nvram_data_class **cls);
-
-/**
- * CFE-backed bhnd_nvram_io implementation.
- */
-struct bcm_nvram_iocfe {
- struct bhnd_nvram_io io; /**< common I/O instance state */
-
- char *dname; /**< CFE device name (borrowed) */
- int fd; /**< CFE file descriptor */
- size_t offset; /**< base offset */
- size_t size; /**< device size */
- bool req_blk_erase; /**< flash blocks must be erased
- before writing */
-};
-
-/** bhnd_nvram_cfe driver instance state. */
-struct bhnd_nvram_cfe_softc {
- device_t dev;
- struct bhnd_nvram_store *store; /**< nvram store */
-};
-
-#endif /* _MIPS_BROADCOM_BCM_NVRAM_CFE_H_ */
diff --git a/sys/mips/broadcom/bcm_pmu.c b/sys/mips/broadcom/bcm_pmu.c
deleted file mode 100644
index 8b9399d47a10..000000000000
--- a/sys/mips/broadcom/bcm_pmu.c
+++ /dev/null
@@ -1,297 +0,0 @@
-/*-
- * Copyright (c) 2016 Landon Fuller <landonf@FreeBSD.org>
- *
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <dev/bhnd/bhnd.h>
-
-#include <dev/bhnd/cores/chipc/chipcreg.h>
-
-#include <dev/bhnd/cores/chipc/pwrctl/bhnd_pwrctlvar.h>
-
-#include <dev/bhnd/cores/pmu/bhnd_pmureg.h>
-#include <dev/bhnd/cores/pmu/bhnd_pmuvar.h>
-
-#include "bcm_machdep.h"
-
-static struct bhnd_pmu_query *bcm_get_pmu(struct bcm_platform *bp);
-static bool bcm_has_pmu(struct bcm_platform *bp);
-
-static uint32_t bcm_pmu_read4(bus_size_t reg, void *ctx);
-static void bcm_pmu_write4(bus_size_t reg, uint32_t val,
- void *ctx);
-static uint32_t bcm_pmu_read_chipst(void *ctx);
-
-const struct bhnd_pmu_io bcm_pmu_soc_io = {
- .rd4 = bcm_pmu_read4,
- .wr4 = bcm_pmu_write4,
- .rd_chipst = bcm_pmu_read_chipst
-};
-
-/**
- * Supported UART clock sources.
- */
-typedef enum {
- BCM_UART_RCLK_PLL_T1 = 0, /**< UART uses PLL m2 (mii/uart/mipsref) with no divisor */
- BCM_UART_RCLK_ALP = 1, /**< UART uses ALP rclk with no divisor */
- BCM_UART_RCLK_EXT = 2, /**< UART uses 1.8423 MHz external clock */
- BCM_UART_RCLK_SI = 3, /**< UART uses backplane clock with divisor of two */
- BCM_UART_RCLK_FIXED = 4, /**< UART uses fixed 88Mhz backplane clock with a divisor of 48 */
-} bcm_uart_clksrc;
-
-/**
- * UART clock configuration.
- */
-struct bcm_uart_clkcfg {
- bcm_uart_clksrc src; /**< clock source */
- uint32_t div; /**< clock divisor */
- uint32_t freq; /**< clock frequency (Hz) */
-};
-
-#define BCM_UART_RCLK_PLL_T1_DIV 1
-#define BCM_UART_RCLK_ALP_DIV 1
-#define BCM_UART_RCLK_EXT_HZ 1842300 /* 1.8423MHz */
-#define BCM_UART_RCLK_EXT_DIV 1
-#define BCM_UART_RCLK_FIXED_HZ 88000000 /* 88MHz */
-#define BCM_UART_RCLK_FIXED_DIV 48
-
-/* Fetch PLL type from ChipCommon capability flags */
-#define BCM_PMU_PLL_TYPE(_bp) \
- CHIPC_GET_BITS(_bp->cc_caps, CHIPC_CAP_PLL)
-
-/**
- * Return the PMU instance, or NULL if no PMU.
- */
-static struct bhnd_pmu_query *
-bcm_get_pmu(struct bcm_platform *bp)
-{
- if (!bcm_has_pmu(bp))
- return (NULL);
- return (&bp->pmu);
-}
-
-/**
- * Return true if a PMU is available, false otherwise.
- */
-static bool
-bcm_has_pmu(struct bcm_platform *bp)
-{
- return (bp->pmu_addr != 0);
-}
-
-/**
- * Determine the UART clock source for @p bp and return the
- * corresponding clock configuration, if any.
- */
-static struct bcm_uart_clkcfg
-bcm_get_uart_clkcfg(struct bcm_platform *bp)
-{
- struct bcm_uart_clkcfg cfg;
- struct bhnd_core_info *cc_id;
-
- cc_id = &bp->cc_id;
-
- /* These tests are ordered by precedence. */
-
- /* PLL M2 clock source? */
- if (!bcm_has_pmu(bp) && BCM_PMU_PLL_TYPE(bp) == CHIPC_PLL_TYPE1) {
- uint32_t n, m;
-
- n = BCM_CHIPC_READ_4(bp, CHIPC_CLKC_N);
- m = BCM_CHIPC_READ_4(bp, CHIPC_CLKC_M2);
-
- cfg = (struct bcm_uart_clkcfg) {
- BCM_UART_RCLK_PLL_T1,
- BCM_UART_RCLK_PLL_T1_DIV,
- bhnd_pwrctl_clock_rate(BCM_PMU_PLL_TYPE(bp), n, m)
- };
-
- return (cfg);
- }
-
- /* ALP clock source? */
- if (cc_id->hwrev != 15 && cc_id->hwrev >= 11) {
- cfg = (struct bcm_uart_clkcfg) {
- BCM_UART_RCLK_ALP,
- BCM_UART_RCLK_ALP_DIV,
- bcm_get_alpfreq(bp)
- };
- return (cfg);
- }
-
- /* External clock? */
- if (CHIPC_HWREV_HAS_CORECTRL(cc_id->hwrev)) {
- uint32_t corectrl, uclksel;
- bool uintclk0;
-
- /* Fetch UART clock support flag */
- uclksel = CHIPC_GET_BITS(bp->cc_caps, CHIPC_CAP_UCLKSEL);
-
- /* Is UART using internal clock? */
- corectrl = BCM_CHIPC_READ_4(bp, CHIPC_CORECTRL);
- uintclk0 = CHIPC_GET_FLAG(corectrl, CHIPC_UARTCLKO);
-
- if (uintclk0 && uclksel == CHIPC_CAP_UCLKSEL_UINTCLK) {
- cfg = (struct bcm_uart_clkcfg) {
- BCM_UART_RCLK_EXT,
- BCM_UART_RCLK_EXT_DIV,
- BCM_UART_RCLK_EXT_HZ
- };
- return (cfg);
- }
- }
-
- /* UART uses backplane clock? */
- if (cc_id->hwrev == 15 || (cc_id->hwrev >= 3 && cc_id->hwrev <= 10)) {
- cfg = (struct bcm_uart_clkcfg) {
- BCM_UART_RCLK_SI,
- BCM_CHIPC_READ_4(bp, CHIPC_CLKDIV) & CHIPC_CLKD_UART,
- bcm_get_sifreq(bp)
- };
-
- return (cfg);
- }
-
- /* UART uses fixed clock? */
- if (cc_id->hwrev <= 2) {
- cfg = (struct bcm_uart_clkcfg) {
- BCM_UART_RCLK_FIXED,
- BCM_UART_RCLK_FIXED_DIV,
- BCM_UART_RCLK_FIXED_HZ
- };
-
- return (cfg);
- }
-
- /* All cases must be accounted for above */
- panic("unreachable - no clock config");
-}
-
-/**
- * Return the UART reference clock frequency (in Hz).
- */
-u_int
-bcm_get_uart_rclk(struct bcm_platform *bp)
-{
- struct bcm_uart_clkcfg cfg;
-
- cfg = bcm_get_uart_clkcfg(bp);
- return (cfg.freq / cfg.div);
-}
-
-/** ALP clock frequency (in Hz) */
-uint64_t
-bcm_get_alpfreq(struct bcm_platform *bp) {
- if (!bcm_has_pmu(bp))
- return (BHND_PMU_ALP_CLOCK);
-
- return (bhnd_pmu_alp_clock(bcm_get_pmu(bp)));
-}
-
-/** ILP clock frequency (in Hz) */
-uint64_t
-bcm_get_ilpfreq(struct bcm_platform *bp) {
- if (!bcm_has_pmu(bp))
- return (BHND_PMU_ILP_CLOCK);
-
- return (bhnd_pmu_ilp_clock(bcm_get_pmu(bp)));
-}
-
-/** CPU clock frequency (in Hz) */
-uint64_t
-bcm_get_cpufreq(struct bcm_platform *bp)
-{
- uint32_t fixed_hz;
- uint32_t n, m;
- bus_size_t mreg;
- uint8_t pll_type;
-
- /* PMU support */
- if (bcm_has_pmu(bp))
- return (bhnd_pmu_cpu_clock(bcm_get_pmu(bp)));
-
- /*
- * PWRCTL support
- */
- pll_type = CHIPC_GET_BITS(bp->cc_caps, CHIPC_CAP_PLL);
- mreg = bhnd_pwrctl_cpu_clkreg_m(&bp->cid, pll_type, &fixed_hz);
- if (mreg == 0)
- return (fixed_hz);
-
- n = BCM_CHIPC_READ_4(bp, CHIPC_CLKC_N);
- m = BCM_CHIPC_READ_4(bp, mreg);
-
- return (bhnd_pwrctl_cpu_clock_rate(&bp->cid, pll_type, n, m));
-
-}
-
-/** Backplane clock frequency (in Hz) */
-uint64_t
-bcm_get_sifreq(struct bcm_platform *bp)
-{
- uint32_t fixed_hz;
- uint32_t n, m;
- bus_size_t mreg;
- uint8_t pll_type;
-
- /* PMU support */
- if (bcm_has_pmu(bp))
- return (bhnd_pmu_si_clock(bcm_get_pmu(bp)));
-
- /*
- * PWRCTL support
- */
- pll_type = CHIPC_GET_BITS(bp->cc_caps, CHIPC_CAP_PLL);
- mreg = bhnd_pwrctl_si_clkreg_m(&bp->cid, pll_type, &fixed_hz);
- if (mreg == 0)
- return (fixed_hz);
-
- n = BCM_CHIPC_READ_4(bp, CHIPC_CLKC_N);
- m = BCM_CHIPC_READ_4(bp, mreg);
-
- return (bhnd_pwrctl_si_clock_rate(&bp->cid, pll_type, n, m));
-}
-
-static uint32_t
-bcm_pmu_read4(bus_size_t reg, void *ctx) {
- struct bcm_platform *bp = ctx;
- return (readl(BCM_SOC_ADDR(bp->pmu_addr, reg)));
-}
-
-static void
-bcm_pmu_write4(bus_size_t reg, uint32_t val, void *ctx) {
- struct bcm_platform *bp = ctx;
- writel(BCM_SOC_ADDR(bp->pmu_addr, reg), val);
-}
-
-static uint32_t
-bcm_pmu_read_chipst(void *ctx)
-{
- struct bcm_platform *bp = ctx;
- return (readl(BCM_SOC_ADDR(bp->cc_addr, CHIPC_CHIPST)));
-}
diff --git a/sys/mips/broadcom/bcma_nexus.c b/sys/mips/broadcom/bcma_nexus.c
deleted file mode 100644
index 4e3eaa7a7c1d..000000000000
--- a/sys/mips/broadcom/bcma_nexus.c
+++ /dev/null
@@ -1,119 +0,0 @@
-/*-
- * Copyright (c) 2016 Michael Zhilin <mizhka@gmail.com>
- * Copyright (c) 2015-2016 Landon Fuller <landon@freebsd.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer,
- * without modification.
- * 2. Redistributions in binary form must reproduce at minimum a disclaimer
- * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
- * redistribution must be conditioned upon including a substantially
- * similar Disclaimer requirement for further binary redistribution.
- *
- * NO WARRANTY
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
- * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
- * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
- * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
- * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- * THE POSSIBILITY OF SUCH DAMAGES.
- *
- * $FreeBSD$
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/kernel.h>
-#include <sys/bus.h>
-#include <sys/module.h>
-
-#include <machine/bus.h>
-#include <sys/rman.h>
-#include <machine/resource.h>
-
-#include <dev/bhnd/bhnd_ids.h>
-
-#include <dev/bhnd/bcma/bcmavar.h>
-#include <dev/bhnd/bcma/bcma_dmp.h>
-
-#include "bcm_mipsvar.h"
-#include "bcm_machdep.h"
-
-#include "bhnd_nexusvar.h"
-
-/*
- * Supports bcma(4) attachment to a MIPS nexus bus.
- */
-
-static int bcma_nexus_attach(device_t);
-static int bcma_nexus_probe(device_t);
-
-_Static_assert(BCMA_OOB_NUM_BUSLINES == BCM_MIPS_NINTR, "BCMA incompatible "
- "with generic NINTR");
-
-static int
-bcma_nexus_probe(device_t dev)
-{
- int error;
-
- switch (bcm_get_platform()->cid.chip_type) {
- case BHND_CHIPTYPE_BCMA:
- case BHND_CHIPTYPE_BCMA_ALT:
- case BHND_CHIPTYPE_UBUS:
- break;
- default:
- return (ENXIO);
- }
-
- if ((error = bcma_probe(dev)) > 0)
- return (error);
-
- /* Set device description */
- bhnd_set_default_bus_desc(dev, &bcm_get_platform()->cid);
-
- return (BUS_PROBE_SPECIFIC);
-}
-
-static int
-bcma_nexus_attach(device_t dev)
-{
- int error;
-
- /* Perform initial attach and enumerate our children. */
- if ((error = bcma_attach(dev)))
- goto failed;
-
- /* Delegate remainder to standard bhnd method implementation */
- if ((error = bhnd_generic_attach(dev)))
- goto failed;
-
- return (0);
-
-failed:
- device_delete_children(dev);
- return (error);
-}
-
-static device_method_t bcma_nexus_methods[] = {
- DEVMETHOD(device_probe, bcma_nexus_probe),
- DEVMETHOD(device_attach, bcma_nexus_attach),
-
- DEVMETHOD_END
-};
-
-DEFINE_CLASS_2(bhnd, bcma_nexus_driver, bcma_nexus_methods,
- sizeof(struct bcma_softc), bhnd_nexus_driver, bcma_driver);
-
-EARLY_DRIVER_MODULE(bcma_nexus, nexus, bcma_nexus_driver, bhnd_devclass, 0, 0,
- BUS_PASS_BUS + BUS_PASS_ORDER_MIDDLE);
diff --git a/sys/mips/broadcom/bhnd_nexus.c b/sys/mips/broadcom/bhnd_nexus.c
deleted file mode 100644
index 6d3e735a2970..000000000000
--- a/sys/mips/broadcom/bhnd_nexus.c
+++ /dev/null
@@ -1,281 +0,0 @@
-/*-
- * Copyright (c) 2015-2016 Landon Fuller <landon@freebsd.org>
- * Copyright (c) 2017 The FreeBSD Foundation
- * All rights reserved.
- *
- * Portions of this software were developed by Landon Fuller
- * under sponsorship from the FreeBSD Foundation.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer,
- * without modification.
- * 2. Redistributions in binary form must reproduce at minimum a disclaimer
- * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
- * redistribution must be conditioned upon including a substantially
- * similar Disclaimer requirement for further binary redistribution.
- *
- * NO WARRANTY
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
- * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
- * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
- * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
- * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- * THE POSSIBILITY OF SUCH DAMAGES.
- *
- * $FreeBSD$
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-/*
- * bhnd(4) driver mix-in providing shared common methods for
- * bhnd bus devices attached via a MIPS root nexus.
- */
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/intr.h>
-#include <sys/limits.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/rman.h>
-#include <sys/malloc.h>
-
-#include <machine/bus.h>
-
-#include <dev/bhnd/bhndvar.h>
-#include <dev/bhnd/bhnd_ids.h>
-
-#include <dev/bhnd/cores/chipc/chipcreg.h>
-
-#include "bcm_machdep.h"
-#include "bcm_mipsvar.h"
-
-#include "bhnd_nexusvar.h"
-
-/**
- * Default bhnd_nexus implementation of BHND_BUS_GET_SERVICE_REGISTRY().
- */
-static struct bhnd_service_registry *
-bhnd_nexus_get_service_registry(device_t dev, device_t child)
-{
- struct bcm_platform *bp = bcm_get_platform();
- return (&bp->services);
-}
-
-/**
- * Default bhnd_nexus implementation of BHND_BUS_ACTIVATE_RESOURCE().
- */
-static int
-bhnd_nexus_activate_resource(device_t dev, device_t child, int type, int rid,
- struct bhnd_resource *r)
-{
- int error;
-
- /* Always direct */
- if ((error = bus_activate_resource(child, type, rid, r->res)))
- return (error);
-
- r->direct = true;
- return (0);
-}
-
-/**
- * Default bhnd_nexus implementation of BHND_BUS_DEACTIVATE_RESOURCE().
- */
-static int
-bhnd_nexus_deactivate_resource(device_t dev, device_t child,
- int type, int rid, struct bhnd_resource *r)
-{
- int error;
-
- /* Always direct */
- KASSERT(r->direct, ("indirect resource delegated to bhnd_nexus\n"));
-
- if ((error = bus_deactivate_resource(child, type, rid, r->res)))
- return (error);
-
- r->direct = false;
- return (0);
-}
-
-/**
- * Default bhnd_nexus implementation of BHND_BUS_IS_HW_DISABLED().
- */
-static bool
-bhnd_nexus_is_hw_disabled(device_t dev, device_t child)
-{
- struct bcm_platform *bp;
- struct bhnd_chipid *cid;
-
- bp = bcm_get_platform();
- cid = &bp->cid;
-
- /* The BCM4706 low-cost package leaves secondary GMAC cores
- * floating */
- if (cid->chip_id == BHND_CHIPID_BCM4706 &&
- cid->chip_pkg == BHND_PKGID_BCM4706L &&
- bhnd_get_device(child) == BHND_COREID_4706_GMAC &&
- bhnd_get_core_unit(child) != 0)
- {
- return (true);
- }
-
- return (false);
-}
-
-/**
- * Default bhnd_nexus implementation of BHND_BUS_AGET_ATTACH_TYPE().
- */
-static bhnd_attach_type
-bhnd_nexus_get_attach_type(device_t dev, device_t child)
-{
- return (BHND_ATTACH_NATIVE);
-}
-
-/**
- * Default bhnd_nexus implementation of BHND_BUS_GET_CHIPID().
- */
-static const struct bhnd_chipid *
-bhnd_nexus_get_chipid(device_t dev, device_t child)
-{
- return (&bcm_get_platform()->cid);
-}
-
-/**
- * Default bhnd_nexus implementation of BHND_BUS_READ_BOARD_INFO().
- */
-static int
-bhnd_nexus_read_board_info(device_t dev, device_t child,
- struct bhnd_board_info *info)
-{
- int error;
-
- /* Initialize with NVRAM-derived values */
- if ((error = bhnd_bus_generic_read_board_info(dev, child, info)))
- return (error);
-
- /* The board vendor should default to PCI_VENDOR_BROADCOM if not
- * otherwise specified */
- if (info->board_vendor == 0)
- info->board_vendor = PCI_VENDOR_BROADCOM;
-
- return (0);
-}
-
-/**
- * Default bhnd_nexus implementation of BHND_BUS_MAP_INTR().
- */
-static int
-bhnd_nexus_map_intr(device_t dev, device_t child, u_int intr, rman_res_t *irq)
-{
- struct bcm_mips_intr_map_data *imd;
- u_int ivec;
- uintptr_t xref;
- int error;
-
- /* Fetch the backplane interrupt vector */
- if ((error = bhnd_get_intr_ivec(child, intr, &ivec))) {
- device_printf(dev, "error fetching ivec for intr %u: %d\n",
- intr, error);
- return (error);
- }
-
- /* Determine our interrupt domain */
- xref = BHND_BUS_GET_INTR_DOMAIN(dev, child, false);
- KASSERT(xref != 0, ("missing interrupt domain"));
-
- /* Allocate our map data */
- imd = (struct bcm_mips_intr_map_data *)intr_alloc_map_data(
- INTR_MAP_DATA_BCM_MIPS, sizeof(*imd), M_WAITOK | M_ZERO);
- imd->ivec = ivec;
-
- /* Map the IRQ */
- *irq = intr_map_irq(NULL, xref, &imd->mdata);
- return (0);
-}
-
-/**
- * Default bhnd_nexus implementation of BHND_BUS_UNMAP_INTR().
- */
-static void
-bhnd_nexus_unmap_intr(device_t dev, device_t child, rman_res_t irq)
-{
- if (irq > UINT_MAX)
- panic("invalid irq: %ju", (uintmax_t)irq);
-
- intr_unmap_irq(irq);
-}
-
-/**
- * Default bhnd_nexus implementation of BHND_BUS_GET_DMA_TRANSLATION().
- */
-static int
-bhnd_nexus_get_dma_translation(device_t dev, device_t child,
- u_int width, uint32_t flags, bus_dma_tag_t *dmat,
- struct bhnd_dma_translation *translation)
-{
- struct bcm_platform *bp = bcm_get_platform();
-
- /* We don't (currently) support any flags */
- if (flags != 0x0)
- return (ENOENT);
-
- KASSERT(width > 0 && width <= BHND_DMA_ADDR_64BIT,
- ("invalid width %u", width));
-
- /* Is the requested width supported? */
- if (width > BHND_DMA_ADDR_32BIT) {
- /* Backplane must support 64-bit addressing */
- if (!(bp->cid.chip_caps & BHND_CAP_BP64))
- width = BHND_DMA_ADDR_32BIT;
- }
-
- /* No DMA address translation required */
- if (dmat != NULL)
- *dmat = bus_get_dma_tag(dev);
-
- if (translation != NULL) {
- *translation = (struct bhnd_dma_translation) {
- .base_addr = 0x0,
- .addr_mask = BHND_DMA_ADDR_BITMASK(width),
- .addrext_mask = 0
- };
- }
-
- return (0);
-}
-
-static device_method_t bhnd_nexus_methods[] = {
- /* bhnd interface */
- DEVMETHOD(bhnd_bus_get_service_registry,bhnd_nexus_get_service_registry),
- DEVMETHOD(bhnd_bus_register_provider, bhnd_bus_generic_sr_register_provider),
- DEVMETHOD(bhnd_bus_deregister_provider, bhnd_bus_generic_sr_deregister_provider),
- DEVMETHOD(bhnd_bus_retain_provider, bhnd_bus_generic_sr_retain_provider),
- DEVMETHOD(bhnd_bus_release_provider, bhnd_bus_generic_sr_release_provider),
- DEVMETHOD(bhnd_bus_activate_resource, bhnd_nexus_activate_resource),
- DEVMETHOD(bhnd_bus_deactivate_resource, bhnd_nexus_deactivate_resource),
- DEVMETHOD(bhnd_bus_is_hw_disabled, bhnd_nexus_is_hw_disabled),
- DEVMETHOD(bhnd_bus_get_attach_type, bhnd_nexus_get_attach_type),
- DEVMETHOD(bhnd_bus_get_chipid, bhnd_nexus_get_chipid),
- DEVMETHOD(bhnd_bus_get_dma_translation, bhnd_nexus_get_dma_translation),
- DEVMETHOD(bhnd_bus_get_intr_domain, bhnd_bus_generic_get_intr_domain),
- DEVMETHOD(bhnd_bus_map_intr, bhnd_nexus_map_intr),
- DEVMETHOD(bhnd_bus_read_board_info, bhnd_nexus_read_board_info),
- DEVMETHOD(bhnd_bus_unmap_intr, bhnd_nexus_unmap_intr),
-
- DEVMETHOD_END
-};
-
-DEFINE_CLASS_0(bhnd, bhnd_nexus_driver, bhnd_nexus_methods,
- sizeof(struct bhnd_softc));
diff --git a/sys/mips/broadcom/bhnd_nexusvar.h b/sys/mips/broadcom/bhnd_nexusvar.h
deleted file mode 100644
index 410070f7cf34..000000000000
--- a/sys/mips/broadcom/bhnd_nexusvar.h
+++ /dev/null
@@ -1,40 +0,0 @@
-/*-
- * Copyright (c) 2016 Landon Fuller <landon@freebsd.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer,
- * without modification.
- * 2. Redistributions in binary form must reproduce at minimum a disclaimer
- * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
- * redistribution must be conditioned upon including a substantially
- * similar Disclaimer requirement for further binary redistribution.
- *
- * NO WARRANTY
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
- * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
- * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
- * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
- * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- * THE POSSIBILITY OF SUCH DAMAGES.
- *
- * $FreeBSD$
- */
-
-#ifndef _MIPS_BROADCOM_BHND_NEXUSVAR_H_
-#define _MIPS_BROADCOM_BHND_NEXUSVAR_H_
-
-#include <sys/param.h>
-#include <sys/kobj.h>
-
-DECLARE_CLASS(bhnd_nexus_driver);
-
-#endif /* _MIPS_BROADCOM_BHND_NEXUSVAR_H_ */
diff --git a/sys/mips/broadcom/files.broadcom b/sys/mips/broadcom/files.broadcom
deleted file mode 100644
index 244124a13f67..000000000000
--- a/sys/mips/broadcom/files.broadcom
+++ /dev/null
@@ -1,32 +0,0 @@
-# $FreeBSD$
-
-# TODO: Add attachment elsewhere in the tree
-# for USB 1.1 OHCI, Ethernet and IPSEC cores
-# which are believed to be devices we have drivers for
-# which just need to be tweaked for attachment to an BHND system bus.
-mips/broadcom/bcm_machdep.c standard
-mips/broadcom/bcm_bmips.c optional siba_nexus siba
-mips/broadcom/bcm_mips74k.c optional bcma_nexus bcma
-mips/broadcom/bcm_mips.c optional siba_nexus siba | \
- bcma_nexus bcma
-mips/broadcom/bcm_nvram_cfe.c optional bhnd siba_nexus cfe | \
- bhnd bcma_nexus cfe
-mips/broadcom/bcm_pmu.c standard
-
-mips/broadcom/bhnd_nexus.c optional bhnd siba_nexus | \
- bhnd bcma_nexus
-mips/broadcom/bcma_nexus.c optional bcma_nexus bcma bhnd
-mips/broadcom/siba_nexus.c optional siba_nexus siba bhnd
-
-mips/mips/tick.c standard
-
-mips/broadcom/uart_cpu_chipc.c optional uart
-mips/broadcom/uart_bus_chipc.c optional uart
-
-# TODO: Replace with BCM47xx/57xx/etc-aware geom_map
-geom/geom_flashmap.c standard
-
-# USB bits
-dev/bhnd/cores/usb/bhnd_usb.c optional usb
-dev/bhnd/cores/usb/bhnd_ehci.c optional ehci
-dev/bhnd/cores/usb/bhnd_ohci.c optional ohci
diff --git a/sys/mips/broadcom/siba_nexus.c b/sys/mips/broadcom/siba_nexus.c
deleted file mode 100644
index 10b146563377..000000000000
--- a/sys/mips/broadcom/siba_nexus.c
+++ /dev/null
@@ -1,108 +0,0 @@
-/*-
- * Copyright (c) 2015-2016 Landon Fuller <landon@freebsd.org>
- * Copyright (c) 2007 Bruce M. Simpson.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/kernel.h>
-#include <sys/bus.h>
-#include <sys/module.h>
-
-#include <machine/bus.h>
-#include <sys/rman.h>
-#include <machine/resource.h>
-
-#include <dev/bhnd/bhnd_ids.h>
-
-#include <dev/bhnd/siba/sibareg.h>
-#include <dev/bhnd/siba/sibavar.h>
-
-#include "bcm_machdep.h"
-#include "bcm_mipsvar.h"
-
-#include "bhnd_nexusvar.h"
-
-/*
- * Supports siba(4) attachment to a MIPS nexus bus.
- *
- * Derived from Bruce M. Simpson' original siba(4) driver.
- */
-
-_Static_assert(SIBA_MAX_INTR == BCM_MIPS_NINTR, "SIBA incompatible with "
- "generic NINTR");
-
-static int
-siba_nexus_probe(device_t dev)
-{
- int error;
-
- if (bcm_get_platform()->cid.chip_type != BHND_CHIPTYPE_SIBA)
- return (ENXIO);
-
- if ((error = siba_probe(dev)) > 0)
- return (error);
-
- /* Set device description */
- bhnd_set_default_bus_desc(dev, &bcm_get_platform()->cid);
-
- return (BUS_PROBE_SPECIFIC);
-}
-
-static int
-siba_nexus_attach(device_t dev)
-{
- int error;
-
- /* Perform initial attach and enumerate our children. */
- if ((error = siba_attach(dev)))
- return (error);
-
- /* Delegate remainder to standard bhnd method implementation */
- if ((error = bhnd_generic_attach(dev)))
- goto failed;
-
- return (0);
-
-failed:
- siba_detach(dev);
- return (error);
-}
-
-static device_method_t siba_nexus_methods[] = {
- /* Device interface */
- DEVMETHOD(device_probe, siba_nexus_probe),
- DEVMETHOD(device_attach, siba_nexus_attach),
-
- DEVMETHOD_END
-};
-
-DEFINE_CLASS_2(bhnd, siba_nexus_driver, siba_nexus_methods,
- sizeof(struct siba_softc), bhnd_nexus_driver, siba_driver);
-
-EARLY_DRIVER_MODULE(siba_nexus, nexus, siba_nexus_driver, bhnd_devclass, 0, 0,
- BUS_PASS_BUS + BUS_PASS_ORDER_MIDDLE);
diff --git a/sys/mips/broadcom/std.broadcom b/sys/mips/broadcom/std.broadcom
deleted file mode 100644
index 68aa974ae612..000000000000
--- a/sys/mips/broadcom/std.broadcom
+++ /dev/null
@@ -1,9 +0,0 @@
-# $FreeBSD$
-#
-
-machine mips mipsel
-
-makeoptions INTRNG
-options INTRNG
-
-files "../broadcom/files.broadcom"
diff --git a/sys/mips/broadcom/uart_bus_chipc.c b/sys/mips/broadcom/uart_bus_chipc.c
deleted file mode 100644
index d93f8a21a4f0..000000000000
--- a/sys/mips/broadcom/uart_bus_chipc.c
+++ /dev/null
@@ -1,80 +0,0 @@
-/*-
- * Copyright (c) 2016 Michael Zhilin <mizhka@gmail.com>
- *
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include "opt_uart.h"
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/conf.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/rman.h>
-
-#include <machine/bus.h>
-#include <machine/resource.h>
-
-#include <dev/uart/uart.h>
-#include <dev/uart/uart_bus.h>
-#include <dev/uart/uart_cpu.h>
-
-#include "uart_if.h"
-#include "bhnd_chipc_if.h"
-
-#include "bcm_machdep.h"
-
-static int
-uart_chipc_probe(device_t dev)
-{
- struct uart_softc *sc;
- u_int rclk;
-
- sc = device_get_softc(dev);
- sc->sc_class = &uart_ns8250_class;
-
- rclk = bcm_get_uart_rclk(bcm_get_platform());
- return (uart_bus_probe(dev, 0, 0, rclk, 0, 0, 0));
-}
-
-static device_method_t uart_chipc_methods[] = {
- /* Device interface */
- DEVMETHOD(device_probe, uart_chipc_probe),
- DEVMETHOD(device_attach, uart_bus_attach),
- DEVMETHOD(device_detach, uart_bus_detach),
- { 0, 0 }
-};
-
-static driver_t uart_chipc_driver = {
- uart_driver_name,
- uart_chipc_methods,
- sizeof(struct uart_softc),
-};
-
-DRIVER_MODULE(uart, bhnd_chipc, uart_chipc_driver, uart_devclass, 0, 0);
diff --git a/sys/mips/broadcom/uart_cpu_chipc.c b/sys/mips/broadcom/uart_cpu_chipc.c
deleted file mode 100644
index 2120cf0ba4f5..000000000000
--- a/sys/mips/broadcom/uart_cpu_chipc.c
+++ /dev/null
@@ -1,171 +0,0 @@
-/*-
- * Copyright (c) 2016 Michael Zhilin <mizhka@gmail.com>
- *
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include "opt_uart.h"
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/cons.h>
-#include <sys/lock.h>
-#include <sys/mutex.h>
-
-#include <machine/bus.h>
-
-#include <dev/bhnd/cores/chipc/chipcreg.h>
-
-#include <dev/uart/uart.h>
-#include <dev/uart/uart_bus.h>
-#include <dev/uart/uart_cpu.h>
-
-#ifdef CFE
-#include <dev/cfe/cfe_api.h>
-#include <dev/cfe/cfe_ioctl.h>
-#include <dev/cfe/cfe_error.h>
-#endif
-
-#include "bcm_machdep.h"
-
-bus_space_tag_t uart_bus_space_io;
-bus_space_tag_t uart_bus_space_mem;
-
-static struct uart_class *chipc_uart_class = &uart_ns8250_class;
-
-#define CHIPC_UART_BAUDRATE 115200
-
-int
-uart_cpu_eqres(struct uart_bas *b1, struct uart_bas *b2)
-{
- return ((b1->bsh == b2->bsh && b1->bst == b2->bst) ? 1 : 0);
-}
-
-static int
-uart_cpu_init(struct uart_devinfo *di, u_int uart, int baudrate)
-{
- if (uart >= CHIPC_UART_MAX)
- return (EINVAL);
-
- di->ops = uart_getops(chipc_uart_class);
- di->bas.chan = 0;
- di->bas.bst = uart_bus_space_mem;
- di->bas.bsh = (bus_space_handle_t) BCM_CORE_ADDR(bcm_get_platform(),
- cc_addr, CHIPC_UART(uart));
- di->bas.regshft = 0;
- di->bas.rclk = bcm_get_uart_rclk(bcm_get_platform());
- di->baudrate = baudrate;
- di->databits = 8;
- di->stopbits = 1;
- di->parity = UART_PARITY_NONE;
-
- return (0);
-}
-
-#ifdef CFE
-static int
-uart_getenv_cfe(int devtype, struct uart_devinfo *di)
-{
- char device[sizeof("uartXX")];
- int baud, fd, len;
- int ret;
- u_int uart;
-
- /* CFE only vends console configuration */
- if (devtype != UART_DEV_CONSOLE)
- return (ENODEV);
-
- /* Fetch console device */
- ret = cfe_getenv("BOOT_CONSOLE", device, sizeof(device));
- if (ret != CFE_OK)
- return (ENXIO);
-
- /* Parse serial console unit. Fails on non-uart devices. */
- if (sscanf(device, "uart%u", &uart) != 1)
- return (ENXIO);
-
- /* Fetch device handle */
- fd = bcm_get_platform()->cfe_console;
- if (fd < 0)
- return (ENXIO);
-
- /* Fetch serial configuration */
- ret = cfe_ioctl(fd, IOCTL_SERIAL_GETSPEED, (unsigned char *)&baud,
- sizeof(baud), &len, 0);
- if (ret != CFE_OK)
- baud = CHIPC_UART_BAUDRATE;
-
- /* Initialize device info */
- return (uart_cpu_init(di, uart, baud));
-}
-#endif /* CFE */
-
-int
-uart_cpu_getdev(int devtype, struct uart_devinfo *di)
-{
- int ivar;
-
- uart_bus_space_io = NULL;
- uart_bus_space_mem = mips_bus_space_generic;
-
-#ifdef CFE
- /* Check the CFE environment */
- if (uart_getenv_cfe(devtype, di) == 0)
- return (0);
-#endif /* CFE */
-
- /* Check the kernel environment. */
- if (uart_getenv(devtype, di, chipc_uart_class) == 0)
- return (0);
-
- /* Scan the device hints for the first matching device */
- for (u_int i = 0; i < CHIPC_UART_MAX; i++) {
- if (resource_int_value("uart", i, "flags", &ivar))
- continue;
-
- /* Check usability */
- if (devtype == UART_DEV_CONSOLE && !UART_FLAGS_CONSOLE(ivar))
- continue;
-
- if (devtype == UART_DEV_DBGPORT && !UART_FLAGS_DBGPORT(ivar))
- continue;
-
- if (resource_int_value("uart", i, "disabled", &ivar) == 0 &&
- ivar == 0)
- continue;
-
- /* Found */
- if (resource_int_value("uart", i, "baud", &ivar) != 0)
- ivar = CHIPC_UART_BAUDRATE;
-
- return (uart_cpu_init(di, i, ivar));
- }
-
- /* Default to uart0/115200 */
- return (uart_cpu_init(di, 0, CHIPC_UART_BAUDRATE));
-}