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authorBill Paul <wpaul@FreeBSD.org>1999-09-01 03:16:21 +0000
committerBill Paul <wpaul@FreeBSD.org>1999-09-01 03:16:21 +0000
commit499d0ac7aa27d52544c40dfe11bf0df6e151b520 (patch)
treeef8602733e207506e4b7f0ac85e264dc4590edf8 /sys/pci
parent3655c82c309fa98fdc84125d1dc77be119d39d61 (diff)
Notes
Diffstat (limited to 'sys/pci')
-rw-r--r--sys/pci/if_xl.c13
1 files changed, 13 insertions, 0 deletions
diff --git a/sys/pci/if_xl.c b/sys/pci/if_xl.c
index 77c5a81dcc1c..3a9a4aef79ae 100644
--- a/sys/pci/if_xl.c
+++ b/sys/pci/if_xl.c
@@ -524,6 +524,16 @@ static int xl_miibus_readreg(dev, phy, reg)
struct xl_softc *sc;
struct xl_mii_frame frame;
+ /*
+ * Pretend that PHYs are only available at MII address 24.
+ * This is to guard against problems with certain 3Com ASIC
+ * revisions that incorrectly map the internal transceiver
+ * control registers at all MII addresses. This can cause
+ * the miibus code to attach the same PHY several times over.
+ */
+ if (phy != 24)
+ return(0);
+
sc = device_get_softc(dev);
bzero((char *)&frame, sizeof(frame));
@@ -542,6 +552,9 @@ static int xl_miibus_writereg(dev, phy, reg, data)
struct xl_softc *sc;
struct xl_mii_frame frame;
+ if (phy != 24)
+ return(0);
+
sc = device_get_softc(dev);
bzero((char *)&frame, sizeof(frame));