diff options
| author | Nathan Whitehorn <nwhitehorn@FreeBSD.org> | 2017-11-25 22:10:10 +0000 |
|---|---|---|
| committer | Nathan Whitehorn <nwhitehorn@FreeBSD.org> | 2017-11-25 22:10:10 +0000 |
| commit | 312fb3d8dd0934cd532f56b489cac66066b55986 (patch) | |
| tree | fd12b35364c845a3603862b9473c3c2b2583df93 /sys/powerpc/aim/moea64_native.c | |
| parent | d225a2a9c9c2dbf6d4b6a466d1a7c6abdff3b16c (diff) | |
| download | src-312fb3d8dd0934cd532f56b489cac66066b55986.tar.gz src-312fb3d8dd0934cd532f56b489cac66066b55986.zip | |
Invalidate TLB at boot using the correct IS settings on newer-than-POWER5
CPUs.
MFC after: 3 weeks
Notes
Notes:
svn path=/head/; revision=326211
Diffstat (limited to 'sys/powerpc/aim/moea64_native.c')
| -rw-r--r-- | sys/powerpc/aim/moea64_native.c | 18 |
1 files changed, 16 insertions, 2 deletions
diff --git a/sys/powerpc/aim/moea64_native.c b/sys/powerpc/aim/moea64_native.c index b2ca5ae37a67..8294d80f15b1 100644 --- a/sys/powerpc/aim/moea64_native.c +++ b/sys/powerpc/aim/moea64_native.c @@ -382,7 +382,7 @@ moea64_cpu_bootstrap_native(mmu_t mmup, int ap) __asm __volatile ("slbmfee %0,%1; slbie %0;" : "=r"(seg0) : "r"(0)); - for (i = 0; i < 64; i++) { + for (i = 0; i < n_slbs; i++) { if (!(slb[i].slbe & SLBE_VALID)) continue; @@ -465,9 +465,23 @@ tlbia(void) register_t msr, scratch; #endif + i = 0xc00; /* IS = 11 */ + switch (mfpvr() >> 16) { + case IBM970: + case IBM970FX: + case IBM970MP: + case IBM970GX: + case IBMPOWER4: + case IBMPOWER4PLUS: + case IBMPOWER5: + case IBMPOWER5PLUS: + i = 0; /* IS not supported */ + break; + } + TLBSYNC(); - for (i = 0; i < 0xFF000; i += 0x00001000) { + for (; i < 0x200000; i += 0x00001000) { #ifdef __powerpc64__ __asm __volatile("tlbiel %0" :: "r"(i)); #else |