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authorKonstantin Belousov <kib@FreeBSD.org>2014-06-04 16:06:38 +0000
committerKonstantin Belousov <kib@FreeBSD.org>2014-06-04 16:06:38 +0000
commit49fe48ab0c94d759dcf1f05db39531a770a48837 (patch)
tree056c1deededcbf6e524ab08cf747efcff25c7834 /sys
parent60c5c866aab245a3b69b18f6707967031ac0da2a (diff)
Notes
Diffstat (limited to 'sys')
-rw-r--r--sys/dev/hwpmc/hwpmc_core.c6
-rw-r--r--sys/dev/hwpmc/hwpmc_intel.c13
-rw-r--r--sys/sys/pmc.h2
3 files changed, 19 insertions, 2 deletions
diff --git a/sys/dev/hwpmc/hwpmc_core.c b/sys/dev/hwpmc/hwpmc_core.c
index 2bebee2786e7..792f3037192a 100644
--- a/sys/dev/hwpmc/hwpmc_core.c
+++ b/sys/dev/hwpmc/hwpmc_core.c
@@ -2021,6 +2021,7 @@ iap_allocate_pmc(int cpu, int ri, struct pmc *pm,
switch (core_cputype) {
case PMC_CPU_INTEL_COREI7:
+ case PMC_CPU_INTEL_NEHALEM_EX:
if (iap_event_corei7_ok_on_counter(ev, ri) == 0)
return (EINVAL);
break;
@@ -2033,6 +2034,7 @@ iap_allocate_pmc(int cpu, int ri, struct pmc *pm,
return (EINVAL);
break;
case PMC_CPU_INTEL_WESTMERE:
+ case PMC_CPU_INTEL_WESTMERE_EX:
if (iap_event_westmere_ok_on_counter(ev, ri) == 0)
return (EINVAL);
break;
@@ -2186,7 +2188,9 @@ iap_allocate_pmc(int cpu, int ri, struct pmc *pm,
ev == PMC_EV_IAP_EVENT_BBH_01H)
return (EINVAL);
if ((core_cputype == PMC_CPU_INTEL_COREI7 ||
- core_cputype == PMC_CPU_INTEL_WESTMERE) &&
+ core_cputype == PMC_CPU_INTEL_WESTMERE ||
+ core_cputype == PMC_CPU_INTEL_NEHALEM_EX ||
+ core_cputype == PMC_CPU_INTEL_WESTMERE_EX) &&
a->pm_md.pm_iap.pm_iap_rsp & ~IA_OFFCORE_RSP_MASK_I7WM)
return (EINVAL);
else if ((core_cputype == PMC_CPU_INTEL_SANDYBRIDGE ||
diff --git a/sys/dev/hwpmc/hwpmc_intel.c b/sys/dev/hwpmc/hwpmc_intel.c
index 728d4f3584ed..6cf37b0c47dd 100644
--- a/sys/dev/hwpmc/hwpmc_intel.c
+++ b/sys/dev/hwpmc/hwpmc_intel.c
@@ -147,15 +147,22 @@ pmc_intel_initialize(void)
* Per Intel document 253669-032 9/2009,
* pages A-2 and A-57
*/
- case 0x2E:
cputype = PMC_CPU_INTEL_COREI7;
nclasses = 5;
break;
+ case 0x2E:
+ cputype = PMC_CPU_INTEL_NEHALEM_EX;
+ nclasses = 3;
+ break;
case 0x25: /* Per Intel document 253669-033US 12/2009. */
case 0x2C: /* Per Intel document 253669-033US 12/2009. */
cputype = PMC_CPU_INTEL_WESTMERE;
nclasses = 5;
break;
+ case 0x2F: /* Westmere-EX, seen in wild */
+ cputype = PMC_CPU_INTEL_WESTMERE_EX;
+ nclasses = 3;
+ break;
case 0x2A: /* Per Intel document 253669-039US 05/2011. */
cputype = PMC_CPU_INTEL_SANDYBRIDGE;
nclasses = 5;
@@ -218,9 +225,11 @@ pmc_intel_initialize(void)
case PMC_CPU_INTEL_CORE2:
case PMC_CPU_INTEL_CORE2EXTREME:
case PMC_CPU_INTEL_COREI7:
+ case PMC_CPU_INTEL_NEHALEM_EX:
case PMC_CPU_INTEL_IVYBRIDGE:
case PMC_CPU_INTEL_SANDYBRIDGE:
case PMC_CPU_INTEL_WESTMERE:
+ case PMC_CPU_INTEL_WESTMERE_EX:
case PMC_CPU_INTEL_SANDYBRIDGE_XEON:
case PMC_CPU_INTEL_IVYBRIDGE_XEON:
case PMC_CPU_INTEL_HASWELL:
@@ -307,10 +316,12 @@ pmc_intel_finalize(struct pmc_mdep *md)
case PMC_CPU_INTEL_CORE2:
case PMC_CPU_INTEL_CORE2EXTREME:
case PMC_CPU_INTEL_COREI7:
+ case PMC_CPU_INTEL_NEHALEM_EX:
case PMC_CPU_INTEL_HASWELL:
case PMC_CPU_INTEL_IVYBRIDGE:
case PMC_CPU_INTEL_SANDYBRIDGE:
case PMC_CPU_INTEL_WESTMERE:
+ case PMC_CPU_INTEL_WESTMERE_EX:
case PMC_CPU_INTEL_SANDYBRIDGE_XEON:
case PMC_CPU_INTEL_IVYBRIDGE_XEON:
pmc_core_finalize(md);
diff --git a/sys/sys/pmc.h b/sys/sys/pmc.h
index bcc462bd20cf..23405eae601c 100644
--- a/sys/sys/pmc.h
+++ b/sys/sys/pmc.h
@@ -92,6 +92,8 @@
__PMC_CPU(INTEL_IVYBRIDGE_XEON, 0x90, "Intel Ivy Bridge Xeon") \
__PMC_CPU(INTEL_HASWELL, 0x91, "Intel Haswell") \
__PMC_CPU(INTEL_ATOM_SILVERMONT, 0x92, "Intel Atom Silvermont") \
+ __PMC_CPU(INTEL_NEHALEM_EX, 0x93, "Intel Nehalem Xeon 7500") \
+ __PMC_CPU(INTEL_WESTMERE_EX, 0x94, "Intel Westmere Xeon E7") \
__PMC_CPU(INTEL_XSCALE, 0x100, "Intel XScale") \
__PMC_CPU(MIPS_24K, 0x200, "MIPS 24K") \
__PMC_CPU(MIPS_OCTEON, 0x201, "Cavium Octeon") \