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authorRoman Divacky <rdivacky@FreeBSD.org>2009-10-15 16:26:17 +0000
committerRoman Divacky <rdivacky@FreeBSD.org>2009-10-15 16:26:17 +0000
commit5cd822fa9bbb9622241e3bf4d7674ed49ccde5b9 (patch)
treefbc3e1401bc9623b861166be5940c750f5ca52da /test/CodeGen/ARM/vdup_lane.ll
parent26137f35958fa2237eceb06ef7003e3c19159129 (diff)
Notes
Diffstat (limited to 'test/CodeGen/ARM/vdup_lane.ll')
-rw-r--r--test/CodeGen/ARM/vdup_lane.ll52
1 files changed, 0 insertions, 52 deletions
diff --git a/test/CodeGen/ARM/vdup_lane.ll b/test/CodeGen/ARM/vdup_lane.ll
deleted file mode 100644
index adadc9f5d31b..000000000000
--- a/test/CodeGen/ARM/vdup_lane.ll
+++ /dev/null
@@ -1,52 +0,0 @@
-; RUN: llvm-as < %s | llc -march=arm -mattr=+neon > %t
-; RUN: grep vdup.8 %t | count 2
-; RUN: grep vdup.16 %t | count 2
-; RUN: grep vdup.32 %t | count 4
-
-define <8 x i8> @vduplane8(<8 x i8>* %A) nounwind {
- %tmp1 = load <8 x i8>* %A
- %tmp2 = shufflevector <8 x i8> %tmp1, <8 x i8> undef, <8 x i32> < i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1 >
- ret <8 x i8> %tmp2
-}
-
-define <4 x i16> @vduplane16(<4 x i16>* %A) nounwind {
- %tmp1 = load <4 x i16>* %A
- %tmp2 = shufflevector <4 x i16> %tmp1, <4 x i16> undef, <4 x i32> < i32 1, i32 1, i32 1, i32 1 >
- ret <4 x i16> %tmp2
-}
-
-define <2 x i32> @vduplane32(<2 x i32>* %A) nounwind {
- %tmp1 = load <2 x i32>* %A
- %tmp2 = shufflevector <2 x i32> %tmp1, <2 x i32> undef, <2 x i32> < i32 1, i32 1 >
- ret <2 x i32> %tmp2
-}
-
-define <2 x float> @vduplanefloat(<2 x float>* %A) nounwind {
- %tmp1 = load <2 x float>* %A
- %tmp2 = shufflevector <2 x float> %tmp1, <2 x float> undef, <2 x i32> < i32 1, i32 1 >
- ret <2 x float> %tmp2
-}
-
-define <16 x i8> @vduplaneQ8(<8 x i8>* %A) nounwind {
- %tmp1 = load <8 x i8>* %A
- %tmp2 = shufflevector <8 x i8> %tmp1, <8 x i8> undef, <16 x i32> < i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1 >
- ret <16 x i8> %tmp2
-}
-
-define <8 x i16> @vduplaneQ16(<4 x i16>* %A) nounwind {
- %tmp1 = load <4 x i16>* %A
- %tmp2 = shufflevector <4 x i16> %tmp1, <4 x i16> undef, <8 x i32> < i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1 >
- ret <8 x i16> %tmp2
-}
-
-define <4 x i32> @vduplaneQ32(<2 x i32>* %A) nounwind {
- %tmp1 = load <2 x i32>* %A
- %tmp2 = shufflevector <2 x i32> %tmp1, <2 x i32> undef, <4 x i32> < i32 1, i32 1, i32 1, i32 1 >
- ret <4 x i32> %tmp2
-}
-
-define <4 x float> @vduplaneQfloat(<2 x float>* %A) nounwind {
- %tmp1 = load <2 x float>* %A
- %tmp2 = shufflevector <2 x float> %tmp1, <2 x float> undef, <4 x i32> < i32 1, i32 1, i32 1, i32 1 >
- ret <4 x float> %tmp2
-}