diff options
| author | Dimitry Andric <dim@FreeBSD.org> | 2011-02-20 12:57:14 +0000 |
|---|---|---|
| committer | Dimitry Andric <dim@FreeBSD.org> | 2011-02-20 12:57:14 +0000 |
| commit | cf099d11218cb6f6c5cce947d6738e347f07fb12 (patch) | |
| tree | d2b61ce94e654cb01a254d2195259db5f9cc3f3c /test/CodeGen/MBlaze | |
| parent | 49011b52fcba02a6051957b84705159f52fae4e4 (diff) | |
Notes
Diffstat (limited to 'test/CodeGen/MBlaze')
| -rw-r--r-- | test/CodeGen/MBlaze/2010-04-07-DbgValueOtherTargets.ll | 43 | ||||
| -rw-r--r-- | test/CodeGen/MBlaze/brind.ll | 13 | ||||
| -rw-r--r-- | test/CodeGen/MBlaze/cc.ll | 85 | ||||
| -rw-r--r-- | test/CodeGen/MBlaze/fpu.ll | 16 | ||||
| -rw-r--r-- | test/CodeGen/MBlaze/imm.ll | 24 | ||||
| -rw-r--r-- | test/CodeGen/MBlaze/intr.ll | 48 | ||||
| -rw-r--r-- | test/CodeGen/MBlaze/jumptable.ll | 4 | ||||
| -rw-r--r-- | test/CodeGen/MBlaze/loop.ll | 3 | ||||
| -rw-r--r-- | test/CodeGen/MBlaze/mul.ll | 6 | ||||
| -rw-r--r-- | test/CodeGen/MBlaze/shift.ll | 26 | ||||
| -rw-r--r-- | test/CodeGen/MBlaze/svol.ll | 80 |
11 files changed, 209 insertions, 139 deletions
diff --git a/test/CodeGen/MBlaze/2010-04-07-DbgValueOtherTargets.ll b/test/CodeGen/MBlaze/2010-04-07-DbgValueOtherTargets.ll index 854352a70111..d8970eac9007 100644 --- a/test/CodeGen/MBlaze/2010-04-07-DbgValueOtherTargets.ll +++ b/test/CodeGen/MBlaze/2010-04-07-DbgValueOtherTargets.ll @@ -1,33 +1,28 @@ ; RUN: llc -O0 -march=mblaze -asm-verbose < %s | FileCheck %s ; Check that DEBUG_VALUE comments come through on a variety of targets. -%tart.reflect.ComplexType = type { double, double } - -@.type.SwitchStmtTest = constant %tart.reflect.ComplexType { double 3.0, double 2.0 } - -define i32 @"main(tart.core.String[])->int32"(i32 %args) { +define i32 @main() nounwind ssp { entry: ; CHECK: DEBUG_VALUE - tail call void @llvm.dbg.value(metadata !14, i64 0, metadata !8) - tail call void @"tart.reflect.ComplexType.create->tart.core.Object"(%tart.reflect.ComplexType* @.type.SwitchStmtTest) ; <%tart.core.Object*> [#uses=2] - ret i32 3 + call void @llvm.dbg.value(metadata !6, i64 0, metadata !7), !dbg !9 + ret i32 0, !dbg !10 } +declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone + declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone -declare void @"tart.reflect.ComplexType.create->tart.core.Object"(%tart.reflect.ComplexType*) nounwind readnone -!0 = metadata !{i32 458769, i32 0, i32 1, metadata !"sm.c", metadata !"/Volumes/MacOS9/tests/", metadata !"4.2.1 (Based on Apple Inc. build 5658) (LLVM build)", i1 true, i1 false, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] -!1 = metadata !{i32 458790, metadata !0, metadata !"", metadata !0, i32 0, i64 192, i64 64, i64 0, i32 0, metadata !2} ; [ DW_TAG_const_type ] -!2 = metadata !{i32 458771, metadata !0, metadata !"C", metadata !0, i32 1, i64 192, i64 64, i64 0, i32 0, null, metadata !3, i32 0, null} ; [ DW_TAG_structure_type ] -!3 = metadata !{metadata !4, metadata !6, metadata !7} -!4 = metadata !{i32 458765, metadata !2, metadata !"x", metadata !0, i32 1, i64 64, i64 64, i64 0, i32 0, metadata !5} ; [ DW_TAG_member ] -!5 = metadata !{i32 458788, metadata !0, metadata !"double", metadata !0, i32 0, i64 64, i64 64, i64 0, i32 0, i32 4} ; [ DW_TAG_base_type ] -!6 = metadata !{i32 458765, metadata !2, metadata !"y", metadata !0, i32 1, i64 64, i64 64, i64 64, i32 0, metadata !5} ; [ DW_TAG_member ] -!7 = metadata !{i32 458765, metadata !2, metadata !"z", metadata !0, i32 1, i64 64, i64 64, i64 128, i32 0, metadata !5} ; [ DW_TAG_member ] -!8 = metadata !{i32 459008, metadata !9, metadata !"t", metadata !0, i32 5, metadata !2} ; [ DW_TAG_auto_variable ] -!9 = metadata !{i32 458763, metadata !10} ; [ DW_TAG_lexical_block ] -!10 = metadata !{i32 458798, i32 0, metadata !0, metadata !"foo", metadata !"foo", metadata !"foo", metadata !0, i32 4, metadata !11, i1 false, i1 true, i32 0, i32 0, null} ; [ DW_TAG_subprogram ] -!11 = metadata !{i32 458773, metadata !0, metadata !"", metadata !0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !12, i32 0, null} ; [ DW_TAG_subroutine_type ] -!12 = metadata !{metadata !13} -!13 = metadata !{i32 458788, metadata !0, metadata !"int", metadata !0, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] -!14 = metadata !{%tart.reflect.ComplexType* @.type.SwitchStmtTest} +!llvm.dbg.sp = !{!0} + +!0 = metadata !{i32 589870, i32 0, metadata !1, metadata !"main", metadata !"main", metadata !"", metadata !1, i32 2, metadata !3, i1 false, i1 true, i32 0, i32 0, null, i32 0, i1 false, i32 ()* @main} ; [ DW_TAG_subprogram ] +!1 = metadata !{i32 589865, metadata !"/tmp/x.c", metadata !"/Users/manav", metadata !2} ; [ DW_TAG_file_type ] +!2 = metadata !{i32 589841, i32 0, i32 12, metadata !"/tmp/x.c", metadata !"/Users/manav", metadata !"clang version 2.9 (trunk 120996)", i1 true, i1 false, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] +!3 = metadata !{i32 589845, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !4, i32 0, null} ; [ DW_TAG_subroutine_type ] +!4 = metadata !{metadata !5} +!5 = metadata !{i32 589860, metadata !2, metadata !"int", metadata !1, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] +!6 = metadata !{i32 0} +!7 = metadata !{i32 590080, metadata !8, metadata !"i", metadata !1, i32 3, metadata !5, i32 0} ; [ DW_TAG_auto_variable ] +!8 = metadata !{i32 589835, metadata !0, i32 2, i32 12, metadata !1, i32 0} ; [ DW_TAG_lexical_block ] +!9 = metadata !{i32 3, i32 11, metadata !8, null} +!10 = metadata !{i32 4, i32 2, metadata !8, null} + diff --git a/test/CodeGen/MBlaze/brind.ll b/test/CodeGen/MBlaze/brind.ll index 7798e0f56aac..2229a873827a 100644 --- a/test/CodeGen/MBlaze/brind.ll +++ b/test/CodeGen/MBlaze/brind.ll @@ -28,32 +28,31 @@ loop: label %L3, label %L4, label %L5 ] - ; CHECK: br {{r[0-9]*}} + ; CHECK: brad {{r[0-9]*}} L1: %tmp.1 = add i32 %a, %b br label %finish - ; CHECK: br + ; CHECK: brid L2: %tmp.2 = sub i32 %a, %b br label %finish - ; CHECK: br + ; CHECK: brid L3: %tmp.3 = mul i32 %a, %b br label %finish - ; CHECK: br + ; CHECK: brid L4: %tmp.4 = sdiv i32 %a, %b br label %finish - ; CHECK: br + ; CHECK: brid L5: %tmp.5 = srem i32 %a, %b br label %finish - ; CHECK: br finish: %tmp.6 = phi i32 [ %tmp.1, %L1 ], @@ -69,5 +68,5 @@ finish: %tmp.8 = urem i32 %tmp.7, 5 br label %loop - ; CHECK: br + ; CHECK: brad {{r[0-9]*}} } diff --git a/test/CodeGen/MBlaze/cc.ll b/test/CodeGen/MBlaze/cc.ll index aaa918ffc343..b1eb22aee9fd 100644 --- a/test/CodeGen/MBlaze/cc.ll +++ b/test/CodeGen/MBlaze/cc.ll @@ -12,7 +12,7 @@ declare i32 @printf(i8*, ...) define void @params0_noret() { ; CHECK: params0_noret: ret void - ; CHECK-NOT: {{.* r3, r0, 1}} + ; CHECK-NOT: {{.* r3, .*, .*}} ; CHECK-NOT: {{.* r4, .*, .*}} ; CHECK: rtsd } @@ -20,81 +20,88 @@ define void @params0_noret() { define i8 @params0_8bitret() { ; CHECK: params0_8bitret: ret i8 1 - ; CHECK: {{.* r3, r0, 1}} + ; CHECK-NOT: {{.* r3, .*, .*}} ; CHECK-NOT: {{.* r4, .*, .*}} ; CHECK: rtsd + ; CHECK: {{.* r3, r0, 1}} } define i16 @params0_16bitret() { ; CHECK: params0_16bitret: ret i16 1 + ; CHECK: rtsd ; CHECK: {{.* r3, r0, 1}} ; CHECK-NOT: {{.* r4, .*, .*}} - ; CHECK: rtsd } define i32 @params0_32bitret() { ; CHECK: params0_32bitret: ret i32 1 - ; CHECK: {{.* r3, r0, 1}} ; CHECK-NOT: {{.* r4, .*, .*}} ; CHECK: rtsd + ; CHECK: {{.* r3, r0, 1}} } define i64 @params0_64bitret() { ; CHECK: params0_64bitret: ret i64 1 ; CHECK: {{.* r3, r0, .*}} - ; CHECK: {{.* r4, r0, 1}} ; CHECK: rtsd + ; CHECK: {{.* r4, r0, 1}} } define i32 @params1_32bitret(i32 %a) { ; CHECK: params1_32bitret: ret i32 %a - ; CHECK: {{.* r3, r5, r0}} + ; CHECK-NOT: {{.* r3, .*, .*}} ; CHECK-NOT: {{.* r4, .*, .*}} ; CHECK: rtsd + ; CHECK: {{.* r3, r5, r0}} } define i32 @params2_32bitret(i32 %a, i32 %b) { ; CHECK: params2_32bitret: ret i32 %b - ; CHECK: {{.* r3, r6, r0}} + ; CHECK-NOT: {{.* r3, .*, .*}} ; CHECK-NOT: {{.* r4, .*, .*}} ; CHECK: rtsd + ; CHECK: {{.* r3, r6, r0}} } define i32 @params3_32bitret(i32 %a, i32 %b, i32 %c) { ; CHECK: params3_32bitret: ret i32 %c - ; CHECK: {{.* r3, r7, r0}} + ; CHECK-NOT: {{.* r3, .*, .*}} ; CHECK-NOT: {{.* r4, .*, .*}} ; CHECK: rtsd + ; CHECK: {{.* r3, r7, r0}} } define i32 @params4_32bitret(i32 %a, i32 %b, i32 %c, i32 %d) { ; CHECK: params4_32bitret: ret i32 %d - ; CHECK: {{.* r3, r8, r0}} + ; CHECK-NOT: {{.* r3, .*, .*}} ; CHECK-NOT: {{.* r4, .*, .*}} ; CHECK: rtsd + ; CHECK: {{.* r3, r8, r0}} } define i32 @params5_32bitret(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e) { ; CHECK: params5_32bitret: ret i32 %e - ; CHECK: {{.* r3, r9, r0}} + ; CHECK-NOT: {{.* r3, .*, .*}} ; CHECK-NOT: {{.* r4, .*, .*}} ; CHECK: rtsd + ; CHECK: {{.* r3, r9, r0}} } define i32 @params6_32bitret(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f) { ; CHECK: params6_32bitret: ret i32 %f - ; CHECK: {{.* r3, r10, r0}} + ; CHECK-NOT: {{.* r3, .*, .*}} ; CHECK-NOT: {{.* r4, .*, .*}} ; CHECK: rtsd + ; CHECK: {{.* r3, r10, r0}} } define i32 @params7_32bitret(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, @@ -142,53 +149,29 @@ define void @testing() { %tmp.1 = call i8 @params0_8bitret() ; CHECK: brlid call i32 (i8*,...)* @printf(i8* %MSG.1, i8 %tmp.1) - ; CHECK: {{.* r5, .*, .*}} - ; CHECK: {{.* r6, r3, r0}} - ; CHECK-NOT: {{.* r7, .*, .*}} - ; CHECK: brlid %tmp.2 = call i16 @params0_16bitret() ; CHECK: brlid call i32 (i8*,...)* @printf(i8* %MSG.1, i16 %tmp.2) - ; CHECK: {{.* r5, .*, .*}} - ; CHECK: {{.* r6, r3, r0}} - ; CHECK-NOT: {{.* r7, .*, .*}} - ; CHECK: brlid %tmp.3 = call i32 @params0_32bitret() ; CHECK: brlid call i32 (i8*,...)* @printf(i8* %MSG.1, i32 %tmp.3) - ; CHECK: {{.* r5, .*, .*}} - ; CHECK: {{.* r6, r3, r0}} - ; CHECK-NOT: {{.* r7, .*, .*}} - ; CHECK: brlid %tmp.4 = call i64 @params0_64bitret() ; CHECK: brlid call i32 (i8*,...)* @printf(i8* %MSG.1, i64 %tmp.4) - ; CHECK: {{.* r5, .*, .*}} - ; CHECK: {{.* r6, r3, r0}} - ; CHECK: {{.* r7, r4, r0}} - ; CHECK: brlid %tmp.5 = call i32 @params1_32bitret(i32 1) ; CHECK: {{.* r5, .*, .*}} ; CHECK: brlid call i32 (i8*,...)* @printf(i8* %MSG.1, i32 %tmp.5) - ; CHECK: {{.* r5, .*, .*}} - ; CHECK: {{.* r6, r3, r0}} - ; CHECK-NOT: {{.* r7, .*, .*}} - ; CHECK: brlid %tmp.6 = call i32 @params2_32bitret(i32 1, i32 2) ; CHECK: {{.* r5, .*, .*}} ; CHECK: {{.* r6, .*, .*}} ; CHECK: brlid call i32 (i8*,...)* @printf(i8* %MSG.1, i32 %tmp.6) - ; CHECK: {{.* r5, .*, .*}} - ; CHECK: {{.* r6, r3, r0}} - ; CHECK-NOT: {{.* r7, .*, .*}} - ; CHECK: brlid %tmp.7 = call i32 @params3_32bitret(i32 1, i32 2, i32 3) ; CHECK: {{.* r5, .*, .*}} @@ -196,10 +179,6 @@ define void @testing() { ; CHECK: {{.* r7, .*, .*}} ; CHECK: brlid call i32 (i8*,...)* @printf(i8* %MSG.1, i32 %tmp.7) - ; CHECK: {{.* r5, .*, .*}} - ; CHECK: {{.* r6, r3, r0}} - ; CHECK-NOT: {{.* r7, .*, .*}} - ; CHECK: brlid %tmp.8 = call i32 @params4_32bitret(i32 1, i32 2, i32 3, i32 4) ; CHECK: {{.* r5, .*, .*}} @@ -208,10 +187,6 @@ define void @testing() { ; CHECK: {{.* r8, .*, .*}} ; CHECK: brlid call i32 (i8*,...)* @printf(i8* %MSG.1, i32 %tmp.8) - ; CHECK: {{.* r5, .*, .*}} - ; CHECK: {{.* r6, r3, r0}} - ; CHECK-NOT: {{.* r7, .*, .*}} - ; CHECK: brlid %tmp.9 = call i32 @params5_32bitret(i32 1, i32 2, i32 3, i32 4, i32 5) ; CHECK: {{.* r5, .*, .*}} @@ -221,10 +196,6 @@ define void @testing() { ; CHECK: {{.* r9, .*, .*}} ; CHECK: brlid call i32 (i8*,...)* @printf(i8* %MSG.1, i32 %tmp.9) - ; CHECK: {{.* r5, .*, .*}} - ; CHECK: {{.* r6, r3, r0}} - ; CHECK-NOT: {{.* r7, .*, .*}} - ; CHECK: brlid %tmp.10 = call i32 @params6_32bitret(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6) @@ -236,10 +207,6 @@ define void @testing() { ; CHECK: {{.* r10, .*, .*}} ; CHECK: brlid call i32 (i8*,...)* @printf(i8* %MSG.1, i32 %tmp.10) - ; CHECK: {{.* r5, .*, .*}} - ; CHECK: {{.* r6, r3, r0}} - ; CHECK-NOT: {{.* r7, .*, .*}} - ; CHECK: brlid %tmp.11 = call i32 @params7_32bitret(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7) @@ -252,10 +219,6 @@ define void @testing() { ; CHECK: {{.* r10, .*, .*}} ; CHECK: brlid call i32 (i8*,...)* @printf(i8* %MSG.1, i32 %tmp.11) - ; CHECK: {{.* r5, .*, .*}} - ; CHECK: {{.* r6, r3, r0}} - ; CHECK-NOT: {{.* r7, .*, .*}} - ; CHECK: brlid %tmp.12 = call i32 @params8_32bitret(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8) @@ -269,10 +232,6 @@ define void @testing() { ; CHECK: {{.* r10, .*, .*}} ; CHECK: brlid call i32 (i8*,...)* @printf(i8* %MSG.1, i32 %tmp.12) - ; CHECK: {{.* r5, .*, .*}} - ; CHECK: {{.* r6, r3, r0}} - ; CHECK-NOT: {{.* r7, .*, .*}} - ; CHECK: brlid %tmp.13 = call i32 @params9_32bitret(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9) @@ -287,10 +246,6 @@ define void @testing() { ; CHECK: {{.* r10, .*, .*}} ; CHECK: brlid call i32 (i8*,...)* @printf(i8* %MSG.1, i32 %tmp.13) - ; CHECK: {{.* r5, .*, .*}} - ; CHECK: {{.* r6, r3, r0}} - ; CHECK-NOT: {{.* r7, .*, .*}} - ; CHECK: brlid %tmp.14 = call i32 @params10_32bitret(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10) @@ -306,10 +261,6 @@ define void @testing() { ; CHECK: {{.* r10, .*, .*}} ; CHECK: brlid call i32 (i8*,...)* @printf(i8* %MSG.1, i32 %tmp.14) - ; CHECK: {{.* r5, .*, .*}} - ; CHECK: {{.* r6, r3, r0}} - ; CHECK-NOT: {{.* r7, .*, .*}} - ; CHECK: brlid ret void } diff --git a/test/CodeGen/MBlaze/fpu.ll b/test/CodeGen/MBlaze/fpu.ll index 83f4d831241d..2aef4fd64105 100644 --- a/test/CodeGen/MBlaze/fpu.ll +++ b/test/CodeGen/MBlaze/fpu.ll @@ -10,14 +10,14 @@ define float @test_add(float %a, float %b) { ; FPU: test_add: %tmp.1 = fadd float %a, %b - ; FUN-NOT: fadd ; FUN: brlid ; FPU-NOT: brlid - ; FPU: fadd ret float %tmp.1 ; FUN: rtsd ; FPU: rtsd + ; FUN-NOT: fadd + ; FPU-NEXT: fadd } define float @test_sub(float %a, float %b) { @@ -25,14 +25,14 @@ define float @test_sub(float %a, float %b) { ; FPU: test_sub: %tmp.1 = fsub float %a, %b - ; FUN-NOT: frsub ; FUN: brlid ; FPU-NOT: brlid - ; FPU: frsub ret float %tmp.1 ; FUN: rtsd ; FPU: rtsd + ; FUN-NOT: frsub + ; FPU-NEXT: frsub } define float @test_mul(float %a, float %b) { @@ -40,14 +40,14 @@ define float @test_mul(float %a, float %b) { ; FPU: test_mul: %tmp.1 = fmul float %a, %b - ; FUN-NOT: fmul ; FUN: brlid ; FPU-NOT: brlid - ; FPU: fmul ret float %tmp.1 ; FUN: rtsd ; FPU: rtsd + ; FUN-NOT: fmul + ; FPU-NEXT: fmul } define float @test_div(float %a, float %b) { @@ -55,12 +55,12 @@ define float @test_div(float %a, float %b) { ; FPU: test_div: %tmp.1 = fdiv float %a, %b - ; FUN-NOT: fdiv ; FUN: brlid ; FPU-NOT: brlid - ; FPU: fdiv ret float %tmp.1 ; FUN: rtsd ; FPU: rtsd + ; FUN-NOT: fdiv + ; FPU-NEXT: fdiv } diff --git a/test/CodeGen/MBlaze/imm.ll b/test/CodeGen/MBlaze/imm.ll index 85fad175b77f..6effd3e09a24 100644 --- a/test/CodeGen/MBlaze/imm.ll +++ b/test/CodeGen/MBlaze/imm.ll @@ -7,22 +7,22 @@ define i8 @retimm_i8() { ; CHECK: retimm_i8: - ; CHECK: add - ; CHECK-NEXT: rtsd + ; CHECK: rtsd + ; CHECK-NEXT: add ; FPU: retimm_i8: - ; FPU: add - ; FPU-NEXT: rtsd + ; FPU: rtsd + ; FPU-NEXT: add ret i8 123 } define i16 @retimm_i16() { ; CHECK: retimm_i16: - ; CHECK: add - ; CHECK-NEXT: rtsd + ; CHECK: rtsd + ; CHECK-NEXT: add ; FPU: retimm_i16: - ; FPU: add - ; FPU-NEXT: rtsd - ret i16 38212 + ; FPU: rtsd + ; FPU-NEXT: add + ret i16 31212 } define i32 @retimm_i32() { @@ -38,12 +38,12 @@ define i32 @retimm_i32() { define i64 @retimm_i64() { ; CHECK: retimm_i64: ; CHECK: add - ; CHECK-NEXT: add ; CHECK-NEXT: rtsd + ; CHECK-NEXT: add ; FPU: retimm_i64: ; FPU: add - ; FPU-NEXT: add ; FPU-NEXT: rtsd + ; FPU-NEXT: add ret i64 94581823 } @@ -53,7 +53,7 @@ define float @retimm_float() { ; CHECK-NEXT: rtsd ; FPU: retimm_float: ; FPU: or - ; FPU: rtsd + ; FPU-NEXT: rtsd ret float 12.0 } diff --git a/test/CodeGen/MBlaze/intr.ll b/test/CodeGen/MBlaze/intr.ll new file mode 100644 index 000000000000..79c6bffd00cb --- /dev/null +++ b/test/CodeGen/MBlaze/intr.ll @@ -0,0 +1,48 @@ +; Ensure that the MBlaze interrupt_handler calling convention (cc73) is handled +; correctly correctly by the MBlaze backend. +; +; RUN: llc < %s -march=mblaze | FileCheck %s + +@.str = private constant [28 x i8] c"The interrupt has gone off\0A\00" +@_interrupt_handler = alias void ()* @myintr + +define cc73 void @myintr() nounwind noinline { + ; CHECK: myintr: + ; CHECK: swi r3, r1 + ; CHECK: swi r4, r1 + ; CHECK: swi r5, r1 + ; CHECK: swi r6, r1 + ; CHECK: swi r7, r1 + ; CHECK: swi r8, r1 + ; CHECK: swi r9, r1 + ; CHECK: swi r10, r1 + ; CHECK: swi r11, r1 + ; CHECK: swi r12, r1 + ; CHECK: swi r17, r1 + ; CHECK: swi r18, r1 + ; CHECK: mfs r11, rmsr + ; CHECK: swi r11, r1 + entry: + %call = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([28 x i8]* @.str, i32 0, i32 0)) + ret void + + ; CHECK: lwi r11, r1 + ; CHECK: mts rmsr, r11 + ; CHECK: lwi r18, r1 + ; CHECK: lwi r17, r1 + ; CHECK: lwi r12, r1 + ; CHECK: lwi r11, r1 + ; CHECK: lwi r10, r1 + ; CHECK: lwi r9, r1 + ; CHECK: lwi r8, r1 + ; CHECK: lwi r7, r1 + ; CHECK: lwi r6, r1 + ; CHECK: lwi r5, r1 + ; CHECK: lwi r4, r1 + ; CHECK: lwi r3, r1 + ; CHECK: rtid r14, 0 +} + + ; CHECK: .globl _interrupt_handler + ; CHECK: _interrupt_handler = myintr +declare i32 @printf(i8*, ...) diff --git a/test/CodeGen/MBlaze/jumptable.ll b/test/CodeGen/MBlaze/jumptable.ll index 3f27c12f19a3..299084d0ed23 100644 --- a/test/CodeGen/MBlaze/jumptable.ll +++ b/test/CodeGen/MBlaze/jumptable.ll @@ -18,8 +18,8 @@ define i32 @jmptable(i32 %arg) i32 8, label %L8 i32 9, label %L9 ] - ; CHECK: lw [[REG:r[0-9]*]] - ; CHECK: br [[REG]] + ; CHECK: lw [[REG:r[0-9]*]] + ; CHECK: brad [[REG]] L0: %var0 = add i32 %arg, 0 br label %DONE diff --git a/test/CodeGen/MBlaze/loop.ll b/test/CodeGen/MBlaze/loop.ll index b473020e6641..8973f75aa1dc 100644 --- a/test/CodeGen/MBlaze/loop.ll +++ b/test/CodeGen/MBlaze/loop.ll @@ -27,11 +27,10 @@ loop_inner: loop_inner_finish: %inner.5 = add i32 %inner.2, 1 - ; CHECK: addi {{.*, 1}} - call i32 (i8*,...)* @printf( i8* getelementptr([19 x i8]* @MSG,i32 0,i32 0), i32 %inner.0, i32 %inner.1, i32 %inner.2 ) ; CHECK: brlid + ; CHECK: addik {{.*, 1}} %inner.6 = icmp eq i32 %inner.5, 100 ; CHECK: cmp diff --git a/test/CodeGen/MBlaze/mul.ll b/test/CodeGen/MBlaze/mul.ll index 65d3e22a3e74..cefdb8d56f21 100644 --- a/test/CodeGen/MBlaze/mul.ll +++ b/test/CodeGen/MBlaze/mul.ll @@ -13,11 +13,11 @@ define i8 @test_i8(i8 %a, i8 %b) { ; FUN-NOT: mul ; FUN: brlid ; MUL-NOT: brlid - ; MUL: mul ret i8 %tmp.1 ; FUN: rtsd ; MUL: rtsd + ; MUL: mul } define i16 @test_i16(i16 %a, i16 %b) { @@ -28,11 +28,11 @@ define i16 @test_i16(i16 %a, i16 %b) { ; FUN-NOT: mul ; FUN: brlid ; MUL-NOT: brlid - ; MUL: mul ret i16 %tmp.1 ; FUN: rtsd ; MUL: rtsd + ; MUL: mul } define i32 @test_i32(i32 %a, i32 %b) { @@ -43,9 +43,9 @@ define i32 @test_i32(i32 %a, i32 %b) { ; FUN-NOT: mul ; FUN: brlid ; MUL-NOT: brlid - ; MUL: mul ret i32 %tmp.1 ; FUN: rtsd ; MUL: rtsd + ; MUL: mul } diff --git a/test/CodeGen/MBlaze/shift.ll b/test/CodeGen/MBlaze/shift.ll index 186115ec192b..99f0519c020c 100644 --- a/test/CodeGen/MBlaze/shift.ll +++ b/test/CodeGen/MBlaze/shift.ll @@ -10,17 +10,16 @@ define i8 @test_i8(i8 %a, i8 %b) { ; SHT: test_i8: %tmp.1 = shl i8 %a, %b - ; FUN-NOT: bsll ; FUN: andi ; FUN: add ; FUN: bnei - ; SHT-NOT: andi ; SHT-NOT: bnei - ; SHT: bsll ret i8 %tmp.1 ; FUN: rtsd ; SHT: rtsd + ; FUN-NOT: bsll + ; SHT-NEXT: bsll } define i8 @testc_i8(i8 %a, i8 %b) { @@ -28,18 +27,18 @@ define i8 @testc_i8(i8 %a, i8 %b) { ; SHT: testc_i8: %tmp.1 = shl i8 %a, 5 - ; FUN-NOT: bsll ; FUN: andi ; FUN: add ; FUN: bnei ; SHT-NOT: andi ; SHT-NOT: add ; SHT-NOT: bnei - ; SHT: bslli ret i8 %tmp.1 ; FUN: rtsd ; SHT: rtsd + ; FUN-NOT: bsll + ; SHT-NEXT: bslli } define i16 @test_i16(i16 %a, i16 %b) { @@ -47,17 +46,16 @@ define i16 @test_i16(i16 %a, i16 %b) { ; SHT: test_i16: %tmp.1 = shl i16 %a, %b - ; FUN-NOT: bsll ; FUN: andi ; FUN: add ; FUN: bnei - ; SHT-NOT: andi ; SHT-NOT: bnei - ; SHT: bsll ret i16 %tmp.1 ; FUN: rtsd ; SHT: rtsd + ; FUN-NOT: bsll + ; SHT-NEXT: bsll } define i16 @testc_i16(i16 %a, i16 %b) { @@ -65,18 +63,18 @@ define i16 @testc_i16(i16 %a, i16 %b) { ; SHT: testc_i16: %tmp.1 = shl i16 %a, 5 - ; FUN-NOT: bsll ; FUN: andi ; FUN: add ; FUN: bnei ; SHT-NOT: andi ; SHT-NOT: add ; SHT-NOT: bnei - ; SHT: bslli ret i16 %tmp.1 ; FUN: rtsd ; SHT: rtsd + ; FUN-NOT: bsll + ; SHT-NEXT: bslli } define i32 @test_i32(i32 %a, i32 %b) { @@ -84,17 +82,17 @@ define i32 @test_i32(i32 %a, i32 %b) { ; SHT: test_i32: %tmp.1 = shl i32 %a, %b - ; FUN-NOT: bsll ; FUN: andi ; FUN: add ; FUN: bnei ; SHT-NOT: andi ; SHT-NOT: bnei - ; SHT: bsll ret i32 %tmp.1 ; FUN: rtsd ; SHT: rtsd + ; FUN-NOT: bsll + ; SHT-NEXT: bsll } define i32 @testc_i32(i32 %a, i32 %b) { @@ -102,16 +100,16 @@ define i32 @testc_i32(i32 %a, i32 %b) { ; SHT: testc_i32: %tmp.1 = shl i32 %a, 5 - ; FUN-NOT: bsll ; FUN: andi ; FUN: add ; FUN: bnei ; SHT-NOT: andi ; SHT-NOT: add ; SHT-NOT: bnei - ; SHT: bslli ret i32 %tmp.1 ; FUN: rtsd ; SHT: rtsd + ; FUN-NOT: bsll + ; SHT-NEXT: bslli } diff --git a/test/CodeGen/MBlaze/svol.ll b/test/CodeGen/MBlaze/svol.ll new file mode 100644 index 000000000000..c1e96202845a --- /dev/null +++ b/test/CodeGen/MBlaze/svol.ll @@ -0,0 +1,80 @@ +; Ensure that the MBlaze save_volatiles calling convention (cc74) is handled +; correctly correctly by the MBlaze backend. +; +; RUN: llc < %s -march=mblaze | FileCheck %s + +@.str = private constant [28 x i8] c"The interrupt has gone off\0A\00" + +define cc74 void @mysvol() nounwind noinline { + ; CHECK: mysvol: + ; CHECK: swi r3, r1 + ; CHECK: swi r4, r1 + ; CHECK: swi r5, r1 + ; CHECK: swi r6, r1 + ; CHECK: swi r7, r1 + ; CHECK: swi r8, r1 + ; CHECK: swi r9, r1 + ; CHECK: swi r10, r1 + ; CHECK: swi r11, r1 + ; CHECK: swi r12, r1 + ; CHECK: swi r17, r1 + ; CHECK: swi r18, r1 + ; CHECK-NOT: mfs r11, rmsr + entry: + %call = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([28 x i8]* @.str, i32 0, i32 0)) + ret void + + ; CHECK-NOT: mts rmsr, r11 + ; CHECK: lwi r18, r1 + ; CHECK: lwi r17, r1 + ; CHECK: lwi r12, r1 + ; CHECK: lwi r11, r1 + ; CHECK: lwi r10, r1 + ; CHECK: lwi r9, r1 + ; CHECK: lwi r8, r1 + ; CHECK: lwi r7, r1 + ; CHECK: lwi r6, r1 + ; CHECK: lwi r5, r1 + ; CHECK: lwi r4, r1 + ; CHECK: lwi r3, r1 + ; CHECK: rtsd r15, 8 +} + +define cc74 void @mysvol2() nounwind noinline { + ; CHECK: mysvol2: + ; CHECK-NOT: swi r3, r1 + ; CHECK-NOT: swi r4, r1 + ; CHECK-NOT: swi r5, r1 + ; CHECK-NOT: swi r6, r1 + ; CHECK-NOT: swi r7, r1 + ; CHECK-NOT: swi r8, r1 + ; CHECK-NOT: swi r9, r1 + ; CHECK-NOT: swi r10, r1 + ; CHECK-NOT: swi r11, r1 + ; CHECK-NOT: swi r12, r1 + ; CHECK: swi r17, r1 + ; CHECK: swi r18, r1 + ; CHECK-NOT: mfs r11, rmsr +entry: + + ; CHECK-NOT: mts rmsr, r11 + ; CHECK: lwi r18, r1 + ; CHECK: lwi r17, r1 + ; CHECK-NOT: lwi r12, r1 + ; CHECK-NOT: lwi r11, r1 + ; CHECK-NOT: lwi r10, r1 + ; CHECK-NOT: lwi r9, r1 + ; CHECK-NOT: lwi r8, r1 + ; CHECK-NOT: lwi r7, r1 + ; CHECK-NOT: lwi r6, r1 + ; CHECK-NOT: lwi r5, r1 + ; CHECK-NOT: lwi r4, r1 + ; CHECK-NOT: lwi r3, r1 + ; CHECK: rtsd r15, 8 + ret void +} + + ; CHECK-NOT: .globl _interrupt_handler + ; CHECK-NOT: _interrupt_handler = mysvol + ; CHECK-NOT: _interrupt_handler = mysvol2 +declare i32 @printf(i8*, ...) |
