diff options
| author | Dimitry Andric <dim@FreeBSD.org> | 2015-09-06 18:34:38 +0000 |
|---|---|---|
| committer | Dimitry Andric <dim@FreeBSD.org> | 2015-09-06 18:34:38 +0000 |
| commit | 69156b4c20249e7800cc09e0eef0beb3d15ac1ad (patch) | |
| tree | 461d3cf041290f4a99740d540bf0973d6084f98e /test/Transforms | |
| parent | ee8648bdac07986a0f1ec897b02ec82a2f144d46 (diff) | |
Notes
Diffstat (limited to 'test/Transforms')
| -rw-r--r-- | test/Transforms/GVN/pr24397.ll | 18 | ||||
| -rw-r--r-- | test/Transforms/InstCombine/pr24354.ll | 33 | ||||
| -rw-r--r-- | test/Transforms/InstCombine/vector-casts.ll | 11 | ||||
| -rw-r--r-- | test/Transforms/InstSimplify/2011-09-05-InsertExtractValue.ll | 10 | ||||
| -rw-r--r-- | test/Transforms/SROA/basictest.ll | 10 | ||||
| -rw-r--r-- | test/Transforms/SROA/big-endian.ll | 123 | ||||
| -rw-r--r-- | test/Transforms/SROA/phi-and-select.ll | 18 | ||||
| -rw-r--r-- | test/Transforms/Scalarizer/cache-bug.ll | 30 |
8 files changed, 241 insertions, 12 deletions
diff --git a/test/Transforms/GVN/pr24397.ll b/test/Transforms/GVN/pr24397.ll new file mode 100644 index 000000000000..db43964e2e4c --- /dev/null +++ b/test/Transforms/GVN/pr24397.ll @@ -0,0 +1,18 @@ +; RUN: opt -basicaa -gvn -disable-output < %s + +target triple = "x86_64-unknown-linux-gnu" + +define i64 @foo(i64** %arrayidx) { +entry: + %p = load i64*, i64** %arrayidx, align 8 + %cmpnull = icmp eq i64* %p, null + br label %BB2 + +entry2: ; No predecessors! + br label %BB2 + +BB2: ; preds = %entry2, %entry + %bc = bitcast i64** %arrayidx to i64* + %load = load i64, i64* %bc, align 8 + ret i64 %load +} diff --git a/test/Transforms/InstCombine/pr24354.ll b/test/Transforms/InstCombine/pr24354.ll new file mode 100644 index 000000000000..3b36fd1b74e3 --- /dev/null +++ b/test/Transforms/InstCombine/pr24354.ll @@ -0,0 +1,33 @@ +; RUN: opt -instcombine -S < %s | FileCheck %s + +; This used to crash opt + +@c = common global i32 0, align 4 +@b = common global i32 0, align 4 +@a = common global i16 0, align 2 +@d = common global i32 0, align 4 + +define void @fn3() { +; CHECK: @fn3 +bb: + %tmp = load i32, i32* @c, align 4 + %tmp1 = icmp eq i32 %tmp, 0 + br i1 %tmp1, label %bb2, label %bb6 + +bb2: ; preds = %bb + %tmp3 = load i32, i32* @b, align 4 + %tmp.i = add nsw i32 255, %tmp3 + %tmp5 = icmp ugt i32 %tmp.i, 254 + br label %bb6 + +bb6: ; preds = %bb, %bb2 + %tmp7 = phi i1 [ true, %bb ], [ %tmp5, %bb2 ] + %tmp8 = zext i1 %tmp7 to i32 + %tmp10 = icmp eq i32 %tmp8, 0 + %tmp12 = load i16, i16* @a, align 2 + %tmp14 = icmp ne i16 %tmp12, 0 + %tmp16 = select i1 %tmp10, i1 false, i1 %tmp14 + %tmp17 = zext i1 %tmp16 to i32 + store i32 %tmp17, i32* @d, align 4 + ret void +} diff --git a/test/Transforms/InstCombine/vector-casts.ll b/test/Transforms/InstCombine/vector-casts.ll index 727eb4ebb4c8..af18b4cfbdd1 100644 --- a/test/Transforms/InstCombine/vector-casts.ll +++ b/test/Transforms/InstCombine/vector-casts.ll @@ -150,3 +150,14 @@ entry: ret <4 x float> undef } +define <8 x i32> @pr24458(<8 x float> %n) { +; CHECK-LABEL: @pr24458 + %notequal_b_load_.i = fcmp une <8 x float> %n, zeroinitializer + %equal_a_load72_.i = fcmp ueq <8 x float> %n, zeroinitializer + %notequal_b_load__to_boolvec.i = sext <8 x i1> %notequal_b_load_.i to <8 x i32> + %equal_a_load72__to_boolvec.i = sext <8 x i1> %equal_a_load72_.i to <8 x i32> + %wrong = or <8 x i32> %notequal_b_load__to_boolvec.i, %equal_a_load72__to_boolvec.i + ret <8 x i32> %wrong +; CHECK-NEXT: ret <8 x i32> <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1> +} + diff --git a/test/Transforms/InstSimplify/2011-09-05-InsertExtractValue.ll b/test/Transforms/InstSimplify/2011-09-05-InsertExtractValue.ll index 7e391aba3045..441bc1adca7e 100644 --- a/test/Transforms/InstSimplify/2011-09-05-InsertExtractValue.ll +++ b/test/Transforms/InstSimplify/2011-09-05-InsertExtractValue.ll @@ -36,3 +36,13 @@ define i32 @test3(i32 %a, float %b) { ; CHECK-LABEL: @test3( ; CHECK: ret i32 %a } + +define i8 @test4(<8 x i8> %V) { + %add = add <8 x i8> %V, bitcast (double 0x319BEB8FD172E36 to <8 x i8>) + %extract = extractelement <8 x i8> %add, i32 6 + ret i8 %extract +; CHECK-LABEL: @test4( +; CHECK: %[[add:.*]] = add <8 x i8> %V, bitcast (<1 x double> <double 0x319BEB8FD172E36> to <8 x i8>) +; CHECK-NEXT: %[[extract:.*]] = extractelement <8 x i8> %[[add]], i32 6 +; CHECK-NEXT: ret i8 %[[extract]] +} diff --git a/test/Transforms/SROA/basictest.ll b/test/Transforms/SROA/basictest.ll index 7c8955b28fa2..ad2794167a5e 100644 --- a/test/Transforms/SROA/basictest.ll +++ b/test/Transforms/SROA/basictest.ll @@ -1195,20 +1195,24 @@ entry: %a = alloca <{ i1 }>, align 8 %b = alloca <{ i1 }>, align 8 ; CHECK: %[[a:.*]] = alloca i8, align 8 +; CHECK-NEXT: %[[b:.*]] = alloca i8, align 8 %b.i1 = bitcast <{ i1 }>* %b to i1* store i1 %x, i1* %b.i1, align 8 %b.i8 = bitcast <{ i1 }>* %b to i8* %foo = load i8, i8* %b.i8, align 1 -; CHECK-NEXT: %[[ext:.*]] = zext i1 %x to i8 -; CHECK-NEXT: store i8 %[[ext]], i8* %[[a]], align 8 -; CHECK-NEXT: {{.*}} = load i8, i8* %[[a]], align 8 +; CHECK-NEXT: %[[b_cast:.*]] = bitcast i8* %[[b]] to i1* +; CHECK-NEXT: store i1 %x, i1* %[[b_cast]], align 8 +; CHECK-NEXT: {{.*}} = load i8, i8* %[[b]], align 8 %a.i8 = bitcast <{ i1 }>* %a to i8* call void @llvm.memcpy.p0i8.p0i8.i32(i8* %a.i8, i8* %b.i8, i32 1, i32 1, i1 false) nounwind %bar = load i8, i8* %a.i8, align 1 %a.i1 = getelementptr inbounds <{ i1 }>, <{ i1 }>* %a, i32 0, i32 0 %baz = load i1, i1* %a.i1, align 1 +; CHECK-NEXT: %[[copy:.*]] = load i8, i8* %[[b]], align 8 +; CHECK-NEXT: store i8 %[[copy]], i8* %[[a]], align 8 +; CHECK-NEXT: {{.*}} = load i8, i8* %[[a]], align 8 ; CHECK-NEXT: %[[a_cast:.*]] = bitcast i8* %[[a]] to i1* ; CHECK-NEXT: {{.*}} = load i1, i1* %[[a_cast]], align 8 diff --git a/test/Transforms/SROA/big-endian.ll b/test/Transforms/SROA/big-endian.ll index b5a04ca8e64a..4de7bfcb898d 100644 --- a/test/Transforms/SROA/big-endian.ll +++ b/test/Transforms/SROA/big-endian.ll @@ -112,3 +112,126 @@ entry: ; CHECK-NEXT: %[[ret:.*]] = zext i56 %[[insert4]] to i64 ; CHECK-NEXT: ret i64 %[[ret]] } + +define i64 @PR14132(i1 %flag) { +; CHECK-LABEL: @PR14132( +; Here we form a PHI-node by promoting the pointer alloca first, and then in +; order to promote the other two allocas, we speculate the load of the +; now-phi-node-pointer. In doing so we end up loading a 64-bit value from an i8 +; alloca. While this is a bit dubious, we were asserting on trying to +; rewrite it. The trick is that the code using the value may carefully take +; steps to only use the not-undef bits, and so we need to at least loosely +; support this. This test is particularly interesting because how we handle +; a load of an i64 from an i8 alloca is dependent on endianness. +entry: + %a = alloca i64, align 8 + %b = alloca i8, align 8 + %ptr = alloca i64*, align 8 +; CHECK-NOT: alloca + + %ptr.cast = bitcast i64** %ptr to i8** + store i64 0, i64* %a + store i8 1, i8* %b + store i64* %a, i64** %ptr + br i1 %flag, label %if.then, label %if.end + +if.then: + store i8* %b, i8** %ptr.cast + br label %if.end +; CHECK-NOT: store +; CHECK: %[[ext:.*]] = zext i8 1 to i64 +; CHECK: %[[shift:.*]] = shl i64 %[[ext]], 56 + +if.end: + %tmp = load i64*, i64** %ptr + %result = load i64, i64* %tmp +; CHECK-NOT: load +; CHECK: %[[result:.*]] = phi i64 [ %[[shift]], %if.then ], [ 0, %entry ] + + ret i64 %result +; CHECK-NEXT: ret i64 %[[result]] +} + +declare void @f(i64 %x, i32 %y) + +define void @test3() { +; CHECK-LABEL: @test3( +; +; This is a test that specifically exercises the big-endian lowering because it +; ends up splitting a 64-bit integer into two smaller integers and has a number +; of tricky aspects (the i24 type) that make that hard. Historically, SROA +; would miscompile this by either dropping a most significant byte or least +; significant byte due to shrinking the [4,8) slice to an i24, or by failing to +; move the bytes around correctly. +; +; The magical number 34494054408 is used because it has bits set in various +; bytes so that it is clear if those bytes fail to be propagated. +; +; If you're debugging this, rather than using the direct magical numbers, run +; the IR through '-sroa -instcombine'. With '-instcombine' these will be +; constant folded, and if the i64 doesn't round-trip correctly, you've found +; a bug! +; +entry: + %a = alloca { i32, i24 }, align 4 +; CHECK-NOT: alloca + + %tmp0 = bitcast { i32, i24 }* %a to i64* + store i64 34494054408, i64* %tmp0 + %tmp1 = load i64, i64* %tmp0, align 4 + %tmp2 = bitcast { i32, i24 }* %a to i32* + %tmp3 = load i32, i32* %tmp2, align 4 +; CHECK: %[[HI_EXT:.*]] = zext i32 134316040 to i64 +; CHECK: %[[HI_INPUT:.*]] = and i64 undef, -4294967296 +; CHECK: %[[HI_MERGE:.*]] = or i64 %[[HI_INPUT]], %[[HI_EXT]] +; CHECK: %[[LO_EXT:.*]] = zext i32 8 to i64 +; CHECK: %[[LO_SHL:.*]] = shl i64 %[[LO_EXT]], 32 +; CHECK: %[[LO_INPUT:.*]] = and i64 %[[HI_MERGE]], 4294967295 +; CHECK: %[[LO_MERGE:.*]] = or i64 %[[LO_INPUT]], %[[LO_SHL]] + + call void @f(i64 %tmp1, i32 %tmp3) +; CHECK: call void @f(i64 %[[LO_MERGE]], i32 8) + ret void +; CHECK: ret void +} + +define void @test4() { +; CHECK-LABEL: @test4 +; +; Much like @test3, this is specifically testing big-endian management of data. +; Also similarly, it uses constants with particular bits set to help track +; whether values are corrupted, and can be easily evaluated by running through +; -instcombine to see that the i64 round-trips. +; +entry: + %a = alloca { i32, i24 }, align 4 + %a2 = alloca i64, align 4 +; CHECK-NOT: alloca + + store i64 34494054408, i64* %a2 + %tmp0 = bitcast { i32, i24 }* %a to i8* + %tmp1 = bitcast i64* %a2 to i8* + call void @llvm.memcpy.p0i8.p0i8.i64(i8* %tmp0, i8* %tmp1, i64 8, i32 4, i1 false) +; CHECK: %[[LO_SHR:.*]] = lshr i64 34494054408, 32 +; CHECK: %[[LO_START:.*]] = trunc i64 %[[LO_SHR]] to i32 +; CHECK: %[[HI_START:.*]] = trunc i64 34494054408 to i32 + + %tmp2 = bitcast { i32, i24 }* %a to i64* + %tmp3 = load i64, i64* %tmp2, align 4 + %tmp4 = bitcast { i32, i24 }* %a to i32* + %tmp5 = load i32, i32* %tmp4, align 4 +; CHECK: %[[HI_EXT:.*]] = zext i32 %[[HI_START]] to i64 +; CHECK: %[[HI_INPUT:.*]] = and i64 undef, -4294967296 +; CHECK: %[[HI_MERGE:.*]] = or i64 %[[HI_INPUT]], %[[HI_EXT]] +; CHECK: %[[LO_EXT:.*]] = zext i32 %[[LO_START]] to i64 +; CHECK: %[[LO_SHL:.*]] = shl i64 %[[LO_EXT]], 32 +; CHECK: %[[LO_INPUT:.*]] = and i64 %[[HI_MERGE]], 4294967295 +; CHECK: %[[LO_MERGE:.*]] = or i64 %[[LO_INPUT]], %[[LO_SHL]] + + call void @f(i64 %tmp3, i32 %tmp5) +; CHECK: call void @f(i64 %[[LO_MERGE]], i32 %[[LO_START]]) + ret void +; CHECK: ret void +} + +declare void @llvm.memcpy.p0i8.p0i8.i64(i8*, i8*, i64, i32, i1) diff --git a/test/Transforms/SROA/phi-and-select.ll b/test/Transforms/SROA/phi-and-select.ll index e97bd66d052a..fb76548b1d18 100644 --- a/test/Transforms/SROA/phi-and-select.ll +++ b/test/Transforms/SROA/phi-and-select.ll @@ -438,26 +438,26 @@ define i64 @PR14132(i1 %flag) { ; steps to only use the not-undef bits, and so we need to at least loosely ; support this.. entry: - %a = alloca i64 - %b = alloca i8 - %ptr = alloca i64* + %a = alloca i64, align 8 + %b = alloca i8, align 8 + %ptr = alloca i64*, align 8 ; CHECK-NOT: alloca %ptr.cast = bitcast i64** %ptr to i8** - store i64 0, i64* %a - store i8 1, i8* %b - store i64* %a, i64** %ptr + store i64 0, i64* %a, align 8 + store i8 1, i8* %b, align 8 + store i64* %a, i64** %ptr, align 8 br i1 %flag, label %if.then, label %if.end if.then: - store i8* %b, i8** %ptr.cast + store i8* %b, i8** %ptr.cast, align 8 br label %if.end ; CHECK-NOT: store ; CHECK: %[[ext:.*]] = zext i8 1 to i64 if.end: - %tmp = load i64*, i64** %ptr - %result = load i64, i64* %tmp + %tmp = load i64*, i64** %ptr, align 8 + %result = load i64, i64* %tmp, align 8 ; CHECK-NOT: load ; CHECK: %[[result:.*]] = phi i64 [ %[[ext]], %if.then ], [ 0, %entry ] diff --git a/test/Transforms/Scalarizer/cache-bug.ll b/test/Transforms/Scalarizer/cache-bug.ll new file mode 100644 index 000000000000..f8c2d100d59a --- /dev/null +++ b/test/Transforms/Scalarizer/cache-bug.ll @@ -0,0 +1,30 @@ +; RUN: opt -scalarizer -S < %s | FileCheck %s +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" + + +; Check that vector element 1 is scalarized correctly from a chain of +; insertelement instructions +define void @func(i32 %x) { +; CHECK-LABEL: @func( +; CHECK-NOT: phi i32 [ %x, %entry ], [ %inc.pos.y, %loop ] +; CHECK: phi i32 [ %inc, %entry ], [ %inc.pos.y, %loop ] +; CHECK: ret void +entry: + %vecinit = insertelement <2 x i32> <i32 0, i32 0>, i32 %x, i32 1 + %inc = add i32 %x, 1 + %0 = insertelement <2 x i32> %vecinit, i32 %inc, i32 1 + br label %loop + +loop: + %pos = phi <2 x i32> [ %0, %entry ], [ %new.pos.y, %loop ] + %i = phi i32 [ 0, %entry ], [ %new.i, %loop ] + %pos.y = extractelement <2 x i32> %pos, i32 1 + %inc.pos.y = add i32 %pos.y, 1 + %new.pos.y = insertelement <2 x i32> %pos, i32 %inc.pos.y, i32 1 + %new.i = add i32 %i, 1 + %cmp2 = icmp slt i32 %new.i, 1 + br i1 %cmp2, label %loop, label %exit + +exit: + ret void +} |
