vendor/llvm/llvm-trunk-r291012

15 files changed, 601 insertions, 42 deletions

diff --git a/test/Transforms/Inline/inline-invoke-tail.ll b/test/Transforms/Inline/inline-invoke-tail.ll
index c263fcea6009..5ae27bc0fe25 100644
--- a/test/Transforms/Inline/inline-invoke-tail.ll
+++ b/test/Transforms/Inline/inline-invoke-tail.ll
@@ -22,7 +22,7 @@ entry:
 ; CHECK-NOT: invoke
 ; CHECK-NOT: @foo
 ; CHECK-NOT: tail
-; CHCEK: call void @llvm.memcpy.p0i8.p0i8.i32
+; CHECK: call void @llvm.memcpy.p0i8.p0i8.i32
 ; CHECK: br
 
 invcont:
diff --git a/test/Transforms/InstCombine/add.ll b/test/Transforms/InstCombine/add.ll
index 7c46257273a3..39a746ab310b 100644
--- a/test/Transforms/InstCombine/add.ll
+++ b/test/Transforms/InstCombine/add.ll
@@ -507,3 +507,15 @@ define i1 @test40(i32 %a, i32 %b) {
   %cmp = icmp eq i32 %add, %b
   ret i1 %cmp
 }
+
+define i64 @test41(i32 %a) {
+; CHECK-LABEL: @test41(
+; CHECK-NEXT:    [[ADD:%.*]] = add nuw i32 %a, 15
+; CHECK-NEXT:    [[EXT:%.*]] = zext i32 [[ADD]] to i64
+; CHECK-NEXT:    ret i64 [[EXT]]
+;
+  %add = add nuw i32 %a, 16
+  %zext = zext i32 %add to i64
+  %sub = add i64 %zext, -1
+  ret i64 %sub
+}
diff --git a/test/Transforms/InstCombine/assume.ll b/test/Transforms/InstCombine/assume.ll
index 2f9213820f2b..7987aa242319 100644
--- a/test/Transforms/InstCombine/assume.ll
+++ b/test/Transforms/InstCombine/assume.ll
@@ -188,41 +188,56 @@ entry:
 
 declare void @escape(i32* %a)
 
-; Do we canonicalize a nonnull assumption on a load into
-; metadata form?
+; Canonicalize a nonnull assumption on a load into metadata form.
+
 define i1 @nonnull1(i32** %a) {
-entry:
+; CHECK-LABEL: @nonnull1(
+; CHECK-NEXT:    [[LOAD:%.*]] = load i32*, i32** %a, align 8, !nonnull !0
+; CHECK-NEXT:    tail call void @escape(i32* nonnull [[LOAD]])
+; CHECK-NEXT:    ret i1 false
+;
   %load = load i32*, i32** %a
   %cmp = icmp ne i32* %load, null
   tail call void @llvm.assume(i1 %cmp)
   tail call void @escape(i32* %load)
   %rval = icmp eq i32* %load, null
   ret i1 %rval
-
-; CHECK-LABEL: @nonnull1
-; CHECK: !nonnull
-; CHECK-NOT: call void @llvm.assume
-; CHECK: ret i1 false
 }
 
 ; Make sure the above canonicalization applies only
 ; to pointer types.  Doing otherwise would be illegal.
+
 define i1 @nonnull2(i32* %a) {
-entry:
+; CHECK-LABEL: @nonnull2(
+; CHECK-NEXT:    [[LOAD:%.*]] = load i32, i32* %a, align 4
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ne i32 [[LOAD]], 0
+; CHECK-NEXT:    tail call void @llvm.assume(i1 [[CMP]])
+; CHECK-NEXT:    [[RVAL:%.*]] = icmp eq i32 [[LOAD]], 0
+; CHECK-NEXT:    ret i1 [[RVAL]]
+;
   %load = load i32, i32* %a
   %cmp = icmp ne i32 %load, 0
   tail call void @llvm.assume(i1 %cmp)
   %rval = icmp eq i32 %load, 0
   ret i1 %rval
-
-; CHECK-LABEL: @nonnull2
-; CHECK-NOT: !nonnull
-; CHECK: call void @llvm.assume
 }
 
 ; Make sure the above canonicalization does not trigger
 ; if the assume is control dependent on something else
+
 define i1 @nonnull3(i32** %a, i1 %control) {
+; CHECK-LABEL: @nonnull3(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[LOAD:%.*]] = load i32*, i32** %a, align 8
+; CHECK-NEXT:    br i1 %control, label %taken, label %not_taken
+; CHECK:       taken:
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ne i32* [[LOAD]], null
+; CHECK-NEXT:    tail call void @llvm.assume(i1 [[CMP]])
+; CHECK-NEXT:    [[RVAL:%.*]] = icmp eq i32* [[LOAD]], null
+; CHECK-NEXT:    ret i1 [[RVAL]]
+; CHECK:       not_taken:
+; CHECK-NEXT:    ret i1 true
+;
 entry:
   %load = load i32*, i32** %a
   %cmp = icmp ne i32* %load, null
@@ -233,17 +248,21 @@ taken:
   ret i1 %rval
 not_taken:
   ret i1 true
-
-; CHECK-LABEL: @nonnull3
-; CHECK-NOT: !nonnull
-; CHECK: call void @llvm.assume
 }
 
 ; Make sure the above canonicalization does not trigger
-; if the path from the load to the assume is potentially 
+; if the path from the load to the assume is potentially
 ; interrupted by an exception being thrown
+
 define i1 @nonnull4(i32** %a) {
-entry:
+; CHECK-LABEL: @nonnull4(
+; CHECK-NEXT:    [[LOAD:%.*]] = load i32*, i32** %a, align 8
+; CHECK-NEXT:    tail call void @escape(i32* [[LOAD]])
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ne i32* [[LOAD]], null
+; CHECK-NEXT:    tail call void @llvm.assume(i1 [[CMP]])
+; CHECK-NEXT:    [[RVAL:%.*]] = icmp eq i32* [[LOAD]], null
+; CHECK-NEXT:    ret i1 [[RVAL]]
+;
   %load = load i32*, i32** %a
   ;; This call may throw!
   tail call void @escape(i32* %load)
@@ -251,15 +270,9 @@ entry:
   tail call void @llvm.assume(i1 %cmp)
   %rval = icmp eq i32* %load, null
   ret i1 %rval
-
-; CHECK-LABEL: @nonnull4
-; CHECK-NOT: !nonnull
-; CHECK: call void @llvm.assume
 }
 
 
-
-
 attributes #0 = { nounwind uwtable }
 attributes #1 = { nounwind }
 
diff --git a/test/Transforms/InstCombine/fabs.ll b/test/Transforms/InstCombine/fabs.ll
index 0479549bea3f..09bea5895aaf 100644
--- a/test/Transforms/InstCombine/fabs.ll
+++ b/test/Transforms/InstCombine/fabs.ll
@@ -98,3 +98,51 @@ define float @square_fabs_shrink_call2(float %x) {
 ; CHECK-NEXT: ret float %sq
 }
 
+; CHECK-LABEL: @fabs_select_constant_negative_positive(
+; CHECK: %fabs = select i1 %cmp, float 1.000000e+00, float 2.000000e+00
+; CHECK-NEXT: ret float %fabs
+define float @fabs_select_constant_negative_positive(i32 %c) {
+  %cmp = icmp eq i32 %c, 0
+  %select = select i1 %cmp, float -1.0, float 2.0
+  %fabs = call float @llvm.fabs.f32(float %select)
+  ret float %fabs
+}
+
+; CHECK-LABEL: @fabs_select_constant_positive_negative(
+; CHECK: %fabs = select i1 %cmp, float 1.000000e+00, float 2.000000e+00
+; CHECK-NEXT: ret float %fabs
+define float @fabs_select_constant_positive_negative(i32 %c) {
+  %cmp = icmp eq i32 %c, 0
+  %select = select i1 %cmp, float 1.0, float -2.0
+  %fabs = call float @llvm.fabs.f32(float %select)
+  ret float %fabs
+}
+
+; CHECK-LABEL: @fabs_select_constant_negative_negative(
+; CHECK: %fabs = select i1 %cmp, float 1.000000e+00, float 2.000000e+00
+; CHECK-NEXT: ret float %fabs
+define float @fabs_select_constant_negative_negative(i32 %c) {
+  %cmp = icmp eq i32 %c, 0
+  %select = select i1 %cmp, float -1.0, float -2.0
+  %fabs = call float @llvm.fabs.f32(float %select)
+  ret float %fabs
+}
+
+; CHECK-LABEL: @fabs_select_constant_neg0(
+; CHECK-NEXT: ret float 0.0
+define float @fabs_select_constant_neg0(i32 %c) {
+  %cmp = icmp eq i32 %c, 0
+  %select = select i1 %cmp, float -0.0, float 0.0
+  %fabs = call float @llvm.fabs.f32(float %select)
+  ret float %fabs
+}
+
+; CHECK-LABEL: @fabs_select_var_constant_negative(
+; CHECK: %select = select i1 %cmp, float %x, float -1.000000e+00
+; CHECK: %fabs = call float @llvm.fabs.f32(float %select)
+define float @fabs_select_var_constant_negative(i32 %c, float %x) {
+  %cmp = icmp eq i32 %c, 0
+  %select = select i1 %cmp, float %x, float -1.0
+  %fabs = call float @llvm.fabs.f32(float %select)
+  ret float %fabs
+}
diff --git a/test/Transforms/InstCombine/fma.ll b/test/Transforms/InstCombine/fma.ll
new file mode 100644
index 000000000000..e41f1e7edd46
--- /dev/null
+++ b/test/Transforms/InstCombine/fma.ll
@@ -0,0 +1,203 @@
+; RUN: opt -S -instcombine < %s | FileCheck %s
+
+declare float @llvm.fma.f32(float, float, float) #1
+declare <2 x float> @llvm.fma.v2f32(<2 x float>, <2 x float>, <2 x float>) #1
+declare float @llvm.fmuladd.f32(float, float, float) #1
+declare float @llvm.fabs.f32(float) #1
+
+@external = external global i32
+
+; CHECK-LABEL: @fma_fneg_x_fneg_y(
+; CHECK: %fma = call float @llvm.fma.f32(float %x, float %y, float %z)
+define float @fma_fneg_x_fneg_y(float %x, float %y, float %z) {
+  %x.fneg = fsub float -0.0, %x
+  %y.fneg = fsub float -0.0, %y
+  %fma = call float @llvm.fma.f32(float %x.fneg, float %y.fneg, float %z)
+  ret float %fma
+}
+
+; CHECK-LABEL: @fma_fneg_x_fneg_y_fast(
+; CHECK: %fma = call fast float @llvm.fma.f32(float %x, float %y, float %z)
+define float @fma_fneg_x_fneg_y_fast(float %x, float %y, float %z) {
+  %x.fneg = fsub float -0.0, %x
+  %y.fneg = fsub float -0.0, %y
+  %fma = call fast float @llvm.fma.f32(float %x.fneg, float %y.fneg, float %z)
+  ret float %fma
+}
+
+; CHECK-LABEL: @fma_fneg_const_fneg_y(
+; CHECK: %fma = call float @llvm.fma.f32(float %y, float bitcast (i32 ptrtoint (i32* @external to i32) to float), float %z)
+define float @fma_fneg_const_fneg_y(float %y, float %z) {
+  %y.fneg = fsub float -0.0, %y
+  %fma = call float @llvm.fma.f32(float fsub (float -0.0, float bitcast (i32 ptrtoint (i32* @external to i32) to float)), float %y.fneg, float %z)
+  ret float %fma
+}
+
+; CHECK-LABEL: @fma_fneg_x_fneg_const(
+; CHECK: %fma = call float @llvm.fma.f32(float %x, float bitcast (i32 ptrtoint (i32* @external to i32) to float), float %z)
+define float @fma_fneg_x_fneg_const(float %x, float %z) {
+  %x.fneg = fsub float -0.0, %x
+  %fma = call float @llvm.fma.f32(float %x.fneg, float fsub (float -0.0, float bitcast (i32 ptrtoint (i32* @external to i32) to float)), float %z)
+  ret float %fma
+}
+
+; CHECK-LABEL: @fma_fabs_x_fabs_y(
+; CHECK: %x.fabs = call float @llvm.fabs.f32(float %x)
+; CHECK: %y.fabs = call float @llvm.fabs.f32(float %y)
+; CHECK: %fma = call float @llvm.fma.f32(float %x.fabs, float %y.fabs, float %z)
+define float @fma_fabs_x_fabs_y(float %x, float %y, float %z) {
+  %x.fabs = call float @llvm.fabs.f32(float %x)
+  %y.fabs = call float @llvm.fabs.f32(float %y)
+  %fma = call float @llvm.fma.f32(float %x.fabs, float %y.fabs, float %z)
+  ret float %fma
+}
+
+; CHECK-LABEL: @fma_fabs_x_fabs_x(
+; CHECK: %fma = call float @llvm.fma.f32(float %x, float %x, float %z)
+define float @fma_fabs_x_fabs_x(float %x, float %z) {
+  %x.fabs = call float @llvm.fabs.f32(float %x)
+  %fma = call float @llvm.fma.f32(float %x.fabs, float %x.fabs, float %z)
+  ret float %fma
+}
+
+; CHECK-LABEL: @fma_fabs_x_fabs_x_fast(
+; CHECK: %fma = call fast float @llvm.fma.f32(float %x, float %x, float %z)
+define float @fma_fabs_x_fabs_x_fast(float %x, float %z) {
+  %x.fabs = call float @llvm.fabs.f32(float %x)
+  %fma = call fast float @llvm.fma.f32(float %x.fabs, float %x.fabs, float %z)
+  ret float %fma
+}
+
+; CHECK-LABEL: @fmuladd_fneg_x_fneg_y(
+; CHECK: %fmuladd = call float @llvm.fmuladd.f32(float %x, float %y, float %z)
+define float @fmuladd_fneg_x_fneg_y(float %x, float %y, float %z) {
+  %x.fneg = fsub float -0.0, %x
+  %y.fneg = fsub float -0.0, %y
+  %fmuladd = call float @llvm.fmuladd.f32(float %x.fneg, float %y.fneg, float %z)
+  ret float %fmuladd
+}
+
+; CHECK-LABEL: @fmuladd_fneg_x_fneg_y_fast(
+; CHECK: %fmuladd = call fast float @llvm.fmuladd.f32(float %x, float %y, float %z)
+define float @fmuladd_fneg_x_fneg_y_fast(float %x, float %y, float %z) {
+  %x.fneg = fsub float -0.0, %x
+  %y.fneg = fsub float -0.0, %y
+  %fmuladd = call fast float @llvm.fmuladd.f32(float %x.fneg, float %y.fneg, float %z)
+  ret float %fmuladd
+}
+
+; CHECK-LABEL: @fmuladd_fneg_const_fneg_y(
+; CHECK: %fmuladd = call float @llvm.fmuladd.f32(float %y, float bitcast (i32 ptrtoint (i32* @external to i32) to float), float %z)
+define float @fmuladd_fneg_const_fneg_y(float %y, float %z) {
+  %y.fneg = fsub float -0.0, %y
+  %fmuladd = call float @llvm.fmuladd.f32(float fsub (float -0.0, float bitcast (i32 ptrtoint (i32* @external to i32) to float)), float %y.fneg, float %z)
+  ret float %fmuladd
+}
+
+; CHECK-LABEL: @fmuladd_fneg_x_fneg_const(
+; CHECK: %fmuladd = call float @llvm.fmuladd.f32(float %x, float bitcast (i32 ptrtoint (i32* @external to i32) to float), float %z)
+define float @fmuladd_fneg_x_fneg_const(float %x, float %z) {
+  %x.fneg = fsub float -0.0, %x
+  %fmuladd = call float @llvm.fmuladd.f32(float %x.fneg, float fsub (float -0.0, float bitcast (i32 ptrtoint (i32* @external to i32) to float)), float %z)
+  ret float %fmuladd
+}
+
+; CHECK-LABEL: @fmuladd_fabs_x_fabs_y(
+; CHECK: %x.fabs = call float @llvm.fabs.f32(float %x)
+; CHECK: %y.fabs = call float @llvm.fabs.f32(float %y)
+; CHECK: %fmuladd = call float @llvm.fmuladd.f32(float %x.fabs, float %y.fabs, float %z)
+define float @fmuladd_fabs_x_fabs_y(float %x, float %y, float %z) {
+  %x.fabs = call float @llvm.fabs.f32(float %x)
+  %y.fabs = call float @llvm.fabs.f32(float %y)
+  %fmuladd = call float @llvm.fmuladd.f32(float %x.fabs, float %y.fabs, float %z)
+  ret float %fmuladd
+}
+
+; CHECK-LABEL: @fmuladd_fabs_x_fabs_x(
+; CHECK: %fmuladd = call float @llvm.fmuladd.f32(float %x, float %x, float %z)
+define float @fmuladd_fabs_x_fabs_x(float %x, float %z) {
+  %x.fabs = call float @llvm.fabs.f32(float %x)
+  %fmuladd = call float @llvm.fmuladd.f32(float %x.fabs, float %x.fabs, float %z)
+  ret float %fmuladd
+}
+
+; CHECK-LABEL: @fmuladd_fabs_x_fabs_x_fast(
+; CHECK: %fmuladd = call fast float @llvm.fmuladd.f32(float %x, float %x, float %z)
+define float @fmuladd_fabs_x_fabs_x_fast(float %x, float %z) {
+  %x.fabs = call float @llvm.fabs.f32(float %x)
+  %fmuladd = call fast float @llvm.fmuladd.f32(float %x.fabs, float %x.fabs, float %z)
+  ret float %fmuladd
+}
+
+; CHECK-LABEL: @fma_k_y_z(
+; CHECK: %fma = call float @llvm.fma.f32(float %y, float 4.000000e+00, float %z)
+define float @fma_k_y_z(float %y, float %z) {
+  %fma = call float @llvm.fma.f32(float 4.0, float %y, float %z)
+  ret float %fma
+}
+
+; CHECK-LABEL: @fma_k_y_z_fast(
+; CHECK: %fma = call fast float @llvm.fma.f32(float %y, float 4.000000e+00, float %z)
+define float @fma_k_y_z_fast(float %y, float %z) {
+  %fma = call fast float @llvm.fma.f32(float 4.0, float %y, float %z)
+  ret float %fma
+}
+
+; CHECK-LABEL: @fmuladd_k_y_z_fast(
+; CHECK: %fmuladd = call fast float @llvm.fmuladd.f32(float %y, float 4.000000e+00, float %z)
+define float @fmuladd_k_y_z_fast(float %y, float %z) {
+  %fmuladd = call fast float @llvm.fmuladd.f32(float 4.0, float %y, float %z)
+  ret float %fmuladd
+}
+
+; CHECK-LABEL: @fma_1_y_z(
+; CHECK: %fma = fadd float %y, %z
+define float @fma_1_y_z(float %y, float %z) {
+  %fma = call float @llvm.fma.f32(float 1.0, float %y, float %z)
+  ret float %fma
+}
+
+; CHECK-LABEL: @fma_x_1_z(
+; CHECK: %fma = fadd float %x, %z
+define float @fma_x_1_z(float %x, float %z) {
+  %fma = call float @llvm.fma.f32(float %x, float 1.0, float %z)
+  ret float %fma
+}
+
+; CHECK-LABEL: @fma_x_1_z_v2f32(
+; CHECK: %fma = fadd <2 x float> %x, %z
+define <2 x float> @fma_x_1_z_v2f32(<2 x float> %x, <2 x float> %z) {
+  %fma = call <2 x float> @llvm.fma.v2f32(<2 x float> %x, <2 x float> <float 1.0, float 1.0>, <2 x float> %z)
+  ret <2 x float> %fma
+}
+
+; CHECK-LABEL: @fma_x_1_2_z_v2f32(
+; CHECK: %fma = call <2 x float> @llvm.fma.v2f32(<2 x float> %x, <2 x float> <float 1.000000e+00, float 2.000000e+00>, <2 x float> %z)
+define <2 x float> @fma_x_1_2_z_v2f32(<2 x float> %x, <2 x float> %z) {
+  %fma = call <2 x float> @llvm.fma.v2f32(<2 x float> %x, <2 x float> <float 1.0, float 2.0>, <2 x float> %z)
+  ret <2 x float> %fma
+}
+
+; CHECK-LABEL: @fma_x_1_z_fast(
+; CHECK: %fma = fadd fast float %x, %z
+define float @fma_x_1_z_fast(float %x, float %z) {
+  %fma = call fast float @llvm.fma.f32(float %x, float 1.0, float %z)
+  ret float %fma
+}
+
+; CHECK-LABEL: @fma_1_1_z(
+; CHECK: %fma = fadd float %z, 1.0
+define float @fma_1_1_z(float %z) {
+  %fma = call float @llvm.fma.f32(float 1.0, float 1.0, float %z)
+  ret float %fma
+}
+
+; CHECK-LABEL: @fmuladd_x_1_z_fast(
+; CHECK: %fmuladd = fadd fast float %x, %z
+define float @fmuladd_x_1_z_fast(float %x, float %z) {
+  %fmuladd = call fast float @llvm.fmuladd.f32(float %x, float 1.0, float %z)
+  ret float %fmuladd
+}
+
+attributes #0 = { nounwind }
+attributes #1 = { nounwind readnone }
diff --git a/test/Transforms/InstCombine/rem.ll b/test/Transforms/InstCombine/rem.ll
index 74d42fa99bf2..89a741c90707 100644
--- a/test/Transforms/InstCombine/rem.ll
+++ b/test/Transforms/InstCombine/rem.ll
@@ -204,11 +204,11 @@ define i32 @test17(i32 %X) {
 
 define i32 @test18(i16 %x, i32 %y) {
 ; CHECK: @test18
-; CHECK-NEXT: [[AND:%.*]] = and i16 %x, 4
-; CHECK-NEXT: [[EXT:%.*]] = zext i16 [[AND]] to i32
-; CHECK-NEXT: [[SHL:%.*]] = shl nuw nsw i32 [[EXT]], 3
-; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[SHL]], 63
-; CHECK-NEXT: [[REM:%.*]] = and i32 [[XOR]], %y
+; CHECK-NEXT: [[SHL:%.*]] = shl i16 %x, 3
+; CHECK-NEXT: [[AND:%.*]] = and i16 [[SHL]], 32
+; CHECK-NEXT: [[XOR:%.*]] = xor i16 [[AND]], 63
+; CHECK-NEXT: [[EXT:%.*]] = zext i16 [[XOR]] to i32
+; CHECK-NEXT: [[REM:%.*]] = and i32 [[EXT]], %y
 ; CHECK-NEXT: ret i32 [[REM]]
 	%1 = and i16 %x, 4
 	%2 = icmp ne i16 %1, 0
diff --git a/test/Transforms/InstCombine/shift.ll b/test/Transforms/InstCombine/shift.ll
index dab212dc583d..c046a72110c2 100644
--- a/test/Transforms/InstCombine/shift.ll
+++ b/test/Transforms/InstCombine/shift.ll
@@ -1049,3 +1049,15 @@ define <2 x i65> @test_63(<2 x i64> %t) {
   %b = ashr <2 x i65> %sext, <i65 33, i65 33>
   ret <2 x i65> %b
 }
+
+define i64 @test_64(i32 %t) {
+; CHECK-LABEL: @test_64(
+; CHECK-NEXT: [[SHL:%.*]] = shl i32 %t, 8
+; CHECK-NEXT: [[EXT:%.*]] = zext i32 [[SHL]] to i64
+; CHECK-NEXT: ret i64 [[EXT]]
+
+  %and = and i32 %t, 16777215
+  %ext = zext i32 %and to i64
+  %shl = shl i64 %ext, 8
+  ret i64 %shl
+}
diff --git a/test/Transforms/InstCombine/sink-zext.ll b/test/Transforms/InstCombine/sink-zext.ll
new file mode 100644
index 000000000000..7764ca76cc9a
--- /dev/null
+++ b/test/Transforms/InstCombine/sink-zext.ll
@@ -0,0 +1,71 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt < %s -instcombine -S | FileCheck %s
+
+target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
+target triple = "x86_64-unknown-linux-gnu"
+
+declare i32 @callee()
+
+define i64 @test1(i32 %V) {
+; CHECK-LABEL: @test1(
+; CHECK-NEXT:    [[CALL1:%.*]] = call i32 @callee(), !range !0
+; CHECK-NEXT:    [[CALL2:%.*]] = call i32 @callee(), !range !0
+; CHECK-NEXT:    [[ADDCONV:%.*]] = add nuw nsw i32 [[CALL1]], [[CALL2]]
+; CHECK-NEXT:    [[ADD:%.*]] = zext i32 [[ADD:%.*]]conv to i64
+; CHECK-NEXT:    ret i64 [[ADD]]
+;
+  %call1 = call i32 @callee(), !range !0
+  %call2 = call i32 @callee(), !range !0
+  %zext1 = sext i32 %call1 to i64
+  %zext2 = sext i32 %call2 to i64
+  %add = add i64 %zext1, %zext2
+  ret i64 %add
+}
+
+define i64 @test2(i32 %V) {
+; CHECK-LABEL: @test2(
+; CHECK-NEXT:    [[CALL1:%.*]] = call i32 @callee(), !range !0
+; CHECK-NEXT:    [[CALL2:%.*]] = call i32 @callee(), !range !0
+; CHECK-NEXT:    [[ADD:%.*]] = add nuw nsw i32 [[CALL1]], [[CALL2]]
+; CHECK-NEXT:    [[ZEXT1:%.*]] = zext i32 [[ADD]] to i64
+; CHECK-NEXT:    ret i64 [[ZEXT1]]
+;
+  %call1 = call i32 @callee(), !range !0
+  %call2 = call i32 @callee(), !range !0
+  %add = add i32 %call1, %call2
+  %zext = sext i32 %add to i64
+  ret i64 %zext
+}
+
+define i64 @test3(i32 %V) {
+; CHECK-LABEL: @test3(
+; CHECK-NEXT:    [[CALL1:%.*]] = call i32 @callee(), !range !0
+; CHECK-NEXT:    [[CALL2:%.*]] = call i32 @callee(), !range !0
+; CHECK-NEXT:    [[MULCONV:%.*]] = mul nuw nsw i32 [[CALL1]], [[CALL2]]
+; CHECK-NEXT:    [[ADD:%.*]] = zext i32 [[MULCONV]] to i64
+; CHECK-NEXT:    ret i64 [[ADD]]
+;
+  %call1 = call i32 @callee(), !range !0
+  %call2 = call i32 @callee(), !range !0
+  %zext1 = sext i32 %call1 to i64
+  %zext2 = sext i32 %call2 to i64
+  %add = mul i64 %zext1, %zext2
+  ret i64 %add
+}
+
+define i64 @test4(i32 %V) {
+; CHECK-LABEL: @test4(
+; CHECK-NEXT:    [[CALL1:%.*]] = call i32 @callee(), !range !0
+; CHECK-NEXT:    [[CALL2:%.*]] = call i32 @callee(), !range !0
+; CHECK-NEXT:    [[ADD:%.*]] = mul nuw nsw i32 [[CALL1]], [[CALL2]]
+; CHECK-NEXT:    [[ZEXT1:%.*]] = zext i32 [[ADD]] to i64
+; CHECK-NEXT:    ret i64 [[ZEXT1]]
+;
+  %call1 = call i32 @callee(), !range !0
+  %call2 = call i32 @callee(), !range !0
+  %add = mul i32 %call1, %call2
+  %zext = sext i32 %add to i64
+  ret i64 %zext
+}
+
+!0 = !{ i32 0, i32 2000 }
diff --git a/test/Transforms/LoopIdiom/basic.ll b/test/Transforms/LoopIdiom/basic.ll
index 4d584de9c6f7..270de2edf7ae 100644
--- a/test/Transforms/LoopIdiom/basic.ll
+++ b/test/Transforms/LoopIdiom/basic.ll
@@ -97,8 +97,7 @@ for.end:                                          ; preds = %entry
 ; CHECK: ret void
 }
 
-
-;; TODO: We should be able to promote this memset.  Not yet though.
+; Make sure the first store in the loop is turned into a memset.
 define void @test4(i8* %Base) nounwind ssp {
 bb.nph:                                           ; preds = %entry
   %Base100 = getelementptr i8, i8* %Base, i64 1000
@@ -118,9 +117,8 @@ for.body:                                         ; preds = %bb.nph, %for.body
 
 for.end:                                          ; preds = %for.body, %entry
   ret void
-; CHECK-TODO-LABEL: @test4(
-; CHECK-TODO: call void @llvm.memset.p0i8.i64(i8* %Base, i8 0, i64 100, i32 1, i1 false)
-; CHECK-TODO-NOT: store
+; CHECK-LABEL: @test4(
+; CHECK: call void @llvm.memset.p0i8.i64(i8* %Base, i8 0, i64 100, i32 1, i1 false)
 }
 
 ; This can't be promoted: the memset is a store of a loop variant value.
diff --git a/test/Transforms/LoopUnroll/peel-loop-pgo.ll b/test/Transforms/LoopUnroll/peel-loop-pgo.ll
index 2987b03c04d0..18309b0691fa 100644
--- a/test/Transforms/LoopUnroll/peel-loop-pgo.ll
+++ b/test/Transforms/LoopUnroll/peel-loop-pgo.ll
@@ -43,5 +43,5 @@ for.end:                                          ; preds = %for.cond.for.end_cr
 ;CHECK: !1 = !{!"branch_weights", i32 900, i32 101}
 ;CHECK: !2 = !{!"branch_weights", i32 540, i32 360}
 ;CHECK: !3 = !{!"branch_weights", i32 162, i32 378}
-;CHECK: !4 = !{!"branch_weights", i32 560, i32 162}
+;CHECK: !4 = !{!"branch_weights", i32 1399, i32 162}
 
diff --git a/test/Transforms/NewGVN/equivalent-phi.ll b/test/Transforms/NewGVN/equivalent-phi.ll
new file mode 100644
index 000000000000..2deeb760f27e
--- /dev/null
+++ b/test/Transforms/NewGVN/equivalent-phi.ll
@@ -0,0 +1,68 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt < %s -basicaa -newgvn -S | FileCheck %s
+target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
+
+@global = common global [1024 x i32] zeroinitializer, align 16
+
+;; We should be able to prove the equivalence of two of the phis, and then use that to eliminate
+;; one set of indexing calculations and a load
+
+; Function Attrs: nounwind ssp uwtable
+define i32 @bar(i32 %arg, i32 %arg1, i32 %arg2) #0 {
+; CHECK-LABEL: @bar(
+; CHECK-NEXT:  bb:
+; CHECK-NEXT:    br label %bb3
+; CHECK:       bb3:
+; CHECK-NEXT:    [[TMP:%.*]] = phi i32 [ %arg, %bb ], [ [[TMP:%.*]]15, %bb17 ]
+; CHECK-NEXT:    [[TMP4:%.*]] = phi i32 [ %arg2, %bb ], [ [[TMP18:%.*]], %bb17 ]
+; CHECK-NEXT:    [[TMP6:%.*]] = phi i32 [ 0, %bb ], [ [[TMP14:%.*]], %bb17 ]
+; CHECK-NEXT:    [[TMP7:%.*]] = sext i32 [[TMP]] to i64
+; CHECK-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [1024 x i32], [1024 x i32]* @global, i64 0, i64 [[TMP7]]
+; CHECK-NEXT:    [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
+; CHECK-NEXT:    [[TMP10:%.*]] = add nsw i32 [[TMP6]], [[TMP9]]
+; CHECK-NEXT:    [[TMP14]] = add nsw i32 [[TMP10]], [[TMP9]]
+; CHECK-NEXT:    [[TMP15:%.*]] = add nsw i32 [[TMP]], %arg1
+; CHECK-NEXT:    br label %bb17
+; CHECK:       bb17:
+; CHECK-NEXT:    [[TMP18]] = add i32 [[TMP4]], -1
+; CHECK-NEXT:    [[TMP19:%.*]] = icmp ne i32 [[TMP4]], 0
+; CHECK-NEXT:    br i1 [[TMP19]], label %bb3, label %bb20
+; CHECK:       bb20:
+; CHECK-NEXT:    ret i32 [[TMP14]]
+;
+bb:
+  br label %bb3
+
+bb3:                                              ; preds = %bb17, %bb
+  %tmp = phi i32 [ %arg, %bb ], [ %tmp15, %bb17 ]
+  %tmp4 = phi i32 [ %arg2, %bb ], [ %tmp18, %bb17 ]
+  %tmp5 = phi i32 [ %arg, %bb ], [ %tmp16, %bb17 ]
+  %tmp6 = phi i32 [ 0, %bb ], [ %tmp14, %bb17 ]
+  %tmp7 = sext i32 %tmp to i64
+  %tmp8 = getelementptr inbounds [1024 x i32], [1024 x i32]* @global, i64 0, i64 %tmp7
+  %tmp9 = load i32, i32* %tmp8, align 4
+  %tmp10 = add nsw i32 %tmp6, %tmp9
+  %tmp11 = sext i32 %tmp5 to i64
+  %tmp12 = getelementptr inbounds [1024 x i32], [1024 x i32]* @global, i64 0, i64 %tmp11
+  %tmp13 = load i32, i32* %tmp12, align 4
+  %tmp14 = add nsw i32 %tmp10, %tmp13
+  %tmp15 = add nsw i32 %tmp, %arg1
+  %tmp16 = add nsw i32 %tmp5, %arg1
+  br label %bb17
+
+bb17:                                             ; preds = %bb3
+  %tmp18 = add i32 %tmp4, -1
+  %tmp19 = icmp ne i32 %tmp4, 0
+  br i1 %tmp19, label %bb3, label %bb20
+
+bb20:                                             ; preds = %bb17
+  ret i32 %tmp14
+}
+
+attributes #0 = { nounwind ssp uwtable "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="penryn" "target-features"="+cx16,+fxsr,+mmx,+sse,+sse2,+sse3,+sse4.1,+ssse3" "unsafe-fp-math"="false" "use-soft-float"="false" }
+
+!llvm.module.flags = !{!0}
+!llvm.ident = !{!1}
+
+!0 = !{i32 1, !"PIC Level", i32 2}
+!1 = !{!"Apple LLVM version 8.0.0 (clang-800.0.42.1)"}
diff --git a/test/Transforms/NewGVN/pr31483.ll b/test/Transforms/NewGVN/pr31483.ll
new file mode 100644
index 000000000000..94b485a990b6
--- /dev/null
+++ b/test/Transforms/NewGVN/pr31483.ll
@@ -0,0 +1,106 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt < %s -basicaa -newgvn -S | FileCheck %s
+target datalayout = "E-m:e-i64:64-n32:64"
+
+@global = external hidden unnamed_addr constant [11 x i8], align 1
+;; Ensure we do not believe the indexing increments are unreachable due to incorrect memory
+;; equivalence detection.  In PR31483, we were deleting those blocks as unreachable
+; Function Attrs: nounwind
+define signext i32 @ham(i8* %arg, i8* %arg1) #0 {
+; CHECK-LABEL: @ham(
+; CHECK-NEXT:  bb:
+; CHECK-NEXT:    [[TMP:%.*]] = alloca i8*, align 8
+; CHECK-NEXT:    store i8* %arg1, i8** [[TMP]], align 8
+; CHECK-NEXT:    br label %bb2
+; CHECK:       bb2:
+; CHECK-NEXT:    [[TMP3:%.*]] = phi i8* [ %arg, %bb ], [ %tmp7, %bb22 ]
+; CHECK-NEXT:    [[TMP4:%.*]] = load i8, i8* [[TMP3]], align 1
+; CHECK-NEXT:    [[TMP5:%.*]] = icmp ne i8 [[TMP4]], 0
+; CHECK-NEXT:    br i1 [[TMP5]], label %bb6, label %bb23
+; CHECK:       bb6:
+; CHECK-NEXT:    [[TMP7:%.*]] = getelementptr inbounds i8, i8* [[TMP3]], i32 1
+; CHECK-NEXT:    [[TMP9:%.*]] = zext i8 [[TMP4]] to i32
+; CHECK-NEXT:    switch i32 [[TMP9]], label %bb22 [
+; CHECK-NEXT:    i32 115, label %bb10
+; CHECK-NEXT:    i32 105, label %bb16
+; CHECK-NEXT:    i32 99, label %bb16
+; CHECK-NEXT:    ]
+; CHECK:       bb10:
+; CHECK-NEXT:    [[TMP11:%.*]] = load i8*, i8** [[TMP]], align 8
+; CHECK-NEXT:    [[TMP12:%.*]] = getelementptr inbounds i8, i8* [[TMP11]], i64 8
+; CHECK-NEXT:    store i8* [[TMP12]], i8** [[TMP]], align 8
+; CHECK-NEXT:    [[TMP13:%.*]] = bitcast i8* [[TMP11]] to i8**
+; CHECK-NEXT:    [[TMP14:%.*]] = load i8*, i8** [[TMP13]], align 8
+; CHECK-NEXT:    [[TMP15:%.*]] = call signext i32 (i8*, ...) @zot(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @global, i32 0, i32 0), i8* [[TMP14]])
+; CHECK-NEXT:    br label %bb22
+; CHECK:       bb16:
+; CHECK-NEXT:    [[TMP17:%.*]] = load i8*, i8** [[TMP]], align 8
+; CHECK-NEXT:    [[TMP18:%.*]] = getelementptr inbounds i8, i8* [[TMP17]], i64 8
+; CHECK-NEXT:    store i8* [[TMP18]], i8** [[TMP]], align 8
+; CHECK-NEXT:    [[TMP19:%.*]] = getelementptr inbounds i8, i8* [[TMP17]], i64 4
+; CHECK-NEXT:    [[TMP20:%.*]] = bitcast i8* [[TMP19]] to i32*
+; CHECK-NEXT:    br label %bb22
+; CHECK:       bb22:
+; CHECK-NEXT:    br label %bb2
+; CHECK:       bb23:
+; CHECK-NEXT:    [[TMP24:%.*]] = bitcast i8** [[TMP]] to i8*
+; CHECK-NEXT:    call void @llvm.va_end(i8* [[TMP24]])
+; CHECK-NEXT:    ret i32 undef
+;
+bb:
+  %tmp = alloca i8*, align 8
+  store i8* %arg1, i8** %tmp, align 8
+  br label %bb2
+
+bb2:                                              ; preds = %bb22, %bb
+  %tmp3 = phi i8* [ %arg, %bb ], [ %tmp7, %bb22 ]
+  %tmp4 = load i8, i8* %tmp3, align 1
+  %tmp5 = icmp ne i8 %tmp4, 0
+  br i1 %tmp5, label %bb6, label %bb23
+
+bb6:                                              ; preds = %bb2
+  %tmp7 = getelementptr inbounds i8, i8* %tmp3, i32 1
+  %tmp8 = load i8, i8* %tmp3, align 1
+  %tmp9 = zext i8 %tmp8 to i32
+  switch i32 %tmp9, label %bb22 [
+  i32 115, label %bb10
+  i32 105, label %bb16
+  i32 99, label %bb16
+  ]
+
+bb10:                                             ; preds = %bb6
+  %tmp11 = load i8*, i8** %tmp, align 8
+  %tmp12 = getelementptr inbounds i8, i8* %tmp11, i64 8
+  store i8* %tmp12, i8** %tmp, align 8
+  %tmp13 = bitcast i8* %tmp11 to i8**
+  %tmp14 = load i8*, i8** %tmp13, align 8
+  %tmp15 = call signext i32 (i8*, ...) @zot(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @global, i32 0, i32 0), i8* %tmp14)
+  br label %bb22
+
+bb16:                                             ; preds = %bb6, %bb6
+  %tmp17 = load i8*, i8** %tmp, align 8
+  %tmp18 = getelementptr inbounds i8, i8* %tmp17, i64 8
+  store i8* %tmp18, i8** %tmp, align 8
+  %tmp19 = getelementptr inbounds i8, i8* %tmp17, i64 4
+  %tmp20 = bitcast i8* %tmp19 to i32*
+  %tmp21 = load i32, i32* %tmp20, align 4
+  br label %bb22
+
+bb22:                                             ; preds = %bb16, %bb10, %bb6
+  br label %bb2
+
+bb23:                                             ; preds = %bb2
+  %tmp24 = bitcast i8** %tmp to i8*
+  call void @llvm.va_end(i8* %tmp24)
+  ret i32 undef
+}
+
+declare signext i32 @zot(i8*, ...) #1
+
+; Function Attrs: nounwind
+declare void @llvm.va_end(i8*) #2
+
+attributes #0 = { nounwind "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="ppc64" "target-features"="+altivec,-bpermd,-crypto,-direct-move,-extdiv,-power8-vector,-qpx,-vsx" "unsafe-fp-math"="false" "use-soft-float"="false" }
+attributes #1 = { "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="ppc64" "target-features"="+altivec,-bpermd,-crypto,-direct-move,-extdiv,-power8-vector,-qpx,-vsx" "unsafe-fp-math"="false" "use-soft-float"="false" }
+attributes #2 = { nounwind }
+
diff --git a/test/Transforms/PartiallyInlineLibCalls/X86/good-prototype.ll b/test/Transforms/PartiallyInlineLibCalls/X86/good-prototype.ll
new file mode 100644
index 000000000000..0011134640c3
--- /dev/null
+++ b/test/Transforms/PartiallyInlineLibCalls/X86/good-prototype.ll
@@ -0,0 +1,21 @@
+; RUN: opt -S -partially-inline-libcalls -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s
+; RUN: opt -S -passes=partially-inline-libcalls -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s
+
+define float @f(float %val) {
+; CHECK: @f
+; CHECK: entry:
+; CHECK-NEXT: %[[RES:.+]] = tail call float @sqrtf(float %val) #0
+; CHECK-NEXT: %[[CMP:.+]] = fcmp oeq float %[[RES]], %[[RES]]
+; CHECK-NEXT: br i1 %[[CMP]], label %[[EXIT:.+]], label %[[CALL:.+]]
+; CHECK: [[CALL]]:
+; CHECK-NEXT: %[[RES2:.+]] = tail call float @sqrtf(float %val){{$}}
+; CHECK-NEXT: br label %[[EXIT]]
+; CHECK: [[EXIT]]:
+; CHECK-NEXT: %[[RET:.+]] = phi float [ %[[RES]], %entry ], [ %[[RES2]], %[[CALL]] ]
+; CHECK-NEXT: ret float %[[RET]]
+entry:
+  %res = tail call float @sqrtf(float %val)
+  ret float %res
+}
+
+declare float @sqrtf(float)
diff --git a/test/Transforms/PartiallyInlineLibCalls/X86/lit.local.cfg b/test/Transforms/PartiallyInlineLibCalls/X86/lit.local.cfg
new file mode 100644
index 000000000000..afde89be896d
--- /dev/null
+++ b/test/Transforms/PartiallyInlineLibCalls/X86/lit.local.cfg
@@ -0,0 +1,2 @@
+if not 'X86' in config.root.targets:
+  config.unsupported = True
diff --git a/test/Transforms/SLPVectorizer/X86/horizontal-list.ll b/test/Transforms/SLPVectorizer/X86/horizontal-list.ll
index faae28f4fc64..07064304bf01 100644
--- a/test/Transforms/SLPVectorizer/X86/horizontal-list.ll
+++ b/test/Transforms/SLPVectorizer/X86/horizontal-list.ll
@@ -8,7 +8,8 @@
 
 define float @baz() {
 ; CHECK-LABEL: @baz(
-; CHECK:         [[TMP0:%.*]] = load i32, i32* @n, align 4
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[TMP0:%.*]] = load i32, i32* @n, align 4
 ; CHECK-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP0]], 3
 ; CHECK-NEXT:    [[CONV:%.*]] = sitofp i32 [[MUL]] to float
 ; CHECK-NEXT:    [[TMP1:%.*]] = load <2 x float>, <2 x float>* bitcast ([20 x float]* @arr to <2 x float>*), align 16
@@ -64,7 +65,8 @@ entry:
 
 define float @bazz() {
 ; CHECK-LABEL: @bazz(
-; CHECK:         [[TMP0:%.*]] = load i32, i32* @n, align 4
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[TMP0:%.*]] = load i32, i32* @n, align 4
 ; CHECK-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP0]], 3
 ; CHECK-NEXT:    [[CONV:%.*]] = sitofp i32 [[MUL]] to float
 ; CHECK-NEXT:    [[TMP1:%.*]] = load <2 x float>, <2 x float>* bitcast ([20 x float]* @arr to <2 x float>*), align 16
@@ -146,7 +148,8 @@ entry:
 
 define float @bazzz() {
 ; CHECK-LABEL: @bazzz(
-; CHECK:         [[TMP0:%.*]] = load i32, i32* @n, align 4
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[TMP0:%.*]] = load i32, i32* @n, align 4
 ; CHECK-NEXT:    [[CONV:%.*]] = sitofp i32 [[TMP0]] to float
 ; CHECK-NEXT:    [[TMP1:%.*]] = load <4 x float>, <4 x float>* bitcast ([20 x float]* @arr to <4 x float>*), align 16
 ; CHECK-NEXT:    [[TMP2:%.*]] = load <4 x float>, <4 x float>* bitcast ([20 x float]* @arr1 to <4 x float>*), align 16
@@ -188,7 +191,8 @@ entry:
 
 define i32 @foo() {
 ; CHECK-LABEL: @foo(
-; CHECK:         [[TMP0:%.*]] = load i32, i32* @n, align 4
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[TMP0:%.*]] = load i32, i32* @n, align 4
 ; CHECK-NEXT:    [[CONV:%.*]] = sitofp i32 [[TMP0]] to float
 ; CHECK-NEXT:    [[TMP1:%.*]] = load <4 x float>, <4 x float>* bitcast ([20 x float]* @arr to <4 x float>*), align 16
 ; CHECK-NEXT:    [[TMP2:%.*]] = load <4 x float>, <4 x float>* bitcast ([20 x float]* @arr1 to <4 x float>*), align 16
@@ -232,7 +236,8 @@ entry:
 
 define float @bar() {
 ; CHECK-LABEL: @bar(
-; CHECK:         [[TMP0:%.*]] = load <2 x float>, <2 x float>* bitcast ([20 x float]* @arr to <2 x float>*), align 16
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[TMP0:%.*]] = load <2 x float>, <2 x float>* bitcast ([20 x float]* @arr to <2 x float>*), align 16
 ; CHECK-NEXT:    [[TMP1:%.*]] = load <2 x float>, <2 x float>* bitcast ([20 x float]* @arr1 to <2 x float>*), align 16
 ; CHECK-NEXT:    [[TMP2:%.*]] = fmul fast <2 x float> [[TMP1]], [[TMP0]]
 ; CHECK-NEXT:    [[TMP3:%.*]] = extractelement <2 x float> [[TMP2]], i32 0