diff options
| -rw-r--r-- | sys/pci/if_fxp.c | 1949 | ||||
| -rw-r--r-- | sys/pci/if_fxpreg.h | 425 | ||||
| -rw-r--r-- | sys/pci/if_fxpvar.h | 90 |
3 files changed, 0 insertions, 2464 deletions
diff --git a/sys/pci/if_fxp.c b/sys/pci/if_fxp.c deleted file mode 100644 index 068bd8c1f3a6..000000000000 --- a/sys/pci/if_fxp.c +++ /dev/null @@ -1,1949 +0,0 @@ -/* - * Copyright (c) 1995, David Greenman - * All rights reserved. - * - * Modifications to support media selection: - * Copyright (c) 1997 Jason R. Thorpe. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice unmodified, this list of conditions, and the following - * disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD$ - */ - -/* - * Intel EtherExpress Pro/100B PCI Fast Ethernet driver - */ - -#include <sys/param.h> -#include <sys/systm.h> -#include <sys/mbuf.h> -#include <sys/malloc.h> -#include <sys/mutex.h> -#include <sys/kernel.h> -#include <sys/socket.h> - -#include <net/if.h> -#include <net/if_dl.h> -#include <net/if_media.h> - -#ifdef NS -#include <netns/ns.h> -#include <netns/ns_if.h> -#endif - -#include <net/bpf.h> -#include <sys/sockio.h> -#include <sys/bus.h> -#include <machine/bus.h> -#include <sys/rman.h> -#include <machine/resource.h> - -#include <net/ethernet.h> -#include <net/if_arp.h> - -#include <vm/vm.h> /* for vtophys */ -#include <vm/pmap.h> /* for vtophys */ - -#include <pci/pcivar.h> -#include <pci/pcireg.h> /* for PCIM_CMD_xxx */ -#include <pci/if_fxpreg.h> -#include <pci/if_fxpvar.h> - -#ifdef __alpha__ /* XXX */ -/* XXX XXX NEED REAL DMA MAPPING SUPPORT XXX XXX */ -#undef vtophys -#define vtophys(va) alpha_XXX_dmamap((vm_offset_t)(va)) -#endif /* __alpha__ */ - -/* - * NOTE! On the Alpha, we have an alignment constraint. The - * card DMAs the packet immediately following the RFA. However, - * the first thing in the packet is a 14-byte Ethernet header. - * This means that the packet is misaligned. To compensate, - * we actually offset the RFA 2 bytes into the cluster. This - * alignes the packet after the Ethernet header at a 32-bit - * boundary. HOWEVER! This means that the RFA is misaligned! - */ -#define RFA_ALIGNMENT_FUDGE 2 - -/* - * Inline function to copy a 16-bit aligned 32-bit quantity. - */ -static __inline void fxp_lwcopy __P((volatile u_int32_t *, - volatile u_int32_t *)); -static __inline void -fxp_lwcopy(src, dst) - volatile u_int32_t *src, *dst; -{ -#ifdef __i386__ - *dst = *src; -#else - volatile u_int16_t *a = (volatile u_int16_t *)src; - volatile u_int16_t *b = (volatile u_int16_t *)dst; - - b[0] = a[0]; - b[1] = a[1]; -#endif -} - -/* - * Template for default configuration parameters. - * See struct fxp_cb_config for the bit definitions. - */ -static u_char fxp_cb_config_template[] = { - 0x0, 0x0, /* cb_status */ - 0x80, 0x2, /* cb_command */ - 0xff, 0xff, 0xff, 0xff, /* link_addr */ - 0x16, /* 0 */ - 0x8, /* 1 */ - 0x0, /* 2 */ - 0x0, /* 3 */ - 0x0, /* 4 */ - 0x80, /* 5 */ - 0xb2, /* 6 */ - 0x3, /* 7 */ - 0x1, /* 8 */ - 0x0, /* 9 */ - 0x26, /* 10 */ - 0x0, /* 11 */ - 0x60, /* 12 */ - 0x0, /* 13 */ - 0xf2, /* 14 */ - 0x48, /* 15 */ - 0x0, /* 16 */ - 0x40, /* 17 */ - 0xf3, /* 18 */ - 0x0, /* 19 */ - 0x3f, /* 20 */ - 0x5 /* 21 */ -}; - -/* Supported media types. */ -struct fxp_supported_media { - const int fsm_phy; /* PHY type */ - const int *fsm_media; /* the media array */ - const int fsm_nmedia; /* the number of supported media */ - const int fsm_defmedia; /* default media for this PHY */ -}; - -static const int fxp_media_standard[] = { - IFM_ETHER|IFM_10_T, - IFM_ETHER|IFM_10_T|IFM_FDX, - IFM_ETHER|IFM_100_TX, - IFM_ETHER|IFM_100_TX|IFM_FDX, - IFM_ETHER|IFM_AUTO, -}; -#define FXP_MEDIA_STANDARD_DEFMEDIA (IFM_ETHER|IFM_AUTO) - -static const int fxp_media_default[] = { - IFM_ETHER|IFM_MANUAL, /* XXX IFM_AUTO ? */ -}; -#define FXP_MEDIA_DEFAULT_DEFMEDIA (IFM_ETHER|IFM_MANUAL) - -static const struct fxp_supported_media fxp_media[] = { - { FXP_PHY_DP83840, fxp_media_standard, - sizeof(fxp_media_standard) / sizeof(fxp_media_standard[0]), - FXP_MEDIA_STANDARD_DEFMEDIA }, - { FXP_PHY_DP83840A, fxp_media_standard, - sizeof(fxp_media_standard) / sizeof(fxp_media_standard[0]), - FXP_MEDIA_STANDARD_DEFMEDIA }, - { FXP_PHY_82553A, fxp_media_standard, - sizeof(fxp_media_standard) / sizeof(fxp_media_standard[0]), - FXP_MEDIA_STANDARD_DEFMEDIA }, - { FXP_PHY_82553C, fxp_media_standard, - sizeof(fxp_media_standard) / sizeof(fxp_media_standard[0]), - FXP_MEDIA_STANDARD_DEFMEDIA }, - { FXP_PHY_82555, fxp_media_standard, - sizeof(fxp_media_standard) / sizeof(fxp_media_standard[0]), - FXP_MEDIA_STANDARD_DEFMEDIA }, - { FXP_PHY_82555B, fxp_media_standard, - sizeof(fxp_media_standard) / sizeof(fxp_media_standard[0]), - FXP_MEDIA_STANDARD_DEFMEDIA }, - { FXP_PHY_80C24, fxp_media_default, - sizeof(fxp_media_default) / sizeof(fxp_media_default[0]), - FXP_MEDIA_DEFAULT_DEFMEDIA }, -}; -#define NFXPMEDIA (sizeof(fxp_media) / sizeof(fxp_media[0])) - -static int fxp_mediachange __P((struct ifnet *)); -static void fxp_mediastatus __P((struct ifnet *, struct ifmediareq *)); -static void fxp_set_media __P((struct fxp_softc *, int)); -static __inline void fxp_scb_wait __P((struct fxp_softc *)); -static __inline void fxp_dma_wait __P((volatile u_int16_t *, struct fxp_softc *sc)); -static void fxp_intr __P((void *)); -static void fxp_start __P((struct ifnet *)); -static int fxp_ioctl __P((struct ifnet *, - u_long, caddr_t)); -static void fxp_init __P((void *)); -static void fxp_stop __P((struct fxp_softc *)); -static void fxp_watchdog __P((struct ifnet *)); -static int fxp_add_rfabuf __P((struct fxp_softc *, struct mbuf *)); -static int fxp_mdi_read __P((struct fxp_softc *, int, int)); -static void fxp_mdi_write __P((struct fxp_softc *, int, int, int)); -static void fxp_autosize_eeprom __P((struct fxp_softc *)); -static void fxp_read_eeprom __P((struct fxp_softc *, u_int16_t *, - int, int)); -static int fxp_attach_common __P((struct fxp_softc *, u_int8_t *)); -static void fxp_stats_update __P((void *)); -static void fxp_mc_setup __P((struct fxp_softc *)); - -/* - * Set initial transmit threshold at 64 (512 bytes). This is - * increased by 64 (512 bytes) at a time, to maximum of 192 - * (1536 bytes), if an underrun occurs. - */ -static int tx_threshold = 64; - -/* - * Number of transmit control blocks. This determines the number - * of transmit buffers that can be chained in the CB list. - * This must be a power of two. - */ -#define FXP_NTXCB 128 - -/* - * Number of completed TX commands at which point an interrupt - * will be generated to garbage collect the attached buffers. - * Must be at least one less than FXP_NTXCB, and should be - * enough less so that the transmitter doesn't becomes idle - * during the buffer rundown (which would reduce performance). - */ -#define FXP_CXINT_THRESH 120 - -/* - * TxCB list index mask. This is used to do list wrap-around. - */ -#define FXP_TXCB_MASK (FXP_NTXCB - 1) - -/* - * Number of receive frame area buffers. These are large so chose - * wisely. - */ -#define FXP_NRFABUFS 64 - -/* - * Maximum number of seconds that the receiver can be idle before we - * assume it's dead and attempt to reset it by reprogramming the - * multicast filter. This is part of a work-around for a bug in the - * NIC. See fxp_stats_update(). - */ -#define FXP_MAX_RX_IDLE 15 - -/* - * Wait for the previous command to be accepted (but not necessarily - * completed). - */ -static __inline void -fxp_scb_wait(sc) - struct fxp_softc *sc; -{ - int i = 10000; - - while (CSR_READ_1(sc, FXP_CSR_SCB_COMMAND) && --i) - DELAY(2); - if (i == 0) - printf("fxp%d: SCB timeout\n", FXP_UNIT(sc)); -} - -static __inline void -fxp_dma_wait(status, sc) - volatile u_int16_t *status; - struct fxp_softc *sc; -{ - int i = 10000; - - while (!(*status & FXP_CB_STATUS_C) && --i) - DELAY(2); - if (i == 0) - printf("fxp%d: DMA timeout\n", FXP_UNIT(sc)); -} - -/* - * Return identification string if this is device is ours. - */ -static int -fxp_probe(device_t dev) -{ - if (pci_get_vendor(dev) == FXP_VENDORID_INTEL) { - switch (pci_get_device(dev)) { - - case FXP_DEVICEID_i82557: - device_set_desc(dev, "Intel Pro 10/100B/100+ Ethernet"); - return 0; - case FXP_DEVICEID_i82559: - device_set_desc(dev, "Intel InBusiness 10/100 Ethernet"); - return 0; - case FXP_DEVICEID_i82559ER: - device_set_desc(dev, "Intel Embedded 10/100 Ethernet"); - return 0; - case FXP_DEVICEID_i82562: - device_set_desc(dev, "Intel PLC 10/100 Ethernet"); - return 0; - default: - break; - } - } - - return ENXIO; -} - -static int -fxp_attach(device_t dev) -{ - int error = 0; - struct fxp_softc *sc = device_get_softc(dev); - struct ifnet *ifp; - u_int32_t val; - int rid, m1, m2, prefer_iomap; - - mtx_init(&sc->sc_mtx, device_get_nameunit(dev), MTX_DEF | MTX_RECURSE); - callout_handle_init(&sc->stat_ch); - - FXP_LOCK(sc); - - /* - * Enable bus mastering. Enable memory space too, in case - * BIOS/Prom forgot about it. - */ - val = pci_read_config(dev, PCIR_COMMAND, 2); - val |= (PCIM_CMD_MEMEN|PCIM_CMD_BUSMASTEREN); - pci_write_config(dev, PCIR_COMMAND, val, 2); - val = pci_read_config(dev, PCIR_COMMAND, 2); - - if (pci_get_powerstate(dev) != PCI_POWERSTATE_D0) { - u_int32_t iobase, membase, irq; - - /* Save important PCI config data. */ - iobase = pci_read_config(dev, FXP_PCI_IOBA, 4); - membase = pci_read_config(dev, FXP_PCI_MMBA, 4); - irq = pci_read_config(dev, PCIR_INTLINE, 4); - - /* Reset the power state. */ - device_printf(dev, "chip is in D%d power mode " - "-- setting to D0\n", pci_get_powerstate(dev)); - - pci_set_powerstate(dev, PCI_POWERSTATE_D0); - - /* Restore PCI config data. */ - pci_write_config(dev, FXP_PCI_IOBA, iobase, 4); - pci_write_config(dev, FXP_PCI_MMBA, membase, 4); - pci_write_config(dev, PCIR_INTLINE, irq, 4); - } - - /* - * Figure out which we should try first - memory mapping or i/o mapping? - * We default to memory mapping. Then we accept an override from the - * command line. Then we check to see which one is enabled. - */ - m1 = PCIM_CMD_MEMEN; - m2 = PCIM_CMD_PORTEN; - prefer_iomap = 0; - if (resource_int_value(device_get_name(dev), device_get_unit(dev), - "prefer_iomap", &prefer_iomap) == 0 && prefer_iomap != 0) { - m1 = PCIM_CMD_PORTEN; - m2 = PCIM_CMD_MEMEN; - } - - if (val & m1) { - sc->rtp = - (m1 == PCIM_CMD_MEMEN)? SYS_RES_MEMORY : SYS_RES_IOPORT; - sc->rgd = (m1 == PCIM_CMD_MEMEN)? FXP_PCI_MMBA : FXP_PCI_IOBA; - sc->mem = bus_alloc_resource(dev, sc->rtp, &sc->rgd, - 0, ~0, 1, RF_ACTIVE); - } - if (sc->mem == NULL && (val & m2)) { - sc->rtp = - (m2 == PCIM_CMD_MEMEN)? SYS_RES_MEMORY : SYS_RES_IOPORT; - sc->rgd = (m2 == PCIM_CMD_MEMEN)? FXP_PCI_MMBA : FXP_PCI_IOBA; - sc->mem = bus_alloc_resource(dev, sc->rtp, &sc->rgd, - 0, ~0, 1, RF_ACTIVE); - } - - if (!sc->mem) { - device_printf(dev, "could not map device registers\n"); - error = ENXIO; - goto fail; - } - if (bootverbose) { - device_printf(dev, "using %s space register mapping\n", - sc->rtp == SYS_RES_MEMORY? "memory" : "I/O"); - } - - sc->sc_st = rman_get_bustag(sc->mem); - sc->sc_sh = rman_get_bushandle(sc->mem); - - /* - * Allocate our interrupt. - */ - rid = 0; - sc->irq = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 0, ~0, 1, - RF_SHAREABLE | RF_ACTIVE); - if (sc->irq == NULL) { - device_printf(dev, "could not map interrupt\n"); - error = ENXIO; - goto fail; - } - - error = bus_setup_intr(dev, sc->irq, INTR_TYPE_NET, - fxp_intr, sc, &sc->ih); - if (error) { - device_printf(dev, "could not setup irq\n"); - goto fail; - } - - /* Do generic parts of attach. */ - if (fxp_attach_common(sc, sc->arpcom.ac_enaddr)) { - /* Failed! */ - bus_teardown_intr(dev, sc->irq, sc->ih); - bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq); - bus_release_resource(dev, sc->rtp, sc->rgd, sc->mem); - error = ENXIO; - goto fail; - } - - device_printf(dev, "Ethernet address %6D%s\n", - sc->arpcom.ac_enaddr, ":", sc->phy_10Mbps_only ? ", 10Mbps" : ""); - - ifp = &sc->arpcom.ac_if; - ifp->if_unit = device_get_unit(dev); - ifp->if_name = "fxp"; - ifp->if_output = ether_output; - ifp->if_baudrate = 100000000; - ifp->if_init = fxp_init; - ifp->if_softc = sc; - ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; - ifp->if_ioctl = fxp_ioctl; - ifp->if_start = fxp_start; - ifp->if_watchdog = fxp_watchdog; - - /* - * Attach the interface. - */ - ether_ifattach(ifp, ETHER_BPF_SUPPORTED); - /* - * Let the system queue as many packets as we have available - * TX descriptors. - */ - ifp->if_snd.ifq_maxlen = FXP_NTXCB - 1; - - FXP_UNLOCK(sc); - return 0; - - fail: - FXP_UNLOCK(sc); - mtx_destroy(&sc->sc_mtx); - return error; -} - -/* - * Detach interface. - */ -static int -fxp_detach(device_t dev) -{ - struct fxp_softc *sc = device_get_softc(dev); - - FXP_LOCK(sc); - - /* - * Close down routes etc. - */ - ether_ifdetach(&sc->arpcom.ac_if, ETHER_BPF_SUPPORTED); - - /* - * Stop DMA and drop transmit queue. - */ - fxp_stop(sc); - - /* - * Deallocate resources. - */ - bus_teardown_intr(dev, sc->irq, sc->ih); - bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq); - bus_release_resource(dev, sc->rtp, sc->rgd, sc->mem); - - /* - * Free all the receive buffers. - */ - if (sc->rfa_headm != NULL) - m_freem(sc->rfa_headm); - - /* - * Free all media structures. - */ - ifmedia_removeall(&sc->sc_media); - - /* - * Free anciliary structures. - */ - free(sc->cbl_base, M_DEVBUF); - free(sc->fxp_stats, M_DEVBUF); - free(sc->mcsp, M_DEVBUF); - - FXP_UNLOCK(sc); - mtx_destroy(&sc->sc_mtx); - - return 0; -} - -/* - * Device shutdown routine. Called at system shutdown after sync. The - * main purpose of this routine is to shut off receiver DMA so that - * kernel memory doesn't get clobbered during warmboot. - */ -static int -fxp_shutdown(device_t dev) -{ - /* - * Make sure that DMA is disabled prior to reboot. Not doing - * do could allow DMA to corrupt kernel memory during the - * reboot before the driver initializes. - */ - fxp_stop((struct fxp_softc *) device_get_softc(dev)); - return 0; -} - -/* - * Device suspend routine. Stop the interface and save some PCI - * settings in case the BIOS doesn't restore them properly on - * resume. - */ -static int -fxp_suspend(device_t dev) -{ - struct fxp_softc *sc = device_get_softc(dev); - int i; - - FXP_LOCK(sc); - - fxp_stop(sc); - - for (i=0; i<5; i++) - sc->saved_maps[i] = pci_read_config(dev, PCIR_MAPS + i*4, 4); - sc->saved_biosaddr = pci_read_config(dev, PCIR_BIOS, 4); - sc->saved_intline = pci_read_config(dev, PCIR_INTLINE, 1); - sc->saved_cachelnsz = pci_read_config(dev, PCIR_CACHELNSZ, 1); - sc->saved_lattimer = pci_read_config(dev, PCIR_LATTIMER, 1); - - sc->suspended = 1; - - FXP_UNLOCK(sc); - - return 0; -} - -/* - * Device resume routine. Restore some PCI settings in case the BIOS - * doesn't, re-enable busmastering, and restart the interface if - * appropriate. - */ -static int -fxp_resume(device_t dev) -{ - struct fxp_softc *sc = device_get_softc(dev); - struct ifnet *ifp = &sc->sc_if; - u_int16_t pci_command; - int i; - - FXP_LOCK(sc); - - /* better way to do this? */ - for (i=0; i<5; i++) - pci_write_config(dev, PCIR_MAPS + i*4, sc->saved_maps[i], 4); - pci_write_config(dev, PCIR_BIOS, sc->saved_biosaddr, 4); - pci_write_config(dev, PCIR_INTLINE, sc->saved_intline, 1); - pci_write_config(dev, PCIR_CACHELNSZ, sc->saved_cachelnsz, 1); - pci_write_config(dev, PCIR_LATTIMER, sc->saved_lattimer, 1); - - /* reenable busmastering */ - pci_command = pci_read_config(dev, PCIR_COMMAND, 2); - pci_command |= (PCIM_CMD_MEMEN|PCIM_CMD_BUSMASTEREN); - pci_write_config(dev, PCIR_COMMAND, pci_command, 2); - - CSR_WRITE_4(sc, FXP_CSR_PORT, FXP_PORT_SELECTIVE_RESET); - DELAY(10); - - /* reinitialize interface if necessary */ - if (ifp->if_flags & IFF_UP) - fxp_init(sc); - - sc->suspended = 0; - - FXP_UNLOCK(sc); - - return 0; -} - -static device_method_t fxp_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, fxp_probe), - DEVMETHOD(device_attach, fxp_attach), - DEVMETHOD(device_detach, fxp_detach), - DEVMETHOD(device_shutdown, fxp_shutdown), - DEVMETHOD(device_suspend, fxp_suspend), - DEVMETHOD(device_resume, fxp_resume), - - { 0, 0 } -}; - -static driver_t fxp_driver = { - "fxp", - fxp_methods, - sizeof(struct fxp_softc), -}; - -static devclass_t fxp_devclass; - -DRIVER_MODULE(if_fxp, pci, fxp_driver, fxp_devclass, 0, 0); -DRIVER_MODULE(if_fxp, cardbus, fxp_driver, fxp_devclass, 0, 0); - -/* - * Do generic parts of attach. - */ -static int -fxp_attach_common(sc, enaddr) - struct fxp_softc *sc; - u_int8_t *enaddr; -{ - u_int16_t data; - int i, nmedia, defmedia; - const int *media; - - /* - * Reset to a stable state. - */ - CSR_WRITE_4(sc, FXP_CSR_PORT, FXP_PORT_SELECTIVE_RESET); - DELAY(10); - - sc->cbl_base = malloc(sizeof(struct fxp_cb_tx) * FXP_NTXCB, - M_DEVBUF, M_NOWAIT | M_ZERO); - if (sc->cbl_base == NULL) - goto fail; - - sc->fxp_stats = malloc(sizeof(struct fxp_stats), M_DEVBUF, - M_NOWAIT | M_ZERO); - if (sc->fxp_stats == NULL) - goto fail; - - sc->mcsp = malloc(sizeof(struct fxp_cb_mcs), M_DEVBUF, M_NOWAIT); - if (sc->mcsp == NULL) - goto fail; - - /* - * Pre-allocate our receive buffers. - */ - for (i = 0; i < FXP_NRFABUFS; i++) { - if (fxp_add_rfabuf(sc, NULL) != 0) { - goto fail; - } - } - - /* - * Find out how large of an SEEPROM we have. - */ - fxp_autosize_eeprom(sc); - - /* - * Get info about the primary PHY - */ - fxp_read_eeprom(sc, (u_int16_t *)&data, 6, 1); - sc->phy_primary_addr = data & 0xff; - sc->phy_primary_device = (data >> 8) & 0x3f; - sc->phy_10Mbps_only = data >> 15; - - /* - * Read MAC address. - */ - fxp_read_eeprom(sc, (u_int16_t *)enaddr, 0, 3); - - /* - * Initialize the media structures. - */ - - media = fxp_media_default; - nmedia = sizeof(fxp_media_default) / sizeof(fxp_media_default[0]); - defmedia = FXP_MEDIA_DEFAULT_DEFMEDIA; - - for (i = 0; i < NFXPMEDIA; i++) { - if (sc->phy_primary_device == fxp_media[i].fsm_phy) { - media = fxp_media[i].fsm_media; - nmedia = fxp_media[i].fsm_nmedia; - defmedia = fxp_media[i].fsm_defmedia; - } - } - - ifmedia_init(&sc->sc_media, 0, fxp_mediachange, fxp_mediastatus); - for (i = 0; i < nmedia; i++) { - if (IFM_SUBTYPE(media[i]) == IFM_100_TX && sc->phy_10Mbps_only) - continue; - ifmedia_add(&sc->sc_media, media[i], 0, NULL); - } - ifmedia_set(&sc->sc_media, defmedia); - - return (0); - - fail: - printf("fxp%d: Failed to malloc memory\n", FXP_UNIT(sc)); - if (sc->cbl_base) - free(sc->cbl_base, M_DEVBUF); - if (sc->fxp_stats) - free(sc->fxp_stats, M_DEVBUF); - if (sc->mcsp) - free(sc->mcsp, M_DEVBUF); - /* frees entire chain */ - if (sc->rfa_headm) - m_freem(sc->rfa_headm); - - return (ENOMEM); -} - -/* - * From NetBSD: - * - * Figure out EEPROM size. - * - * 559's can have either 64-word or 256-word EEPROMs, the 558 - * datasheet only talks about 64-word EEPROMs, and the 557 datasheet - * talks about the existance of 16 to 256 word EEPROMs. - * - * The only known sizes are 64 and 256, where the 256 version is used - * by CardBus cards to store CIS information. - * - * The address is shifted in msb-to-lsb, and after the last - * address-bit the EEPROM is supposed to output a `dummy zero' bit, - * after which follows the actual data. We try to detect this zero, by - * probing the data-out bit in the EEPROM control register just after - * having shifted in a bit. If the bit is zero, we assume we've - * shifted enough address bits. The data-out should be tri-state, - * before this, which should translate to a logical one. - * - * Other ways to do this would be to try to read a register with known - * contents with a varying number of address bits, but no such - * register seem to be available. The high bits of register 10 are 01 - * on the 558 and 559, but apparently not on the 557. - * - * The Linux driver computes a checksum on the EEPROM data, but the - * value of this checksum is not very well documented. - */ -static void -fxp_autosize_eeprom(sc) - struct fxp_softc *sc; -{ - u_int16_t reg; - int x; - - CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, FXP_EEPROM_EECS); - /* - * Shift in read opcode. - */ - for (x = 3; x > 0; x--) { - if (FXP_EEPROM_OPC_READ & (1 << (x - 1))) { - reg = FXP_EEPROM_EECS | FXP_EEPROM_EEDI; - } else { - reg = FXP_EEPROM_EECS; - } - CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg); - CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, - reg | FXP_EEPROM_EESK); - DELAY(1); - CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg); - DELAY(1); - } - /* - * Shift in address. - * Wait for the dummy zero following a correct address shift. - */ - for (x = 1; x <= 8; x++) { - CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, FXP_EEPROM_EECS); - CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, - FXP_EEPROM_EECS | FXP_EEPROM_EESK); - DELAY(1); - if ((CSR_READ_2(sc, FXP_CSR_EEPROMCONTROL) & FXP_EEPROM_EEDO) == 0) - break; - CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, FXP_EEPROM_EECS); - DELAY(1); - } - CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, 0); - DELAY(1); - sc->eeprom_size = x; -} -/* - * Read from the serial EEPROM. Basically, you manually shift in - * the read opcode (one bit at a time) and then shift in the address, - * and then you shift out the data (all of this one bit at a time). - * The word size is 16 bits, so you have to provide the address for - * every 16 bits of data. - */ -static void -fxp_read_eeprom(sc, data, offset, words) - struct fxp_softc *sc; - u_short *data; - int offset; - int words; -{ - u_int16_t reg; - int i, x; - - for (i = 0; i < words; i++) { - CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, FXP_EEPROM_EECS); - /* - * Shift in read opcode. - */ - for (x = 3; x > 0; x--) { - if (FXP_EEPROM_OPC_READ & (1 << (x - 1))) { - reg = FXP_EEPROM_EECS | FXP_EEPROM_EEDI; - } else { - reg = FXP_EEPROM_EECS; - } - CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg); - CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, - reg | FXP_EEPROM_EESK); - DELAY(1); - CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg); - DELAY(1); - } - /* - * Shift in address. - */ - for (x = sc->eeprom_size; x > 0; x--) { - if ((i + offset) & (1 << (x - 1))) { - reg = FXP_EEPROM_EECS | FXP_EEPROM_EEDI; - } else { - reg = FXP_EEPROM_EECS; - } - CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg); - CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, - reg | FXP_EEPROM_EESK); - DELAY(1); - CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg); - DELAY(1); - } - reg = FXP_EEPROM_EECS; - data[i] = 0; - /* - * Shift out data. - */ - for (x = 16; x > 0; x--) { - CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, - reg | FXP_EEPROM_EESK); - DELAY(1); - if (CSR_READ_2(sc, FXP_CSR_EEPROMCONTROL) & - FXP_EEPROM_EEDO) - data[i] |= (1 << (x - 1)); - CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg); - DELAY(1); - } - CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, 0); - DELAY(1); - } -} - -/* - * Start packet transmission on the interface. - */ -static void -fxp_start(ifp) - struct ifnet *ifp; -{ - struct fxp_softc *sc = ifp->if_softc; - struct fxp_cb_tx *txp; - - FXP_LOCK(sc); - /* - * See if we need to suspend xmit until the multicast filter - * has been reprogrammed (which can only be done at the head - * of the command chain). - */ - if (sc->need_mcsetup) { - FXP_UNLOCK(sc); - return; - } - - txp = NULL; - - /* - * We're finished if there is nothing more to add to the list or if - * we're all filled up with buffers to transmit. - * NOTE: One TxCB is reserved to guarantee that fxp_mc_setup() can add - * a NOP command when needed. - */ - while (ifp->if_snd.ifq_head != NULL && sc->tx_queued < FXP_NTXCB - 1) { - struct mbuf *m, *mb_head; - int segment; - - /* - * Grab a packet to transmit. - */ - IF_DEQUEUE(&ifp->if_snd, mb_head); - - /* - * Get pointer to next available tx desc. - */ - txp = sc->cbl_last->next; - - /* - * Go through each of the mbufs in the chain and initialize - * the transmit buffer descriptors with the physical address - * and size of the mbuf. - */ -tbdinit: - for (m = mb_head, segment = 0; m != NULL; m = m->m_next) { - if (m->m_len != 0) { - if (segment == FXP_NTXSEG) - break; - txp->tbd[segment].tb_addr = - vtophys(mtod(m, vm_offset_t)); - txp->tbd[segment].tb_size = m->m_len; - segment++; - } - } - if (m != NULL) { - struct mbuf *mn; - - /* - * We ran out of segments. We have to recopy this mbuf - * chain first. Bail out if we can't get the new buffers. - */ - MGETHDR(mn, M_DONTWAIT, MT_DATA); - if (mn == NULL) { - m_freem(mb_head); - break; - } - if (mb_head->m_pkthdr.len > MHLEN) { - MCLGET(mn, M_DONTWAIT); - if ((mn->m_flags & M_EXT) == 0) { - m_freem(mn); - m_freem(mb_head); - break; - } - } - m_copydata(mb_head, 0, mb_head->m_pkthdr.len, - mtod(mn, caddr_t)); - mn->m_pkthdr.len = mn->m_len = mb_head->m_pkthdr.len; - m_freem(mb_head); - mb_head = mn; - goto tbdinit; - } - - txp->tbd_number = segment; - txp->mb_head = mb_head; - txp->cb_status = 0; - if (sc->tx_queued != FXP_CXINT_THRESH - 1) { - txp->cb_command = - FXP_CB_COMMAND_XMIT | FXP_CB_COMMAND_SF | FXP_CB_COMMAND_S; - } else { - txp->cb_command = - FXP_CB_COMMAND_XMIT | FXP_CB_COMMAND_SF | FXP_CB_COMMAND_S | FXP_CB_COMMAND_I; - /* - * Set a 5 second timer just in case we don't hear from the - * card again. - */ - ifp->if_timer = 5; - } - txp->tx_threshold = tx_threshold; - - /* - * Advance the end of list forward. - */ - -#ifdef __alpha__ - /* - * On platforms which can't access memory in 16-bit - * granularities, we must prevent the card from DMA'ing - * up the status while we update the command field. - * This could cause us to overwrite the completion status. - */ - atomic_clear_short(&sc->cbl_last->cb_command, - FXP_CB_COMMAND_S); -#else - sc->cbl_last->cb_command &= ~FXP_CB_COMMAND_S; -#endif /*__alpha__*/ - sc->cbl_last = txp; - - /* - * Advance the beginning of the list forward if there are - * no other packets queued (when nothing is queued, cbl_first - * sits on the last TxCB that was sent out). - */ - if (sc->tx_queued == 0) - sc->cbl_first = txp; - - sc->tx_queued++; - - /* - * Pass packet to bpf if there is a listener. - */ - if (ifp->if_bpf) - bpf_mtap(ifp, mb_head); - } - - /* - * We're finished. If we added to the list, issue a RESUME to get DMA - * going again if suspended. - */ - if (txp != NULL) { - fxp_scb_wait(sc); - CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_RESUME); - } - FXP_UNLOCK(sc); -} - -/* - * Process interface interrupts. - */ -static void -fxp_intr(arg) - void *arg; -{ - struct fxp_softc *sc = arg; - struct ifnet *ifp = &sc->sc_if; - u_int8_t statack; - - FXP_LOCK(sc); - - if (sc->suspended) { - FXP_UNLOCK(sc); - return; - } - - while ((statack = CSR_READ_1(sc, FXP_CSR_SCB_STATACK)) != 0) { - /* - * First ACK all the interrupts in this pass. - */ - CSR_WRITE_1(sc, FXP_CSR_SCB_STATACK, statack); - - /* - * Free any finished transmit mbuf chains. - * - * Handle the CNA event likt a CXTNO event. It used to - * be that this event (control unit not ready) was not - * encountered, but it is now with the SMPng modifications. - * The exact sequence of events that occur when the interface - * is brought up are different now, and if this event - * goes unhandled, the configuration/rxfilter setup sequence - * can stall for several seconds. The result is that no - * packets go out onto the wire for about 5 to 10 seconds - * after the interface is ifconfig'ed for the first time. - */ - if (statack & (FXP_SCB_STATACK_CXTNO | FXP_SCB_STATACK_CNA)) { - struct fxp_cb_tx *txp; - - for (txp = sc->cbl_first; sc->tx_queued && - (txp->cb_status & FXP_CB_STATUS_C) != 0; - txp = txp->next) { - if (txp->mb_head != NULL) { - m_freem(txp->mb_head); - txp->mb_head = NULL; - } - sc->tx_queued--; - } - sc->cbl_first = txp; - ifp->if_timer = 0; - if (sc->tx_queued == 0) { - if (sc->need_mcsetup) - fxp_mc_setup(sc); - } - /* - * Try to start more packets transmitting. - */ - if (ifp->if_snd.ifq_head != NULL) - fxp_start(ifp); - } - /* - * Process receiver interrupts. If a no-resource (RNR) - * condition exists, get whatever packets we can and - * re-start the receiver. - */ - if (statack & (FXP_SCB_STATACK_FR | FXP_SCB_STATACK_RNR)) { - struct mbuf *m; - struct fxp_rfa *rfa; -rcvloop: - m = sc->rfa_headm; - rfa = (struct fxp_rfa *)(m->m_ext.ext_buf + - RFA_ALIGNMENT_FUDGE); - - if (rfa->rfa_status & FXP_RFA_STATUS_C) { - /* - * Remove first packet from the chain. - */ - sc->rfa_headm = m->m_next; - m->m_next = NULL; - - /* - * Add a new buffer to the receive chain. - * If this fails, the old buffer is recycled - * instead. - */ - if (fxp_add_rfabuf(sc, m) == 0) { - struct ether_header *eh; - int total_len; - - total_len = rfa->actual_size & - (MCLBYTES - 1); - if (total_len < - sizeof(struct ether_header)) { - m_freem(m); - goto rcvloop; - } - m->m_pkthdr.rcvif = ifp; - m->m_pkthdr.len = m->m_len = total_len; - eh = mtod(m, struct ether_header *); - m->m_data += - sizeof(struct ether_header); - m->m_len -= - sizeof(struct ether_header); - m->m_pkthdr.len = m->m_len; - ether_input(ifp, eh, m); - } - goto rcvloop; - } - if (statack & FXP_SCB_STATACK_RNR) { - fxp_scb_wait(sc); - CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, - vtophys(sc->rfa_headm->m_ext.ext_buf) + - RFA_ALIGNMENT_FUDGE); - CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, - FXP_SCB_COMMAND_RU_START); - } - } - } - FXP_UNLOCK(sc); -} - -/* - * Update packet in/out/collision statistics. The i82557 doesn't - * allow you to access these counters without doing a fairly - * expensive DMA to get _all_ of the statistics it maintains, so - * we do this operation here only once per second. The statistics - * counters in the kernel are updated from the previous dump-stats - * DMA and then a new dump-stats DMA is started. The on-chip - * counters are zeroed when the DMA completes. If we can't start - * the DMA immediately, we don't wait - we just prepare to read - * them again next time. - */ -static void -fxp_stats_update(arg) - void *arg; -{ - struct fxp_softc *sc = arg; - struct ifnet *ifp = &sc->sc_if; - struct fxp_stats *sp = sc->fxp_stats; - struct fxp_cb_tx *txp; - - ifp->if_opackets += sp->tx_good; - ifp->if_collisions += sp->tx_total_collisions; - if (sp->rx_good) { - ifp->if_ipackets += sp->rx_good; - sc->rx_idle_secs = 0; - } else { - /* - * Receiver's been idle for another second. - */ - sc->rx_idle_secs++; - } - ifp->if_ierrors += - sp->rx_crc_errors + - sp->rx_alignment_errors + - sp->rx_rnr_errors + - sp->rx_overrun_errors; - /* - * If any transmit underruns occured, bump up the transmit - * threshold by another 512 bytes (64 * 8). - */ - if (sp->tx_underruns) { - ifp->if_oerrors += sp->tx_underruns; - if (tx_threshold < 192) - tx_threshold += 64; - } - FXP_LOCK(sc); - /* - * Release any xmit buffers that have completed DMA. This isn't - * strictly necessary to do here, but it's advantagous for mbufs - * with external storage to be released in a timely manner rather - * than being defered for a potentially long time. This limits - * the delay to a maximum of one second. - */ - for (txp = sc->cbl_first; sc->tx_queued && - (txp->cb_status & FXP_CB_STATUS_C) != 0; - txp = txp->next) { - if (txp->mb_head != NULL) { - m_freem(txp->mb_head); - txp->mb_head = NULL; - } - sc->tx_queued--; - } - sc->cbl_first = txp; - /* - * If we haven't received any packets in FXP_MAC_RX_IDLE seconds, - * then assume the receiver has locked up and attempt to clear - * the condition by reprogramming the multicast filter. This is - * a work-around for a bug in the 82557 where the receiver locks - * up if it gets certain types of garbage in the syncronization - * bits prior to the packet header. This bug is supposed to only - * occur in 10Mbps mode, but has been seen to occur in 100Mbps - * mode as well (perhaps due to a 10/100 speed transition). - */ - if (sc->rx_idle_secs > FXP_MAX_RX_IDLE) { - sc->rx_idle_secs = 0; - fxp_mc_setup(sc); - } - /* - * If there is no pending command, start another stats - * dump. Otherwise punt for now. - */ - if (CSR_READ_1(sc, FXP_CSR_SCB_COMMAND) == 0) { - /* - * Start another stats dump. - */ - CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, - FXP_SCB_COMMAND_CU_DUMPRESET); - } else { - /* - * A previous command is still waiting to be accepted. - * Just zero our copy of the stats and wait for the - * next timer event to update them. - */ - sp->tx_good = 0; - sp->tx_underruns = 0; - sp->tx_total_collisions = 0; - - sp->rx_good = 0; - sp->rx_crc_errors = 0; - sp->rx_alignment_errors = 0; - sp->rx_rnr_errors = 0; - sp->rx_overrun_errors = 0; - } - FXP_UNLOCK(sc); - /* - * Schedule another timeout one second from now. - */ - sc->stat_ch = timeout(fxp_stats_update, sc, hz); -} - -/* - * Stop the interface. Cancels the statistics updater and resets - * the interface. - */ -static void -fxp_stop(sc) - struct fxp_softc *sc; -{ - struct ifnet *ifp = &sc->sc_if; - struct fxp_cb_tx *txp; - int i; - - FXP_LOCK(sc); - - ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); - ifp->if_timer = 0; - - /* - * Cancel stats updater. - */ - untimeout(fxp_stats_update, sc, sc->stat_ch); - - /* - * Issue software reset - */ - CSR_WRITE_4(sc, FXP_CSR_PORT, FXP_PORT_SELECTIVE_RESET); - DELAY(10); - - /* - * Release any xmit buffers. - */ - txp = sc->cbl_base; - if (txp != NULL) { - for (i = 0; i < FXP_NTXCB; i++) { - if (txp[i].mb_head != NULL) { - m_freem(txp[i].mb_head); - txp[i].mb_head = NULL; - } - } - } - sc->tx_queued = 0; - - /* - * Free all the receive buffers then reallocate/reinitialize - */ - if (sc->rfa_headm != NULL) - m_freem(sc->rfa_headm); - sc->rfa_headm = NULL; - sc->rfa_tailm = NULL; - for (i = 0; i < FXP_NRFABUFS; i++) { - if (fxp_add_rfabuf(sc, NULL) != 0) { - /* - * This "can't happen" - we're at splimp() - * and we just freed all the buffers we need - * above. - */ - panic("fxp_stop: no buffers!"); - } - } - - FXP_UNLOCK(sc); -} - -/* - * Watchdog/transmission transmit timeout handler. Called when a - * transmission is started on the interface, but no interrupt is - * received before the timeout. This usually indicates that the - * card has wedged for some reason. - */ -static void -fxp_watchdog(ifp) - struct ifnet *ifp; -{ - struct fxp_softc *sc = ifp->if_softc; - - printf("fxp%d: device timeout\n", FXP_UNIT(sc)); - ifp->if_oerrors++; - - fxp_init(sc); -} - -static void -fxp_init(xsc) - void *xsc; -{ - struct fxp_softc *sc = xsc; - struct ifnet *ifp = &sc->sc_if; - struct fxp_cb_config *cbp; - struct fxp_cb_ias *cb_ias; - struct fxp_cb_tx *txp; - int i, prm; - - FXP_LOCK(sc); - /* - * Cancel any pending I/O - */ - fxp_stop(sc); - - prm = (ifp->if_flags & IFF_PROMISC) ? 1 : 0; - - /* - * Initialize base of CBL and RFA memory. Loading with zero - * sets it up for regular linear addressing. - */ - CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, 0); - CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_BASE); - - fxp_scb_wait(sc); - CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_RU_BASE); - - /* - * Initialize base of dump-stats buffer. - */ - fxp_scb_wait(sc); - CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, vtophys(sc->fxp_stats)); - CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_DUMP_ADR); - - /* - * We temporarily use memory that contains the TxCB list to - * construct the config CB. The TxCB list memory is rebuilt - * later. - */ - cbp = (struct fxp_cb_config *) sc->cbl_base; - - /* - * This bcopy is kind of disgusting, but there are a bunch of must be - * zero and must be one bits in this structure and this is the easiest - * way to initialize them all to proper values. - */ - bcopy(fxp_cb_config_template, - (void *)(uintptr_t)(volatile void *)&cbp->cb_status, - sizeof(fxp_cb_config_template)); - - cbp->cb_status = 0; - cbp->cb_command = FXP_CB_COMMAND_CONFIG | FXP_CB_COMMAND_EL; - cbp->link_addr = -1; /* (no) next command */ - cbp->byte_count = 22; /* (22) bytes to config */ - cbp->rx_fifo_limit = 8; /* rx fifo threshold (32 bytes) */ - cbp->tx_fifo_limit = 0; /* tx fifo threshold (0 bytes) */ - cbp->adaptive_ifs = 0; /* (no) adaptive interframe spacing */ - cbp->rx_dma_bytecount = 0; /* (no) rx DMA max */ - cbp->tx_dma_bytecount = 0; /* (no) tx DMA max */ - cbp->dma_bce = 0; /* (disable) dma max counters */ - cbp->late_scb = 0; /* (don't) defer SCB update */ - cbp->tno_int = 0; /* (disable) tx not okay interrupt */ - cbp->ci_int = 1; /* interrupt on CU idle */ - cbp->save_bf = prm; /* save bad frames */ - cbp->disc_short_rx = !prm; /* discard short packets */ - cbp->underrun_retry = 1; /* retry mode (1) on DMA underrun */ - cbp->mediatype = !sc->phy_10Mbps_only; /* interface mode */ - cbp->nsai = 1; /* (don't) disable source addr insert */ - cbp->preamble_length = 2; /* (7 byte) preamble */ - cbp->loopback = 0; /* (don't) loopback */ - cbp->linear_priority = 0; /* (normal CSMA/CD operation) */ - cbp->linear_pri_mode = 0; /* (wait after xmit only) */ - cbp->interfrm_spacing = 6; /* (96 bits of) interframe spacing */ - cbp->promiscuous = prm; /* promiscuous mode */ - cbp->bcast_disable = 0; /* (don't) disable broadcasts */ - cbp->crscdt = 0; /* (CRS only) */ - cbp->stripping = !prm; /* truncate rx packet to byte count */ - cbp->padding = 1; /* (do) pad short tx packets */ - cbp->rcv_crc_xfer = 0; /* (don't) xfer CRC to host */ - cbp->force_fdx = 0; /* (don't) force full duplex */ - cbp->fdx_pin_en = 1; /* (enable) FDX# pin */ - cbp->multi_ia = 0; /* (don't) accept multiple IAs */ - cbp->mc_all = sc->all_mcasts;/* accept all multicasts */ - - /* - * Start the config command/DMA. - */ - fxp_scb_wait(sc); - CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, vtophys(&cbp->cb_status)); - CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_START); - /* ...and wait for it to complete. */ - fxp_dma_wait(&cbp->cb_status, sc); - - /* - * Now initialize the station address. Temporarily use the TxCB - * memory area like we did above for the config CB. - */ - cb_ias = (struct fxp_cb_ias *) sc->cbl_base; - cb_ias->cb_status = 0; - cb_ias->cb_command = FXP_CB_COMMAND_IAS | FXP_CB_COMMAND_EL; - cb_ias->link_addr = -1; - bcopy(sc->arpcom.ac_enaddr, - (void *)(uintptr_t)(volatile void *)cb_ias->macaddr, - sizeof(sc->arpcom.ac_enaddr)); - - /* - * Start the IAS (Individual Address Setup) command/DMA. - */ - fxp_scb_wait(sc); - CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_START); - /* ...and wait for it to complete. */ - fxp_dma_wait(&cb_ias->cb_status, sc); - - /* - * Initialize transmit control block (TxCB) list. - */ - - txp = sc->cbl_base; - bzero(txp, sizeof(struct fxp_cb_tx) * FXP_NTXCB); - for (i = 0; i < FXP_NTXCB; i++) { - txp[i].cb_status = FXP_CB_STATUS_C | FXP_CB_STATUS_OK; - txp[i].cb_command = FXP_CB_COMMAND_NOP; - txp[i].link_addr = vtophys(&txp[(i + 1) & FXP_TXCB_MASK].cb_status); - txp[i].tbd_array_addr = vtophys(&txp[i].tbd[0]); - txp[i].next = &txp[(i + 1) & FXP_TXCB_MASK]; - } - /* - * Set the suspend flag on the first TxCB and start the control - * unit. It will execute the NOP and then suspend. - */ - txp->cb_command = FXP_CB_COMMAND_NOP | FXP_CB_COMMAND_S; - sc->cbl_first = sc->cbl_last = txp; - sc->tx_queued = 1; - - fxp_scb_wait(sc); - CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_START); - - /* - * Initialize receiver buffer area - RFA. - */ - fxp_scb_wait(sc); - CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, - vtophys(sc->rfa_headm->m_ext.ext_buf) + RFA_ALIGNMENT_FUDGE); - CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_RU_START); - - /* - * Set current media. - */ - fxp_set_media(sc, sc->sc_media.ifm_cur->ifm_media); - - ifp->if_flags |= IFF_RUNNING; - ifp->if_flags &= ~IFF_OACTIVE; - FXP_UNLOCK(sc); - - /* - * Start stats updater. - */ - sc->stat_ch = timeout(fxp_stats_update, sc, hz); -} - -static void -fxp_set_media(sc, media) - struct fxp_softc *sc; - int media; -{ - - switch (sc->phy_primary_device) { - case FXP_PHY_DP83840: - case FXP_PHY_DP83840A: - fxp_mdi_write(sc, sc->phy_primary_addr, FXP_DP83840_PCR, - fxp_mdi_read(sc, sc->phy_primary_addr, FXP_DP83840_PCR) | - FXP_DP83840_PCR_LED4_MODE | /* LED4 always indicates duplex */ - FXP_DP83840_PCR_F_CONNECT | /* force link disconnect bypass */ - FXP_DP83840_PCR_BIT10); /* XXX I have no idea */ - /* fall through */ - case FXP_PHY_82553A: - case FXP_PHY_82553C: /* untested */ - case FXP_PHY_82555: - case FXP_PHY_82555B: - if (IFM_SUBTYPE(media) != IFM_AUTO) { - int flags; - - flags = (IFM_SUBTYPE(media) == IFM_100_TX) ? - FXP_PHY_BMCR_SPEED_100M : 0; - flags |= (media & IFM_FDX) ? - FXP_PHY_BMCR_FULLDUPLEX : 0; - fxp_mdi_write(sc, sc->phy_primary_addr, - FXP_PHY_BMCR, - (fxp_mdi_read(sc, sc->phy_primary_addr, - FXP_PHY_BMCR) & - ~(FXP_PHY_BMCR_AUTOEN | FXP_PHY_BMCR_SPEED_100M | - FXP_PHY_BMCR_FULLDUPLEX)) | flags); - } else { - fxp_mdi_write(sc, sc->phy_primary_addr, - FXP_PHY_BMCR, - (fxp_mdi_read(sc, sc->phy_primary_addr, - FXP_PHY_BMCR) | FXP_PHY_BMCR_AUTOEN)); - } - break; - /* - * The Seeq 80c24 doesn't have a PHY programming interface, so do - * nothing. - */ - case FXP_PHY_80C24: - break; - default: - printf("fxp%d: warning: unsupported PHY, type = %d, addr = %d\n", - FXP_UNIT(sc), sc->phy_primary_device, - sc->phy_primary_addr); - } -} - -/* - * Change media according to request. - */ -int -fxp_mediachange(ifp) - struct ifnet *ifp; -{ - struct fxp_softc *sc = ifp->if_softc; - struct ifmedia *ifm = &sc->sc_media; - - if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER) - return (EINVAL); - - fxp_set_media(sc, ifm->ifm_media); - return (0); -} - -/* - * Notify the world which media we're using. - */ -void -fxp_mediastatus(ifp, ifmr) - struct ifnet *ifp; - struct ifmediareq *ifmr; -{ - struct fxp_softc *sc = ifp->if_softc; - int flags, stsflags; - - switch (sc->phy_primary_device) { - case FXP_PHY_82555: - case FXP_PHY_82555B: - case FXP_PHY_DP83840: - case FXP_PHY_DP83840A: - ifmr->ifm_status = IFM_AVALID; /* IFM_ACTIVE will be valid */ - ifmr->ifm_active = IFM_ETHER; - /* - * the following is not an error. - * You need to read this register twice to get current - * status. This is correct documented behaviour, the - * first read gets latched values. - */ - stsflags = fxp_mdi_read(sc, sc->phy_primary_addr, FXP_PHY_STS); - stsflags = fxp_mdi_read(sc, sc->phy_primary_addr, FXP_PHY_STS); - if (stsflags & FXP_PHY_STS_LINK_STS) - ifmr->ifm_status |= IFM_ACTIVE; - - /* - * If we are in auto mode, then try report the result. - */ - flags = fxp_mdi_read(sc, sc->phy_primary_addr, FXP_PHY_BMCR); - if (flags & FXP_PHY_BMCR_AUTOEN) { - ifmr->ifm_active |= IFM_AUTO; /* XXX presently 0 */ - if (stsflags & FXP_PHY_STS_AUTO_DONE) { - /* - * Intel and National parts report - * differently on what they found. - */ - if ((sc->phy_primary_device == FXP_PHY_82555) - || (sc->phy_primary_device == FXP_PHY_82555B)) { - flags = fxp_mdi_read(sc, - sc->phy_primary_addr, - FXP_PHY_USC); - - if (flags & FXP_PHY_USC_SPEED) - ifmr->ifm_active |= IFM_100_TX; - else - ifmr->ifm_active |= IFM_10_T; - - if (flags & FXP_PHY_USC_DUPLEX) - ifmr->ifm_active |= IFM_FDX; - } else { /* it's National. only know speed */ - flags = fxp_mdi_read(sc, - sc->phy_primary_addr, - FXP_DP83840_PAR); - - if (flags & FXP_DP83840_PAR_SPEED_10) - ifmr->ifm_active |= IFM_10_T; - else - ifmr->ifm_active |= IFM_100_TX; - } - } - } else { /* in manual mode.. just report what we were set to */ - if (flags & FXP_PHY_BMCR_SPEED_100M) - ifmr->ifm_active |= IFM_100_TX; - else - ifmr->ifm_active |= IFM_10_T; - - if (flags & FXP_PHY_BMCR_FULLDUPLEX) - ifmr->ifm_active |= IFM_FDX; - } - break; - - case FXP_PHY_80C24: - default: - ifmr->ifm_active = IFM_ETHER|IFM_MANUAL; /* XXX IFM_AUTO ? */ - } -} - -/* - * Add a buffer to the end of the RFA buffer list. - * Return 0 if successful, 1 for failure. A failure results in - * adding the 'oldm' (if non-NULL) on to the end of the list - - * tossing out its old contents and recycling it. - * The RFA struct is stuck at the beginning of mbuf cluster and the - * data pointer is fixed up to point just past it. - */ -static int -fxp_add_rfabuf(sc, oldm) - struct fxp_softc *sc; - struct mbuf *oldm; -{ - u_int32_t v; - struct mbuf *m; - struct fxp_rfa *rfa, *p_rfa; - - MGETHDR(m, M_DONTWAIT, MT_DATA); - if (m != NULL) { - MCLGET(m, M_DONTWAIT); - if ((m->m_flags & M_EXT) == 0) { - m_freem(m); - if (oldm == NULL) - return 1; - m = oldm; - m->m_data = m->m_ext.ext_buf; - } - } else { - if (oldm == NULL) - return 1; - m = oldm; - m->m_data = m->m_ext.ext_buf; - } - - /* - * Move the data pointer up so that the incoming data packet - * will be 32-bit aligned. - */ - m->m_data += RFA_ALIGNMENT_FUDGE; - - /* - * Get a pointer to the base of the mbuf cluster and move - * data start past it. - */ - rfa = mtod(m, struct fxp_rfa *); - m->m_data += sizeof(struct fxp_rfa); - rfa->size = (u_int16_t)(MCLBYTES - sizeof(struct fxp_rfa) - RFA_ALIGNMENT_FUDGE); - - /* - * Initialize the rest of the RFA. Note that since the RFA - * is misaligned, we cannot store values directly. Instead, - * we use an optimized, inline copy. - */ - - rfa->rfa_status = 0; - rfa->rfa_control = FXP_RFA_CONTROL_EL; - rfa->actual_size = 0; - - v = -1; - fxp_lwcopy(&v, (volatile u_int32_t *) rfa->link_addr); - fxp_lwcopy(&v, (volatile u_int32_t *) rfa->rbd_addr); - - /* - * If there are other buffers already on the list, attach this - * one to the end by fixing up the tail to point to this one. - */ - if (sc->rfa_headm != NULL) { - p_rfa = (struct fxp_rfa *) (sc->rfa_tailm->m_ext.ext_buf + - RFA_ALIGNMENT_FUDGE); - sc->rfa_tailm->m_next = m; - v = vtophys(rfa); - fxp_lwcopy(&v, (volatile u_int32_t *) p_rfa->link_addr); - p_rfa->rfa_control = 0; - } else { - sc->rfa_headm = m; - } - sc->rfa_tailm = m; - - return (m == oldm); -} - -static volatile int -fxp_mdi_read(sc, phy, reg) - struct fxp_softc *sc; - int phy; - int reg; -{ - int count = 10000; - int value; - - CSR_WRITE_4(sc, FXP_CSR_MDICONTROL, - (FXP_MDI_READ << 26) | (reg << 16) | (phy << 21)); - - while (((value = CSR_READ_4(sc, FXP_CSR_MDICONTROL)) & 0x10000000) == 0 - && count--) - DELAY(10); - - if (count <= 0) - printf("fxp%d: fxp_mdi_read: timed out\n", FXP_UNIT(sc)); - - return (value & 0xffff); -} - -static void -fxp_mdi_write(sc, phy, reg, value) - struct fxp_softc *sc; - int phy; - int reg; - int value; -{ - int count = 10000; - - CSR_WRITE_4(sc, FXP_CSR_MDICONTROL, - (FXP_MDI_WRITE << 26) | (reg << 16) | (phy << 21) | - (value & 0xffff)); - - while((CSR_READ_4(sc, FXP_CSR_MDICONTROL) & 0x10000000) == 0 && - count--) - DELAY(10); - - if (count <= 0) - printf("fxp%d: fxp_mdi_write: timed out\n", FXP_UNIT(sc)); -} - -static int -fxp_ioctl(ifp, command, data) - struct ifnet *ifp; - u_long command; - caddr_t data; -{ - struct fxp_softc *sc = ifp->if_softc; - struct ifreq *ifr = (struct ifreq *)data; - int error = 0; - - FXP_LOCK(sc); - - switch (command) { - - case SIOCSIFADDR: - case SIOCGIFADDR: - case SIOCSIFMTU: - error = ether_ioctl(ifp, command, data); - break; - - case SIOCSIFFLAGS: - sc->all_mcasts = (ifp->if_flags & IFF_ALLMULTI) ? 1 : 0; - - /* - * If interface is marked up and not running, then start it. - * If it is marked down and running, stop it. - * XXX If it's up then re-initialize it. This is so flags - * such as IFF_PROMISC are handled. - */ - if (ifp->if_flags & IFF_UP) { - fxp_init(sc); - } else { - if (ifp->if_flags & IFF_RUNNING) - fxp_stop(sc); - } - break; - - case SIOCADDMULTI: - case SIOCDELMULTI: - sc->all_mcasts = (ifp->if_flags & IFF_ALLMULTI) ? 1 : 0; - /* - * Multicast list has changed; set the hardware filter - * accordingly. - */ - if (!sc->all_mcasts) - fxp_mc_setup(sc); - /* - * fxp_mc_setup() can turn on sc->all_mcasts, so check it - * again rather than else {}. - */ - if (sc->all_mcasts) - fxp_init(sc); - error = 0; - break; - - case SIOCSIFMEDIA: - case SIOCGIFMEDIA: - error = ifmedia_ioctl(ifp, ifr, &sc->sc_media, command); - break; - - default: - error = EINVAL; - } - FXP_UNLOCK(sc); - return (error); -} - -/* - * Program the multicast filter. - * - * We have an artificial restriction that the multicast setup command - * must be the first command in the chain, so we take steps to ensure - * this. By requiring this, it allows us to keep up the performance of - * the pre-initialized command ring (esp. link pointers) by not actually - * inserting the mcsetup command in the ring - i.e. its link pointer - * points to the TxCB ring, but the mcsetup descriptor itself is not part - * of it. We then can do 'CU_START' on the mcsetup descriptor and have it - * lead into the regular TxCB ring when it completes. - * - * This function must be called at splimp. - */ -static void -fxp_mc_setup(sc) - struct fxp_softc *sc; -{ - struct fxp_cb_mcs *mcsp = sc->mcsp; - struct ifnet *ifp = &sc->sc_if; - struct ifmultiaddr *ifma; - int nmcasts; - int count; - - /* - * If there are queued commands, we must wait until they are all - * completed. If we are already waiting, then add a NOP command - * with interrupt option so that we're notified when all commands - * have been completed - fxp_start() ensures that no additional - * TX commands will be added when need_mcsetup is true. - */ - if (sc->tx_queued) { - struct fxp_cb_tx *txp; - - /* - * need_mcsetup will be true if we are already waiting for the - * NOP command to be completed (see below). In this case, bail. - */ - if (sc->need_mcsetup) - return; - sc->need_mcsetup = 1; - - /* - * Add a NOP command with interrupt so that we are notified when all - * TX commands have been processed. - */ - txp = sc->cbl_last->next; - txp->mb_head = NULL; - txp->cb_status = 0; - txp->cb_command = FXP_CB_COMMAND_NOP | FXP_CB_COMMAND_S | FXP_CB_COMMAND_I; - /* - * Advance the end of list forward. - */ - sc->cbl_last->cb_command &= ~FXP_CB_COMMAND_S; - sc->cbl_last = txp; - sc->tx_queued++; - /* - * Issue a resume in case the CU has just suspended. - */ - fxp_scb_wait(sc); - CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_RESUME); - /* - * Set a 5 second timer just in case we don't hear from the - * card again. - */ - ifp->if_timer = 5; - - return; - } - sc->need_mcsetup = 0; - - /* - * Initialize multicast setup descriptor. - */ - mcsp->next = sc->cbl_base; - mcsp->mb_head = NULL; - mcsp->cb_status = 0; - mcsp->cb_command = FXP_CB_COMMAND_MCAS | FXP_CB_COMMAND_S | FXP_CB_COMMAND_I; - mcsp->link_addr = vtophys(&sc->cbl_base->cb_status); - - nmcasts = 0; - if (!sc->all_mcasts) { - TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { - if (ifma->ifma_addr->sa_family != AF_LINK) - continue; - if (nmcasts >= MAXMCADDR) { - sc->all_mcasts = 1; - nmcasts = 0; - break; - } - bcopy(LLADDR((struct sockaddr_dl *)ifma->ifma_addr), - (void *)(uintptr_t)(volatile void *) - &sc->mcsp->mc_addr[nmcasts][0], 6); - nmcasts++; - } - } - mcsp->mc_cnt = nmcasts * 6; - sc->cbl_first = sc->cbl_last = (struct fxp_cb_tx *) mcsp; - sc->tx_queued = 1; - - /* - * Wait until command unit is not active. This should never - * be the case when nothing is queued, but make sure anyway. - */ - count = 100; - while ((CSR_READ_1(sc, FXP_CSR_SCB_RUSCUS) >> 6) == - FXP_SCB_CUS_ACTIVE && --count) - DELAY(10); - if (count == 0) { - printf("fxp%d: command queue timeout\n", FXP_UNIT(sc)); - return; - } - - /* - * Start the multicast setup command. - */ - fxp_scb_wait(sc); - CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, vtophys(&mcsp->cb_status)); - CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_START); - - ifp->if_timer = 2; - return; -} diff --git a/sys/pci/if_fxpreg.h b/sys/pci/if_fxpreg.h deleted file mode 100644 index 6cbcd4046fe7..000000000000 --- a/sys/pci/if_fxpreg.h +++ /dev/null @@ -1,425 +0,0 @@ -/* - * Copyright (c) 1995, David Greenman - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice unmodified, this list of conditions, and the following - * disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD$ - */ - -#define FXP_VENDORID_INTEL 0x8086 -#define FXP_DEVICEID_i82557 0x1229 /* 82557 - 82559 "classic" */ -#define FXP_DEVICEID_i82559 0x1030 /* New 82559 device id.. */ -#define FXP_DEVICEID_i82559ER 0x1209 /* 82559 for embedded applications */ -#define FXP_DEVICEID_i82562 0x2449 /* 82562 PLC devices */ - -#define FXP_PCI_MMBA 0x10 -#define FXP_PCI_IOBA 0x14 - -/* - * Control/status registers. - */ -#define FXP_CSR_SCB_RUSCUS 0 /* scb_rus/scb_cus (1 byte) */ -#define FXP_CSR_SCB_STATACK 1 /* scb_statack (1 byte) */ -#define FXP_CSR_SCB_COMMAND 2 /* scb_command (1 byte) */ -#define FXP_CSR_SCB_INTRCNTL 3 /* scb_intrcntl (1 byte) */ -#define FXP_CSR_SCB_GENERAL 4 /* scb_general (4 bytes) */ -#define FXP_CSR_PORT 8 /* port (4 bytes) */ -#define FXP_CSR_FLASHCONTROL 12 /* flash control (2 bytes) */ -#define FXP_CSR_EEPROMCONTROL 14 /* eeprom control (2 bytes) */ -#define FXP_CSR_MDICONTROL 16 /* mdi control (4 bytes) */ - -/* - * FOR REFERENCE ONLY, the old definition of FXP_CSR_SCB_RUSCUS: - * - * volatile u_int8_t :2, - * scb_rus:4, - * scb_cus:2; - */ - -#define FXP_PORT_SOFTWARE_RESET 0 -#define FXP_PORT_SELFTEST 1 -#define FXP_PORT_SELECTIVE_RESET 2 -#define FXP_PORT_DUMP 3 - -#define FXP_SCB_RUS_IDLE 0 -#define FXP_SCB_RUS_SUSPENDED 1 -#define FXP_SCB_RUS_NORESOURCES 2 -#define FXP_SCB_RUS_READY 4 -#define FXP_SCB_RUS_SUSP_NORBDS 9 -#define FXP_SCB_RUS_NORES_NORBDS 10 -#define FXP_SCB_RUS_READY_NORBDS 12 - -#define FXP_SCB_CUS_IDLE 0 -#define FXP_SCB_CUS_SUSPENDED 1 -#define FXP_SCB_CUS_ACTIVE 2 - -#define FXP_SCB_STATACK_SWI 0x04 -#define FXP_SCB_STATACK_MDI 0x08 -#define FXP_SCB_STATACK_RNR 0x10 -#define FXP_SCB_STATACK_CNA 0x20 -#define FXP_SCB_STATACK_FR 0x40 -#define FXP_SCB_STATACK_CXTNO 0x80 - -#define FXP_SCB_COMMAND_CU_NOP 0x00 -#define FXP_SCB_COMMAND_CU_START 0x10 -#define FXP_SCB_COMMAND_CU_RESUME 0x20 -#define FXP_SCB_COMMAND_CU_DUMP_ADR 0x40 -#define FXP_SCB_COMMAND_CU_DUMP 0x50 -#define FXP_SCB_COMMAND_CU_BASE 0x60 -#define FXP_SCB_COMMAND_CU_DUMPRESET 0x70 - -#define FXP_SCB_COMMAND_RU_NOP 0 -#define FXP_SCB_COMMAND_RU_START 1 -#define FXP_SCB_COMMAND_RU_RESUME 2 -#define FXP_SCB_COMMAND_RU_ABORT 4 -#define FXP_SCB_COMMAND_RU_LOADHDS 5 -#define FXP_SCB_COMMAND_RU_BASE 6 -#define FXP_SCB_COMMAND_RU_RBDRESUME 7 - -/* - * Command block definitions - */ -struct fxp_cb_nop { - void *fill[2]; - volatile u_int16_t cb_status; - volatile u_int16_t cb_command; - volatile u_int32_t link_addr; -}; -struct fxp_cb_ias { - void *fill[2]; - volatile u_int16_t cb_status; - volatile u_int16_t cb_command; - volatile u_int32_t link_addr; - volatile u_int8_t macaddr[6]; -}; -/* I hate bit-fields :-( */ -struct fxp_cb_config { - void *fill[2]; - volatile u_int16_t cb_status; - volatile u_int16_t cb_command; - volatile u_int32_t link_addr; - volatile u_int byte_count:6, - :2; - volatile u_int rx_fifo_limit:4, - tx_fifo_limit:3, - :1; - volatile u_int8_t adaptive_ifs; - volatile u_int :8; - volatile u_int rx_dma_bytecount:7, - :1; - volatile u_int tx_dma_bytecount:7, - dma_bce:1; - volatile u_int late_scb:1, - :1, - tno_int:1, - ci_int:1, - :3, - save_bf:1; - volatile u_int disc_short_rx:1, - underrun_retry:2, - :5; - volatile u_int mediatype:1, - :7; - volatile u_int :8; - volatile u_int :3, - nsai:1, - preamble_length:2, - loopback:2; - volatile u_int linear_priority:3, - :5; - volatile u_int linear_pri_mode:1, - :3, - interfrm_spacing:4; - volatile u_int :8; - volatile u_int :8; - volatile u_int promiscuous:1, - bcast_disable:1, - :5, - crscdt:1; - volatile u_int :8; - volatile u_int :8; - volatile u_int stripping:1, - padding:1, - rcv_crc_xfer:1, - :5; - volatile u_int :6, - force_fdx:1, - fdx_pin_en:1; - volatile u_int :6, - multi_ia:1, - :1; - volatile u_int :3, - mc_all:1, - :4; -}; - -#define MAXMCADDR 80 -struct fxp_cb_mcs { - struct fxp_cb_tx *next; - struct mbuf *mb_head; - volatile u_int16_t cb_status; - volatile u_int16_t cb_command; - volatile u_int32_t link_addr; - volatile u_int16_t mc_cnt; - volatile u_int8_t mc_addr[MAXMCADDR][6]; -}; - -/* - * Number of DMA segments in a TxCB. Note that this is carefully - * chosen to make the total struct size an even power of two. It's - * critical that no TxCB be split across a page boundry since - * no attempt is made to allocate physically contiguous memory. - * - */ -#ifdef __alpha__ /* XXX - should be conditional on pointer size */ -#define FXP_NTXSEG 28 -#else -#define FXP_NTXSEG 29 -#endif - -struct fxp_tbd { - volatile u_int32_t tb_addr; - volatile u_int32_t tb_size; -}; -struct fxp_cb_tx { - struct fxp_cb_tx *next; - struct mbuf *mb_head; - volatile u_int16_t cb_status; - volatile u_int16_t cb_command; - volatile u_int32_t link_addr; - volatile u_int32_t tbd_array_addr; - volatile u_int16_t byte_count; - volatile u_int8_t tx_threshold; - volatile u_int8_t tbd_number; - /* - * The following isn't actually part of the TxCB. - */ - volatile struct fxp_tbd tbd[FXP_NTXSEG]; -}; - -/* - * Control Block (CB) definitions - */ - -/* status */ -#define FXP_CB_STATUS_OK 0x2000 -#define FXP_CB_STATUS_C 0x8000 -/* commands */ -#define FXP_CB_COMMAND_NOP 0x0 -#define FXP_CB_COMMAND_IAS 0x1 -#define FXP_CB_COMMAND_CONFIG 0x2 -#define FXP_CB_COMMAND_MCAS 0x3 -#define FXP_CB_COMMAND_XMIT 0x4 -#define FXP_CB_COMMAND_RESRV 0x5 -#define FXP_CB_COMMAND_DUMP 0x6 -#define FXP_CB_COMMAND_DIAG 0x7 -/* command flags */ -#define FXP_CB_COMMAND_SF 0x0008 /* simple/flexible mode */ -#define FXP_CB_COMMAND_I 0x2000 /* generate interrupt on completion */ -#define FXP_CB_COMMAND_S 0x4000 /* suspend on completion */ -#define FXP_CB_COMMAND_EL 0x8000 /* end of list */ - -/* - * RFA definitions - */ - -struct fxp_rfa { - volatile u_int16_t rfa_status; - volatile u_int16_t rfa_control; - volatile u_int8_t link_addr[4]; - volatile u_int8_t rbd_addr[4]; - volatile u_int16_t actual_size; - volatile u_int16_t size; -}; -#define FXP_RFA_STATUS_RCOL 0x0001 /* receive collision */ -#define FXP_RFA_STATUS_IAMATCH 0x0002 /* 0 = matches station address */ -#define FXP_RFA_STATUS_S4 0x0010 /* receive error from PHY */ -#define FXP_RFA_STATUS_TL 0x0020 /* type/length */ -#define FXP_RFA_STATUS_FTS 0x0080 /* frame too short */ -#define FXP_RFA_STATUS_OVERRUN 0x0100 /* DMA overrun */ -#define FXP_RFA_STATUS_RNR 0x0200 /* no resources */ -#define FXP_RFA_STATUS_ALIGN 0x0400 /* alignment error */ -#define FXP_RFA_STATUS_CRC 0x0800 /* CRC error */ -#define FXP_RFA_STATUS_OK 0x2000 /* packet received okay */ -#define FXP_RFA_STATUS_C 0x8000 /* packet reception complete */ -#define FXP_RFA_CONTROL_SF 0x08 /* simple/flexible memory mode */ -#define FXP_RFA_CONTROL_H 0x10 /* header RFD */ -#define FXP_RFA_CONTROL_S 0x4000 /* suspend after reception */ -#define FXP_RFA_CONTROL_EL 0x8000 /* end of list */ - -/* - * Statistics dump area definitions - */ -struct fxp_stats { - volatile u_int32_t tx_good; - volatile u_int32_t tx_maxcols; - volatile u_int32_t tx_latecols; - volatile u_int32_t tx_underruns; - volatile u_int32_t tx_lostcrs; - volatile u_int32_t tx_deffered; - volatile u_int32_t tx_single_collisions; - volatile u_int32_t tx_multiple_collisions; - volatile u_int32_t tx_total_collisions; - volatile u_int32_t rx_good; - volatile u_int32_t rx_crc_errors; - volatile u_int32_t rx_alignment_errors; - volatile u_int32_t rx_rnr_errors; - volatile u_int32_t rx_overrun_errors; - volatile u_int32_t rx_cdt_errors; - volatile u_int32_t rx_shortframes; - volatile u_int32_t completion_status; -}; -#define FXP_STATS_DUMP_COMPLETE 0xa005 -#define FXP_STATS_DR_COMPLETE 0xa007 - -/* - * Serial EEPROM control register bits - */ -/* shift clock */ -#define FXP_EEPROM_EESK 0x01 -/* chip select */ -#define FXP_EEPROM_EECS 0x02 -/* data in */ -#define FXP_EEPROM_EEDI 0x04 -/* data out */ -#define FXP_EEPROM_EEDO 0x08 - -/* - * Serial EEPROM opcodes, including start bit - */ -#define FXP_EEPROM_OPC_ERASE 0x4 -#define FXP_EEPROM_OPC_WRITE 0x5 -#define FXP_EEPROM_OPC_READ 0x6 - -/* - * Management Data Interface opcodes - */ -#define FXP_MDI_WRITE 0x1 -#define FXP_MDI_READ 0x2 - -/* - * PHY device types - */ -#define FXP_PHY_NONE 0 -#define FXP_PHY_82553A 1 -#define FXP_PHY_82553C 2 -#define FXP_PHY_82503 3 -#define FXP_PHY_DP83840 4 -#define FXP_PHY_80C240 5 -#define FXP_PHY_80C24 6 -#define FXP_PHY_82555 7 -#define FXP_PHY_DP83840A 10 -#define FXP_PHY_82555B 11 - -/* - * PHY BMCR Basic Mode Control Register - * Should probably be in i82555.h or dp83840.h (Intel/National names). - * (Called "Management Data Interface Control Reg" in some Intel data books). - * (*) indicates bit ignored in auto negotiation mode. - */ -#define FXP_PHY_BMCR 0x0 -#define FXP_PHY_BMCR_COLTEST 0x0080 /* not on Intel parts */ -#define FXP_PHY_BMCR_FULLDUPLEX 0x0100 /* 1 = Fullduplex (*) */ -#define FXP_PHY_BMCR_RESTART_NEG 0x0200 /* ==> 1 to restart autoneg */ -#define FXP_PHY_BMCR_ISOLATE 0x0400 /* not on Intel parts */ -#define FXP_PHY_BMCR_POWERDOWN 0x0800 /* 1 = low power mode */ -#define FXP_PHY_BMCR_AUTOEN 0x1000 /* 1 = for auto mode */ -#define FXP_PHY_BMCR_SPEED_100M 0x2000 /* 1 = for 100Mb/sec (*) */ -#define FXP_PHY_BMCR_LOOPBACK 0x4000 /* 1 = loopback at the PHY */ -#define FXP_PHY_BMCR_RESET 0x8000 /* ==> 1 sets to defaults */ - -/* - * Basic Mode Status Register (National name) - * Management Data Interface Status reg. (Intel name) - * in both Intel and National parts. - */ -#define FXP_PHY_STS 0x1 -#define FXP_PHY_STS_EXND 0x0001 /* Extended regs enabled */ -#define FXP_PHY_STS_JABR 0x0002 /* Jabber detected */ -#define FXP_PHY_STS_LINK_STS 0x0004 /* Link valid */ -#define FXP_PHY_STS_CAN_AUTO 0x0008 /* Auto detection available */ -#define FXP_PHY_STS_REMT_FAULT 0x0010 /* remote fault detected */ -#define FXP_PHY_STS_AUTO_DONE 0x0020 /* auto negotiation completed */ -#define FXP_PHY_STS_MGMT_PREAMBLE 0x0040 /* real complicated */ -#define FXP_PHY_STS_10HDX_OK 0x0800 /* can do 10Mb HDX */ -#define FXP_PHY_STS_10FDX_OK 0x1000 /* can do 10Mb FDX */ -#define FXP_PHY_STS_100HDX_OK 0x2000 /* can do 100Mb HDX */ -#define FXP_PHY_STS_100FDX_OK 0x4000 /* can do 100Mb FDX */ -#define FXP_PHY_STS_100T4_OK 0x8000 /* can do 100bT4 -not Intel */ - -/* - * More Phy regs - */ -#define FXP_PHY_ID1 0x2 -#define FXP_PHY_ID2 0x3 - -/* - * MDI Auto negotiation advertisement register. - * What we advertise we can do.. - * The same bits are used to indicate the response too. - */ -#define FXP_PHY_ADVRT 0x4 -#define FXP_PHY_RMT_ADVRT 0x5 /* what the other end said */ -#define FXP_PHY_ADVRT_SELECT 0x001F /* real complicated */ -#define FXP_PHY_ADVRT_TECH_AVAIL 0x1FE0 /* can do 10Mb HDX */ -#define FXP_PHY_ADVRT_RMT_FAULT 0x2000 /* can do 10Mb FDX */ -#define FXP_PHY_ADVRT_ACK 0x4000 /* Acked */ -#define FXP_PHY_ADVRT_NXT_PAGE 0x8000 /* can do 100Mb FDX */ - -/* - * Phy Unit Status and Control Register (another one) - * This is not in the National part! - */ -#define FXP_PHY_USC 0x10 -#define FXP_PHY_USC_DUPLEX 0x0001 /* in FDX mode */ -#define FXP_PHY_USC_SPEED 0x0002 /* 1 = in 100Mb mode */ -#define FXP_PHY_USC_POLARITY 0x0100 /* 1 = reverse polarity */ -#define FXP_PHY_USC_10_PWRDOWN 0x0200 /* 10Mb PHY powered down */ -#define FXP_PHY_USC_100_PWRDOWN 0x0400 /* 100Mb PHY powered down */ -#define FXP_PHY_USC_INSYNC 0x0800 /* 100Mb PHY is in sync */ -#define FXP_PHY_USC_TX_FLOWCNTRL 0x1000 /* TX FC mode in use */ -#define FXP_PHY_USC_PHY_FLOWCNTRL 0x8000 /* PHY FC mode in use */ - - -/* - * DP83830 PHY, PCS Configuration Register - * NOT compatible with Intel parts, - * (where it is the 100BTX premature eof counter). - */ -#define FXP_DP83840_PCR 0x17 -#define FXP_DP83840_PCR_LED4_MODE 0x0002 /* 1 = LED4 always = FDX */ -#define FXP_DP83840_PCR_F_CONNECT 0x0020 /* 1 = link disconnect bypass */ -#define FXP_DP83840_PCR_BIT8 0x0100 -#define FXP_DP83840_PCR_BIT10 0x0400 - -/* - * DP83830 PHY, Address/status Register - * NOT compatible with Intel parts, - * (where it is the 10BT jabber detect counter). - */ -#define FXP_DP83840_PAR 0x19 -#define FXP_DP83840_PAR_PHYADDR 0x1F -#define FXP_DP83840_PAR_CON_STATUS 0x20 -#define FXP_DP83840_PAR_SPEED_10 0x40 /* 1 == running at 10 Mb/Sec */ - diff --git a/sys/pci/if_fxpvar.h b/sys/pci/if_fxpvar.h deleted file mode 100644 index 7a9eb8d63e65..000000000000 --- a/sys/pci/if_fxpvar.h +++ /dev/null @@ -1,90 +0,0 @@ -/* - * Copyright (c) 1995, David Greenman - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice unmodified, this list of conditions, and the following - * disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD$ - */ - -/* - * Misc. defintions for the Intel EtherExpress Pro/100B PCI Fast - * Ethernet driver - */ -/* - * NOTE: Elements are ordered for optimal cacheline behavior, and NOT - * for functional grouping. - */ -struct fxp_softc { - struct arpcom arpcom; /* per-interface network data */ - struct resource *mem; /* resource descriptor for registers */ - int rtp; /* register resource type */ - int rgd; /* register descriptor in use */ - struct resource *irq; /* resource descriptor for interrupt */ - void *ih; /* interrupt handler cookie */ - struct mtx sc_mtx; - bus_space_tag_t sc_st; /* bus space tag */ - bus_space_handle_t sc_sh; /* bus space handle */ - struct mbuf *rfa_headm; /* first mbuf in receive frame area */ - struct mbuf *rfa_tailm; /* last mbuf in receive frame area */ - struct fxp_cb_tx *cbl_first; /* first active TxCB in list */ - int tx_queued; /* # of active TxCB's */ - int need_mcsetup; /* multicast filter needs programming */ - struct fxp_cb_tx *cbl_last; /* last active TxCB in list */ - struct fxp_stats *fxp_stats; /* Pointer to interface stats */ - int rx_idle_secs; /* # of seconds RX has been idle */ - struct callout_handle stat_ch; /* Handle for canceling our stat timeout */ - struct fxp_cb_tx *cbl_base; /* base of TxCB list */ - struct fxp_cb_mcs *mcsp; /* Pointer to mcast setup descriptor */ - int all_mcasts; /* receive all multicasts */ - struct ifmedia sc_media; /* media information */ - int phy_primary_addr; /* address of primary PHY */ - int phy_primary_device; /* device type of primary PHY */ - int phy_10Mbps_only; /* PHY is 10Mbps-only device */ - int eeprom_size; /* size of serial EEPROM */ - int suspended; /* 0 = normal 1 = suspended (APM) */ - u_int32_t saved_maps[5]; /* pci data */ - u_int32_t saved_biosaddr; - u_int8_t saved_intline; - u_int8_t saved_cachelnsz; - u_int8_t saved_lattimer; -}; - -/* Macros to ease CSR access. */ -#define CSR_READ_1(sc, reg) \ - bus_space_read_1((sc)->sc_st, (sc)->sc_sh, (reg)) -#define CSR_READ_2(sc, reg) \ - bus_space_read_2((sc)->sc_st, (sc)->sc_sh, (reg)) -#define CSR_READ_4(sc, reg) \ - bus_space_read_4((sc)->sc_st, (sc)->sc_sh, (reg)) -#define CSR_WRITE_1(sc, reg, val) \ - bus_space_write_1((sc)->sc_st, (sc)->sc_sh, (reg), (val)) -#define CSR_WRITE_2(sc, reg, val) \ - bus_space_write_2((sc)->sc_st, (sc)->sc_sh, (reg), (val)) -#define CSR_WRITE_4(sc, reg, val) \ - bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (reg), (val)) - -#define sc_if arpcom.ac_if -#define FXP_UNIT(_sc) (_sc)->arpcom.ac_if.if_unit -#define FXP_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx) -#define FXP_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx) |