diff options
Diffstat (limited to 'clang/lib/Basic/Targets/ARM.cpp')
| -rw-r--r-- | clang/lib/Basic/Targets/ARM.cpp | 57 |
1 files changed, 43 insertions, 14 deletions
diff --git a/clang/lib/Basic/Targets/ARM.cpp b/clang/lib/Basic/Targets/ARM.cpp index b2f61cff81c9..f11751a76073 100644 --- a/clang/lib/Basic/Targets/ARM.cpp +++ b/clang/lib/Basic/Targets/ARM.cpp @@ -214,6 +214,8 @@ StringRef ARMTargetInfo::getCPUAttr() const { return "8_7A"; case llvm::ARM::ArchKind::ARMV8_8A: return "8_8A"; + case llvm::ARM::ArchKind::ARMV8_9A: + return "8_9A"; case llvm::ARM::ArchKind::ARMV9A: return "9A"; case llvm::ARM::ArchKind::ARMV9_1A: @@ -222,6 +224,8 @@ StringRef ARMTargetInfo::getCPUAttr() const { return "9_2A"; case llvm::ARM::ArchKind::ARMV9_3A: return "9_3A"; + case llvm::ARM::ArchKind::ARMV9_4A: + return "9_4A"; case llvm::ARM::ArchKind::ARMV8MBaseline: return "8M_BASE"; case llvm::ARM::ArchKind::ARMV8MMainline: @@ -431,6 +435,19 @@ bool ARMTargetInfo::initFeatureMap( if (CPUArch != llvm::ARM::ArchKind::INVALID) { ArchFeature = ("+" + llvm::ARM::getArchName(CPUArch)).str(); TargetFeatures.push_back(ArchFeature); + + // These features are added to allow arm_neon.h target(..) attributes to + // match with both arm and aarch64. We need to add all previous architecture + // versions, so that "8.6" also allows "8.1" functions. In case of v9.x the + // v8.x counterparts are added too. We only need these for anything > 8.0-A. + for (llvm::ARM::ArchKind I = llvm::ARM::convertV9toV8(CPUArch); + I != llvm::ARM::ArchKind::INVALID; --I) + Features[llvm::ARM::getSubArch(I)] = true; + if (CPUArch > llvm::ARM::ArchKind::ARMV8A && + CPUArch <= llvm::ARM::ArchKind::ARMV9_3A) + for (llvm::ARM::ArchKind I = CPUArch; I != llvm::ARM::ArchKind::INVALID; + --I) + Features[llvm::ARM::getSubArch(I)] = true; } // get default FPU features @@ -580,6 +597,8 @@ bool ARMTargetInfo::handleTargetFeatures(std::vector<std::string> &Features, } } + HalfArgsAndReturns = true; + switch (ArchVersion) { case 6: if (ArchProfile == llvm::ARM::ProfileKind::M) @@ -628,7 +647,8 @@ bool ARMTargetInfo::hasFeature(StringRef Feature) const { } bool ARMTargetInfo::hasBFloat16Type() const { - return HasBFloat16 && !SoftFloat; + // The __bf16 type is generally available so long as we have any fp registers. + return HasBFloat16 || (FPU && !SoftFloat); } bool ARMTargetInfo::isValidCPUName(StringRef Name) const { @@ -689,8 +709,11 @@ void ARMTargetInfo::getTargetDefines(const LangOptions &Opts, // For bare-metal none-eabi. if (getTriple().getOS() == llvm::Triple::UnknownOS && (getTriple().getEnvironment() == llvm::Triple::EABI || - getTriple().getEnvironment() == llvm::Triple::EABIHF)) + getTriple().getEnvironment() == llvm::Triple::EABIHF)) { Builder.defineMacro("__ELF__"); + if (Opts.CPlusPlus) + Builder.defineMacro("_GNU_SOURCE"); + } // Target properties. Builder.defineMacro("__REGISTER_PREFIX__", ""); @@ -798,7 +821,7 @@ void ARMTargetInfo::getTargetDefines(const LangOptions &Opts, if ((!SoftFloat && !SoftFloatABI) || ABI == "aapcs-vfp" || ABI == "aapcs16") Builder.defineMacro("__ARM_PCS_VFP", "1"); - if (SoftFloat) + if (SoftFloat || (SoftFloatABI && !FPU)) Builder.defineMacro("__SOFTFP__"); // ACLE position independent code macros. @@ -957,36 +980,42 @@ void ARMTargetInfo::getTargetDefines(const LangOptions &Opts, case llvm::ARM::ArchKind::ARMV8_6A: case llvm::ARM::ArchKind::ARMV8_7A: case llvm::ARM::ArchKind::ARMV8_8A: + case llvm::ARM::ArchKind::ARMV8_9A: case llvm::ARM::ArchKind::ARMV9A: case llvm::ARM::ArchKind::ARMV9_1A: case llvm::ARM::ArchKind::ARMV9_2A: case llvm::ARM::ArchKind::ARMV9_3A: + case llvm::ARM::ArchKind::ARMV9_4A: getTargetDefinesARMV83A(Opts, Builder); break; } } -const Builtin::Info ARMTargetInfo::BuiltinInfo[] = { +static constexpr Builtin::Info BuiltinInfo[] = { #define BUILTIN(ID, TYPE, ATTRS) \ - {#ID, TYPE, ATTRS, nullptr, ALL_LANGUAGES, nullptr}, + {#ID, TYPE, ATTRS, nullptr, HeaderDesc::NO_HEADER, ALL_LANGUAGES}, #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) \ - {#ID, TYPE, ATTRS, HEADER, ALL_LANGUAGES, nullptr}, + {#ID, TYPE, ATTRS, nullptr, HeaderDesc::HEADER, ALL_LANGUAGES}, +#define TARGET_BUILTIN(ID, TYPE, ATTRS, FEATURE) \ + {#ID, TYPE, ATTRS, FEATURE, HeaderDesc::NO_HEADER, ALL_LANGUAGES}, #include "clang/Basic/BuiltinsNEON.def" #define BUILTIN(ID, TYPE, ATTRS) \ - {#ID, TYPE, ATTRS, nullptr, ALL_LANGUAGES, nullptr}, + {#ID, TYPE, ATTRS, nullptr, HeaderDesc::NO_HEADER, ALL_LANGUAGES}, #define LANGBUILTIN(ID, TYPE, ATTRS, LANG) \ - {#ID, TYPE, ATTRS, nullptr, LANG, nullptr}, + {#ID, TYPE, ATTRS, nullptr, HeaderDesc::NO_HEADER, LANG}, #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) \ - {#ID, TYPE, ATTRS, HEADER, ALL_LANGUAGES, nullptr}, + {#ID, TYPE, ATTRS, nullptr, HeaderDesc::HEADER, ALL_LANGUAGES}, +#define TARGET_BUILTIN(ID, TYPE, ATTRS, FEATURE) \ + {#ID, TYPE, ATTRS, FEATURE, HeaderDesc::NO_HEADER, ALL_LANGUAGES}, #define TARGET_HEADER_BUILTIN(ID, TYPE, ATTRS, HEADER, LANGS, FEATURE) \ - {#ID, TYPE, ATTRS, HEADER, LANGS, FEATURE}, + {#ID, TYPE, ATTRS, FEATURE, HeaderDesc::HEADER, LANGS}, #include "clang/Basic/BuiltinsARM.def" }; ArrayRef<Builtin::Info> ARMTargetInfo::getTargetBuiltins() const { - return llvm::makeArrayRef(BuiltinInfo, clang::ARM::LastTSBuiltin - - Builtin::FirstTSBuiltin); + return llvm::ArrayRef(BuiltinInfo, + clang::ARM::LastTSBuiltin - Builtin::FirstTSBuiltin); } bool ARMTargetInfo::isCLZForZeroUndef() const { return false; } @@ -1017,7 +1046,7 @@ const char *const ARMTargetInfo::GCCRegNames[] = { "q12", "q13", "q14", "q15"}; ArrayRef<const char *> ARMTargetInfo::getGCCRegNames() const { - return llvm::makeArrayRef(GCCRegNames); + return llvm::ArrayRef(GCCRegNames); } const TargetInfo::GCCRegAlias ARMTargetInfo::GCCRegAliases[] = { @@ -1030,7 +1059,7 @@ const TargetInfo::GCCRegAlias ARMTargetInfo::GCCRegAliases[] = { }; ArrayRef<TargetInfo::GCCRegAlias> ARMTargetInfo::getGCCRegAliases() const { - return llvm::makeArrayRef(GCCRegAliases); + return llvm::ArrayRef(GCCRegAliases); } bool ARMTargetInfo::validateAsmConstraint( |