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-rw-r--r--contrib/llvm-project/llvm/include/llvm/IR/IntrinsicsRISCV.td2
1 files changed, 1 insertions, 1 deletions
diff --git a/contrib/llvm-project/llvm/include/llvm/IR/IntrinsicsRISCV.td b/contrib/llvm-project/llvm/include/llvm/IR/IntrinsicsRISCV.td
index fc830fca392f..a391bc53cdb0 100644
--- a/contrib/llvm-project/llvm/include/llvm/IR/IntrinsicsRISCV.td
+++ b/contrib/llvm-project/llvm/include/llvm/IR/IntrinsicsRISCV.td
@@ -702,7 +702,7 @@ let TargetPrefix = "riscv" in {
LLVMMatchType<2>, LLVMMatchType<2>],
[ImmArg<ArgIndex<4>>,ImmArg<ArgIndex<6>>, IntrNoMem, IntrHasSideEffects]>,
RISCVVIntrinsic {
- let VLOperand = 6;
+ let VLOperand = 5;
}
// For Saturating binary operations.
// The destination vector type is NOT the same as first source vector.