aboutsummaryrefslogtreecommitdiff
path: root/contrib/llvm-project/llvm/lib/Target/AArch64/AArch64SelectionDAGInfo.cpp
diff options
context:
space:
mode:
Diffstat (limited to 'contrib/llvm-project/llvm/lib/Target/AArch64/AArch64SelectionDAGInfo.cpp')
-rw-r--r--contrib/llvm-project/llvm/lib/Target/AArch64/AArch64SelectionDAGInfo.cpp27
1 files changed, 13 insertions, 14 deletions
diff --git a/contrib/llvm-project/llvm/lib/Target/AArch64/AArch64SelectionDAGInfo.cpp b/contrib/llvm-project/llvm/lib/Target/AArch64/AArch64SelectionDAGInfo.cpp
index 677797a6797b..1a76f354589e 100644
--- a/contrib/llvm-project/llvm/lib/Target/AArch64/AArch64SelectionDAGInfo.cpp
+++ b/contrib/llvm-project/llvm/lib/Target/AArch64/AArch64SelectionDAGInfo.cpp
@@ -46,21 +46,16 @@ SDValue AArch64SelectionDAGInfo::EmitMOPS(AArch64ISD::NodeType SDOpcode,
}
}();
- MachineMemOperand::Flags Flags = MachineMemOperand::MOStore;
- if (isVolatile)
- Flags |= MachineMemOperand::MOVolatile;
- if (!IsSet)
- Flags |= MachineMemOperand::MOLoad;
-
MachineFunction &MF = DAG.getMachineFunction();
+ auto Vol =
+ isVolatile ? MachineMemOperand::MOVolatile : MachineMemOperand::MONone;
+ auto DstFlags = MachineMemOperand::MOStore | Vol;
auto *DstOp =
- MF.getMachineMemOperand(DstPtrInfo, Flags, ConstSize, Alignment);
- auto *SrcOp =
- MF.getMachineMemOperand(SrcPtrInfo, Flags, ConstSize, Alignment);
+ MF.getMachineMemOperand(DstPtrInfo, DstFlags, ConstSize, Alignment);
if (IsSet) {
- // Extend value to i64 if required
+ // Extend value to i64, if required.
if (SrcOrValue.getValueType() != MVT::i64)
SrcOrValue = DAG.getNode(ISD::ANY_EXTEND, DL, MVT::i64, SrcOrValue);
SDValue Ops[] = {Dst, Size, SrcOrValue, Chain};
@@ -72,6 +67,10 @@ SDValue AArch64SelectionDAGInfo::EmitMOPS(AArch64ISD::NodeType SDOpcode,
SDValue Ops[] = {Dst, SrcOrValue, Size, Chain};
const EVT ResultTys[] = {MVT::i64, MVT::i64, MVT::i64, MVT::Other};
MachineSDNode *Node = DAG.getMachineNode(MachineOpcode, DL, ResultTys, Ops);
+
+ auto SrcFlags = MachineMemOperand::MOLoad | Vol;
+ auto *SrcOp =
+ MF.getMachineMemOperand(SrcPtrInfo, SrcFlags, ConstSize, Alignment);
DAG.setNodeMemRefs(Node, {DstOp, SrcOp});
return SDValue(Node, 3);
}
@@ -141,8 +140,8 @@ static SDValue EmitUnrolledSetTag(SelectionDAG &DAG, const SDLoc &dl,
unsigned OffsetScaled = 0;
while (OffsetScaled < ObjSizeScaled) {
if (ObjSizeScaled - OffsetScaled >= 2) {
- SDValue AddrNode =
- DAG.getMemBasePlusOffset(Ptr, TypeSize::Fixed(OffsetScaled * 16), dl);
+ SDValue AddrNode = DAG.getMemBasePlusOffset(
+ Ptr, TypeSize::getFixed(OffsetScaled * 16), dl);
SDValue St = DAG.getMemIntrinsicNode(
OpCode2, dl, DAG.getVTList(MVT::Other),
{Chain, TagSrc, AddrNode},
@@ -154,8 +153,8 @@ static SDValue EmitUnrolledSetTag(SelectionDAG &DAG, const SDLoc &dl,
}
if (ObjSizeScaled - OffsetScaled > 0) {
- SDValue AddrNode =
- DAG.getMemBasePlusOffset(Ptr, TypeSize::Fixed(OffsetScaled * 16), dl);
+ SDValue AddrNode = DAG.getMemBasePlusOffset(
+ Ptr, TypeSize::getFixed(OffsetScaled * 16), dl);
SDValue St = DAG.getMemIntrinsicNode(
OpCode1, dl, DAG.getVTList(MVT::Other),
{Chain, TagSrc, AddrNode},