diff options
Diffstat (limited to 'contrib/llvm-project/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp')
| -rw-r--r-- | contrib/llvm-project/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp | 866 |
1 files changed, 375 insertions, 491 deletions
diff --git a/contrib/llvm-project/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp b/contrib/llvm-project/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp index 9a66dd77c0d3..4e40a84ecfd0 100644 --- a/contrib/llvm-project/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp +++ b/contrib/llvm-project/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp @@ -15,8 +15,8 @@ #include "TargetInfo/MipsTargetInfo.h" #include "llvm/ADT/ArrayRef.h" #include "llvm/MC/MCContext.h" +#include "llvm/MC/MCDecoderOps.h" #include "llvm/MC/MCDisassembler/MCDisassembler.h" -#include "llvm/MC/MCFixedLenDisassembler.h" #include "llvm/MC/MCInst.h" #include "llvm/MC/MCRegisterInfo.h" #include "llvm/MC/MCSubtargetInfo.h" @@ -79,338 +79,279 @@ public: // Forward declare these because the autogenerated code will reference them. // Definitions are further down. -static DecodeStatus DecodeGPR64RegisterClass(MCInst &Inst, - unsigned RegNo, +static DecodeStatus DecodeGPR64RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, - const void *Decoder); + const MCDisassembler *Decoder); -static DecodeStatus DecodeCPU16RegsRegisterClass(MCInst &Inst, - unsigned RegNo, +static DecodeStatus DecodeCPU16RegsRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, - const void *Decoder); + const MCDisassembler *Decoder); -static DecodeStatus DecodeGPRMM16RegisterClass(MCInst &Inst, - unsigned RegNo, +static DecodeStatus DecodeGPRMM16RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, - const void *Decoder); + const MCDisassembler *Decoder); -static DecodeStatus DecodeGPRMM16ZeroRegisterClass(MCInst &Inst, - unsigned RegNo, - uint64_t Address, - const void *Decoder); +static DecodeStatus +DecodeGPRMM16ZeroRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, + const MCDisassembler *Decoder); -static DecodeStatus DecodeGPRMM16MovePRegisterClass(MCInst &Inst, - unsigned RegNo, - uint64_t Address, - const void *Decoder); +static DecodeStatus +DecodeGPRMM16MovePRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, + const MCDisassembler *Decoder); -static DecodeStatus DecodeGPR32RegisterClass(MCInst &Inst, - unsigned RegNo, +static DecodeStatus DecodeGPR32RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, - const void *Decoder); + const MCDisassembler *Decoder); -static DecodeStatus DecodePtrRegisterClass(MCInst &Inst, - unsigned Insn, +static DecodeStatus DecodePtrRegisterClass(MCInst &Inst, unsigned Insn, uint64_t Address, - const void *Decoder); + const MCDisassembler *Decoder); -static DecodeStatus DecodeDSPRRegisterClass(MCInst &Inst, - unsigned RegNo, +static DecodeStatus DecodeDSPRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, - const void *Decoder); + const MCDisassembler *Decoder); -static DecodeStatus DecodeFGR64RegisterClass(MCInst &Inst, - unsigned RegNo, +static DecodeStatus DecodeFGR64RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, - const void *Decoder); + const MCDisassembler *Decoder); -static DecodeStatus DecodeFGR32RegisterClass(MCInst &Inst, - unsigned RegNo, +static DecodeStatus DecodeFGR32RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, - const void *Decoder); + const MCDisassembler *Decoder); -static DecodeStatus DecodeCCRRegisterClass(MCInst &Inst, - unsigned RegNo, +static DecodeStatus DecodeCCRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, - const void *Decoder); + const MCDisassembler *Decoder); -static DecodeStatus DecodeFCCRegisterClass(MCInst &Inst, - unsigned RegNo, +static DecodeStatus DecodeFCCRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, - const void *Decoder); + const MCDisassembler *Decoder); static DecodeStatus DecodeFGRCCRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, - const void *Decoder); + const MCDisassembler *Decoder); -static DecodeStatus DecodeHWRegsRegisterClass(MCInst &Inst, - unsigned Insn, +static DecodeStatus DecodeHWRegsRegisterClass(MCInst &Inst, unsigned Insn, uint64_t Address, - const void *Decoder); + const MCDisassembler *Decoder); -static DecodeStatus DecodeAFGR64RegisterClass(MCInst &Inst, - unsigned RegNo, +static DecodeStatus DecodeAFGR64RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, - const void *Decoder); + const MCDisassembler *Decoder); -static DecodeStatus DecodeACC64DSPRegisterClass(MCInst &Inst, - unsigned RegNo, +static DecodeStatus DecodeACC64DSPRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, - const void *Decoder); + const MCDisassembler *Decoder); -static DecodeStatus DecodeHI32DSPRegisterClass(MCInst &Inst, - unsigned RegNo, +static DecodeStatus DecodeHI32DSPRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, - const void *Decoder); + const MCDisassembler *Decoder); -static DecodeStatus DecodeLO32DSPRegisterClass(MCInst &Inst, - unsigned RegNo, +static DecodeStatus DecodeLO32DSPRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, - const void *Decoder); + const MCDisassembler *Decoder); -static DecodeStatus DecodeMSA128BRegisterClass(MCInst &Inst, - unsigned RegNo, +static DecodeStatus DecodeMSA128BRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, - const void *Decoder); + const MCDisassembler *Decoder); -static DecodeStatus DecodeMSA128HRegisterClass(MCInst &Inst, - unsigned RegNo, +static DecodeStatus DecodeMSA128HRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, - const void *Decoder); + const MCDisassembler *Decoder); -static DecodeStatus DecodeMSA128WRegisterClass(MCInst &Inst, - unsigned RegNo, +static DecodeStatus DecodeMSA128WRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, - const void *Decoder); + const MCDisassembler *Decoder); -static DecodeStatus DecodeMSA128DRegisterClass(MCInst &Inst, - unsigned RegNo, +static DecodeStatus DecodeMSA128DRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, - const void *Decoder); + const MCDisassembler *Decoder); -static DecodeStatus DecodeMSACtrlRegisterClass(MCInst &Inst, - unsigned RegNo, +static DecodeStatus DecodeMSACtrlRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, - const void *Decoder); + const MCDisassembler *Decoder); -static DecodeStatus DecodeCOP0RegisterClass(MCInst &Inst, - unsigned RegNo, +static DecodeStatus DecodeCOP0RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, - const void *Decoder); + const MCDisassembler *Decoder); -static DecodeStatus DecodeCOP2RegisterClass(MCInst &Inst, - unsigned RegNo, +static DecodeStatus DecodeCOP2RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, - const void *Decoder); + const MCDisassembler *Decoder); -static DecodeStatus DecodeBranchTarget(MCInst &Inst, - unsigned Offset, +static DecodeStatus DecodeBranchTarget(MCInst &Inst, unsigned Offset, uint64_t Address, - const void *Decoder); + const MCDisassembler *Decoder); -static DecodeStatus DecodeBranchTarget1SImm16(MCInst &Inst, - unsigned Offset, +static DecodeStatus DecodeBranchTarget1SImm16(MCInst &Inst, unsigned Offset, uint64_t Address, - const void *Decoder); + const MCDisassembler *Decoder); -static DecodeStatus DecodeJumpTarget(MCInst &Inst, - unsigned Insn, +static DecodeStatus DecodeJumpTarget(MCInst &Inst, unsigned Insn, uint64_t Address, - const void *Decoder); + const MCDisassembler *Decoder); -static DecodeStatus DecodeBranchTarget21(MCInst &Inst, - unsigned Offset, +static DecodeStatus DecodeBranchTarget21(MCInst &Inst, unsigned Offset, uint64_t Address, - const void *Decoder); + const MCDisassembler *Decoder); -static DecodeStatus DecodeBranchTarget21MM(MCInst &Inst, - unsigned Offset, +static DecodeStatus DecodeBranchTarget21MM(MCInst &Inst, unsigned Offset, uint64_t Address, - const void *Decoder); + const MCDisassembler *Decoder); -static DecodeStatus DecodeBranchTarget26(MCInst &Inst, - unsigned Offset, +static DecodeStatus DecodeBranchTarget26(MCInst &Inst, unsigned Offset, uint64_t Address, - const void *Decoder); + const MCDisassembler *Decoder); // DecodeBranchTarget7MM - Decode microMIPS branch offset, which is // shifted left by 1 bit. -static DecodeStatus DecodeBranchTarget7MM(MCInst &Inst, - unsigned Offset, +static DecodeStatus DecodeBranchTarget7MM(MCInst &Inst, unsigned Offset, uint64_t Address, - const void *Decoder); + const MCDisassembler *Decoder); // DecodeBranchTarget10MM - Decode microMIPS branch offset, which is // shifted left by 1 bit. -static DecodeStatus DecodeBranchTarget10MM(MCInst &Inst, - unsigned Offset, +static DecodeStatus DecodeBranchTarget10MM(MCInst &Inst, unsigned Offset, uint64_t Address, - const void *Decoder); + const MCDisassembler *Decoder); // DecodeBranchTargetMM - Decode microMIPS branch offset, which is // shifted left by 1 bit. -static DecodeStatus DecodeBranchTargetMM(MCInst &Inst, - unsigned Offset, +static DecodeStatus DecodeBranchTargetMM(MCInst &Inst, unsigned Offset, uint64_t Address, - const void *Decoder); + const MCDisassembler *Decoder); // DecodeBranchTarget26MM - Decode microMIPS branch offset, which is // shifted left by 1 bit. -static DecodeStatus DecodeBranchTarget26MM(MCInst &Inst, - unsigned Offset, +static DecodeStatus DecodeBranchTarget26MM(MCInst &Inst, unsigned Offset, uint64_t Address, - const void *Decoder); + const MCDisassembler *Decoder); // DecodeJumpTargetMM - Decode microMIPS jump target, which is // shifted left by 1 bit. -static DecodeStatus DecodeJumpTargetMM(MCInst &Inst, - unsigned Insn, +static DecodeStatus DecodeJumpTargetMM(MCInst &Inst, unsigned Insn, uint64_t Address, - const void *Decoder); + const MCDisassembler *Decoder); // DecodeJumpTargetXMM - Decode microMIPS jump and link exchange target, // which is shifted left by 2 bit. -static DecodeStatus DecodeJumpTargetXMM(MCInst &Inst, - unsigned Insn, +static DecodeStatus DecodeJumpTargetXMM(MCInst &Inst, unsigned Insn, uint64_t Address, - const void *Decoder); + const MCDisassembler *Decoder); -static DecodeStatus DecodeMem(MCInst &Inst, - unsigned Insn, - uint64_t Address, - const void *Decoder); +static DecodeStatus DecodeMem(MCInst &Inst, unsigned Insn, uint64_t Address, + const MCDisassembler *Decoder); -static DecodeStatus DecodeMemEVA(MCInst &Inst, - unsigned Insn, - uint64_t Address, - const void *Decoder); +static DecodeStatus DecodeMemEVA(MCInst &Inst, unsigned Insn, uint64_t Address, + const MCDisassembler *Decoder); -static DecodeStatus DecodeLoadByte15(MCInst &Inst, - unsigned Insn, +static DecodeStatus DecodeLoadByte15(MCInst &Inst, unsigned Insn, uint64_t Address, - const void *Decoder); + const MCDisassembler *Decoder); static DecodeStatus DecodeCacheOp(MCInst &Inst, unsigned Insn, uint64_t Address, - const void *Decoder); + const MCDisassembler *Decoder); -static DecodeStatus DecodeCacheeOp_CacheOpR6(MCInst &Inst, - unsigned Insn, +static DecodeStatus DecodeCacheeOp_CacheOpR6(MCInst &Inst, unsigned Insn, uint64_t Address, - const void *Decoder); + const MCDisassembler *Decoder); -static DecodeStatus DecodeCacheOpMM(MCInst &Inst, - unsigned Insn, +static DecodeStatus DecodeCacheOpMM(MCInst &Inst, unsigned Insn, uint64_t Address, - const void *Decoder); + const MCDisassembler *Decoder); -static DecodeStatus DecodePrefeOpMM(MCInst &Inst, - unsigned Insn, +static DecodeStatus DecodePrefeOpMM(MCInst &Inst, unsigned Insn, uint64_t Address, - const void *Decoder); + const MCDisassembler *Decoder); -static DecodeStatus DecodeSyncI(MCInst &Inst, - unsigned Insn, - uint64_t Address, - const void *Decoder); +static DecodeStatus DecodeSyncI(MCInst &Inst, unsigned Insn, uint64_t Address, + const MCDisassembler *Decoder); -static DecodeStatus DecodeSyncI_MM(MCInst &Inst, - unsigned Insn, +static DecodeStatus DecodeSyncI_MM(MCInst &Inst, unsigned Insn, uint64_t Address, - const void *Decoder); + const MCDisassembler *Decoder); -static DecodeStatus DecodeSynciR6(MCInst &Inst, - unsigned Insn, - uint64_t Address, - const void *Decoder); +static DecodeStatus DecodeSynciR6(MCInst &Inst, unsigned Insn, uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeMSA128Mem(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); -static DecodeStatus DecodeMemMMImm4(MCInst &Inst, - unsigned Insn, +static DecodeStatus DecodeMemMMImm4(MCInst &Inst, unsigned Insn, uint64_t Address, - const void *Decoder); + const MCDisassembler *Decoder); -static DecodeStatus DecodeMemMMSPImm5Lsl2(MCInst &Inst, - unsigned Insn, +static DecodeStatus DecodeMemMMSPImm5Lsl2(MCInst &Inst, unsigned Insn, uint64_t Address, - const void *Decoder); + const MCDisassembler *Decoder); -static DecodeStatus DecodeMemMMGPImm7Lsl2(MCInst &Inst, - unsigned Insn, +static DecodeStatus DecodeMemMMGPImm7Lsl2(MCInst &Inst, unsigned Insn, uint64_t Address, - const void *Decoder); + const MCDisassembler *Decoder); -static DecodeStatus DecodeMemMMReglistImm4Lsl2(MCInst &Inst, - unsigned Insn, +static DecodeStatus DecodeMemMMReglistImm4Lsl2(MCInst &Inst, unsigned Insn, uint64_t Address, - const void *Decoder); + const MCDisassembler *Decoder); -static DecodeStatus DecodeMemMMImm9(MCInst &Inst, - unsigned Insn, +static DecodeStatus DecodeMemMMImm9(MCInst &Inst, unsigned Insn, uint64_t Address, - const void *Decoder); + const MCDisassembler *Decoder); -static DecodeStatus DecodeMemMMImm12(MCInst &Inst, - unsigned Insn, +static DecodeStatus DecodeMemMMImm12(MCInst &Inst, unsigned Insn, uint64_t Address, - const void *Decoder); + const MCDisassembler *Decoder); -static DecodeStatus DecodeMemMMImm16(MCInst &Inst, - unsigned Insn, +static DecodeStatus DecodeMemMMImm16(MCInst &Inst, unsigned Insn, uint64_t Address, - const void *Decoder); + const MCDisassembler *Decoder); -static DecodeStatus DecodeFMem(MCInst &Inst, unsigned Insn, - uint64_t Address, - const void *Decoder); +static DecodeStatus DecodeFMem(MCInst &Inst, unsigned Insn, uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeFMemMMR2(MCInst &Inst, unsigned Insn, uint64_t Address, - const void *Decoder); + const MCDisassembler *Decoder); static DecodeStatus DecodeFMem2(MCInst &Inst, unsigned Insn, uint64_t Address, - const void *Decoder); + const MCDisassembler *Decoder); static DecodeStatus DecodeFMem3(MCInst &Inst, unsigned Insn, uint64_t Address, - const void *Decoder); + const MCDisassembler *Decoder); static DecodeStatus DecodeFMemCop2R6(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeFMemCop2MMR6(MCInst &Inst, unsigned Insn, uint64_t Address, - const void *Decoder); + const MCDisassembler *Decoder); -static DecodeStatus DecodeSpecial3LlSc(MCInst &Inst, - unsigned Insn, +static DecodeStatus DecodeSpecial3LlSc(MCInst &Inst, unsigned Insn, uint64_t Address, - const void *Decoder); + const MCDisassembler *Decoder); -static DecodeStatus DecodeAddiur2Simm7(MCInst &Inst, - unsigned Value, +static DecodeStatus DecodeAddiur2Simm7(MCInst &Inst, unsigned Value, uint64_t Address, - const void *Decoder); + const MCDisassembler *Decoder); -static DecodeStatus DecodeLi16Imm(MCInst &Inst, - unsigned Value, +static DecodeStatus DecodeLi16Imm(MCInst &Inst, unsigned Value, uint64_t Address, - const void *Decoder); + const MCDisassembler *Decoder); -static DecodeStatus DecodePOOL16BEncodedField(MCInst &Inst, - unsigned Value, +static DecodeStatus DecodePOOL16BEncodedField(MCInst &Inst, unsigned Value, uint64_t Address, - const void *Decoder); + const MCDisassembler *Decoder); template <unsigned Bits, int Offset, int Scale> static DecodeStatus DecodeUImmWithOffsetAndScale(MCInst &Inst, unsigned Value, uint64_t Address, - const void *Decoder); + const MCDisassembler *Decoder); template <unsigned Bits, int Offset> static DecodeStatus DecodeUImmWithOffset(MCInst &Inst, unsigned Value, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { return DecodeUImmWithOffsetAndScale<Bits, Offset, 1>(Inst, Value, Address, Decoder); } @@ -418,128 +359,132 @@ static DecodeStatus DecodeUImmWithOffset(MCInst &Inst, unsigned Value, template <unsigned Bits, int Offset = 0, int ScaleBy = 1> static DecodeStatus DecodeSImmWithOffsetAndScale(MCInst &Inst, unsigned Value, uint64_t Address, - const void *Decoder); + const MCDisassembler *Decoder); -static DecodeStatus DecodeInsSize(MCInst &Inst, - unsigned Insn, - uint64_t Address, - const void *Decoder); +static DecodeStatus DecodeInsSize(MCInst &Inst, unsigned Insn, uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeSimm19Lsl2(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeSimm18Lsl3(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); -static DecodeStatus DecodeSimm9SP(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder); +static DecodeStatus DecodeSimm9SP(MCInst &Inst, unsigned Insn, uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeANDI16Imm(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeSimm23Lsl2(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); /// INSVE_[BHWD] have an implicit operand that the generated decoder doesn't /// handle. template <typename InsnType> static DecodeStatus DecodeINSVE_DF(MCInst &MI, InsnType insn, uint64_t Address, - const void *Decoder); + const MCDisassembler *Decoder); template <typename InsnType> static DecodeStatus DecodeDAHIDATIMMR6(MCInst &MI, InsnType insn, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); template <typename InsnType> static DecodeStatus DecodeDAHIDATI(MCInst &MI, InsnType insn, uint64_t Address, - const void *Decoder); + const MCDisassembler *Decoder); template <typename InsnType> -static DecodeStatus -DecodeAddiGroupBranch(MCInst &MI, InsnType insn, uint64_t Address, - const void *Decoder); +static DecodeStatus DecodeAddiGroupBranch(MCInst &MI, InsnType insn, + uint64_t Address, + const MCDisassembler *Decoder); template <typename InsnType> -static DecodeStatus -DecodePOP35GroupBranchMMR6(MCInst &MI, InsnType insn, uint64_t Address, - const void *Decoder); +static DecodeStatus DecodePOP35GroupBranchMMR6(MCInst &MI, InsnType insn, + uint64_t Address, + const MCDisassembler *Decoder); template <typename InsnType> -static DecodeStatus -DecodeDaddiGroupBranch(MCInst &MI, InsnType insn, uint64_t Address, - const void *Decoder); +static DecodeStatus DecodeDaddiGroupBranch(MCInst &MI, InsnType insn, + uint64_t Address, + const MCDisassembler *Decoder); template <typename InsnType> -static DecodeStatus -DecodePOP37GroupBranchMMR6(MCInst &MI, InsnType insn, uint64_t Address, - const void *Decoder); +static DecodeStatus DecodePOP37GroupBranchMMR6(MCInst &MI, InsnType insn, + uint64_t Address, + const MCDisassembler *Decoder); template <typename InsnType> -static DecodeStatus -DecodePOP65GroupBranchMMR6(MCInst &MI, InsnType insn, uint64_t Address, - const void *Decoder); +static DecodeStatus DecodePOP65GroupBranchMMR6(MCInst &MI, InsnType insn, + uint64_t Address, + const MCDisassembler *Decoder); template <typename InsnType> -static DecodeStatus -DecodePOP75GroupBranchMMR6(MCInst &MI, InsnType insn, uint64_t Address, - const void *Decoder); +static DecodeStatus DecodePOP75GroupBranchMMR6(MCInst &MI, InsnType insn, + uint64_t Address, + const MCDisassembler *Decoder); template <typename InsnType> -static DecodeStatus -DecodeBlezlGroupBranch(MCInst &MI, InsnType insn, uint64_t Address, - const void *Decoder); +static DecodeStatus DecodeBlezlGroupBranch(MCInst &MI, InsnType insn, + uint64_t Address, + const MCDisassembler *Decoder); template <typename InsnType> -static DecodeStatus -DecodeBgtzlGroupBranch(MCInst &MI, InsnType insn, uint64_t Address, - const void *Decoder); +static DecodeStatus DecodeBgtzlGroupBranch(MCInst &MI, InsnType insn, + uint64_t Address, + const MCDisassembler *Decoder); template <typename InsnType> -static DecodeStatus -DecodeBgtzGroupBranch(MCInst &MI, InsnType insn, uint64_t Address, - const void *Decoder); +static DecodeStatus DecodeBgtzGroupBranch(MCInst &MI, InsnType insn, + uint64_t Address, + const MCDisassembler *Decoder); template <typename InsnType> -static DecodeStatus -DecodeBlezGroupBranch(MCInst &MI, InsnType insn, uint64_t Address, - const void *Decoder); +static DecodeStatus DecodeBlezGroupBranch(MCInst &MI, InsnType insn, + uint64_t Address, + const MCDisassembler *Decoder); template <typename InsnType> -static DecodeStatus -DecodeBgtzGroupBranchMMR6(MCInst &MI, InsnType insn, uint64_t Address, - const void *Decoder); +static DecodeStatus DecodeBgtzGroupBranchMMR6(MCInst &MI, InsnType insn, + uint64_t Address, + const MCDisassembler *Decoder); template <typename InsnType> -static DecodeStatus -DecodeBlezGroupBranchMMR6(MCInst &MI, InsnType insn, uint64_t Address, - const void *Decoder); +static DecodeStatus DecodeBlezGroupBranchMMR6(MCInst &MI, InsnType insn, + uint64_t Address, + const MCDisassembler *Decoder); template <typename InsnType> static DecodeStatus DecodeDINS(MCInst &MI, InsnType Insn, uint64_t Address, - const void *Decoder); + const MCDisassembler *Decoder); template <typename InsnType> static DecodeStatus DecodeDEXT(MCInst &MI, InsnType Insn, uint64_t Address, - const void *Decoder); + const MCDisassembler *Decoder); template <typename InsnType> static DecodeStatus DecodeCRC(MCInst &MI, InsnType Insn, uint64_t Address, - const void *Decoder); + const MCDisassembler *Decoder); static DecodeStatus DecodeRegListOperand(MCInst &Inst, unsigned Insn, uint64_t Address, - const void *Decoder); + const MCDisassembler *Decoder); static DecodeStatus DecodeRegListOperand16(MCInst &Inst, unsigned Insn, uint64_t Address, - const void *Decoder); + const MCDisassembler *Decoder); static DecodeStatus DecodeMovePRegPair(MCInst &Inst, unsigned RegPair, uint64_t Address, - const void *Decoder); + const MCDisassembler *Decoder); static DecodeStatus DecodeMovePOperands(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static MCDisassembler *createMipsDisassembler( const Target &T, @@ -569,16 +514,16 @@ extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeMipsDisassembler() { #include "MipsGenDisassemblerTables.inc" -static unsigned getReg(const void *D, unsigned RC, unsigned RegNo) { - const MipsDisassembler *Dis = static_cast<const MipsDisassembler*>(D); - const MCRegisterInfo *RegInfo = Dis->getContext().getRegisterInfo(); +static unsigned getReg(const MCDisassembler *D, unsigned RC, unsigned RegNo) { + const MCRegisterInfo *RegInfo = D->getContext().getRegisterInfo(); return *(RegInfo->getRegClass(RC).begin() + RegNo); } template <typename InsnType> static DecodeStatus DecodeINSVE_DF(MCInst &MI, InsnType insn, uint64_t Address, - const void *Decoder) { - using DecodeFN = DecodeStatus (*)(MCInst &, unsigned, uint64_t, const void *); + const MCDisassembler *Decoder) { + using DecodeFN = + DecodeStatus (*)(MCInst &, unsigned, uint64_t, const MCDisassembler *); // The size of the n field depends on the element size // The register class also depends on this. @@ -624,7 +569,8 @@ static DecodeStatus DecodeINSVE_DF(MCInst &MI, InsnType insn, uint64_t Address, template <typename InsnType> static DecodeStatus DecodeDAHIDATIMMR6(MCInst &MI, InsnType insn, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { InsnType Rs = fieldFromInstruction(insn, 16, 5); InsnType Imm = fieldFromInstruction(insn, 0, 16); MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR64RegClassID, @@ -638,7 +584,7 @@ static DecodeStatus DecodeDAHIDATIMMR6(MCInst &MI, InsnType insn, template <typename InsnType> static DecodeStatus DecodeDAHIDATI(MCInst &MI, InsnType insn, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { InsnType Rs = fieldFromInstruction(insn, 21, 5); InsnType Imm = fieldFromInstruction(insn, 0, 16); MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR64RegClassID, @@ -653,7 +599,7 @@ static DecodeStatus DecodeDAHIDATI(MCInst &MI, InsnType insn, uint64_t Address, template <typename InsnType> static DecodeStatus DecodeAddiGroupBranch(MCInst &MI, InsnType insn, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { // If we are called then we can assume that MIPS32r6/MIPS64r6 is enabled // (otherwise we would have matched the ADDI instruction from the earlier // ISA's instead). @@ -692,7 +638,7 @@ static DecodeStatus DecodeAddiGroupBranch(MCInst &MI, InsnType insn, template <typename InsnType> static DecodeStatus DecodePOP35GroupBranchMMR6(MCInst &MI, InsnType insn, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { InsnType Rt = fieldFromInstruction(insn, 21, 5); InsnType Rs = fieldFromInstruction(insn, 16, 5); int64_t Imm = 0; @@ -726,7 +672,7 @@ static DecodeStatus DecodePOP35GroupBranchMMR6(MCInst &MI, InsnType insn, template <typename InsnType> static DecodeStatus DecodeDaddiGroupBranch(MCInst &MI, InsnType insn, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { // If we are called then we can assume that MIPS32r6/MIPS64r6 is enabled // (otherwise we would have matched the ADDI instruction from the earlier // ISA's instead). @@ -765,7 +711,7 @@ static DecodeStatus DecodeDaddiGroupBranch(MCInst &MI, InsnType insn, template <typename InsnType> static DecodeStatus DecodePOP37GroupBranchMMR6(MCInst &MI, InsnType insn, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { InsnType Rt = fieldFromInstruction(insn, 21, 5); InsnType Rs = fieldFromInstruction(insn, 16, 5); int64_t Imm = 0; @@ -799,7 +745,7 @@ static DecodeStatus DecodePOP37GroupBranchMMR6(MCInst &MI, InsnType insn, template <typename InsnType> static DecodeStatus DecodePOP65GroupBranchMMR6(MCInst &MI, InsnType insn, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { // We have: // 0b110101 ttttt sssss iiiiiiiiiiiiiiii // Invalid if rt == 0 @@ -838,7 +784,7 @@ static DecodeStatus DecodePOP65GroupBranchMMR6(MCInst &MI, InsnType insn, template <typename InsnType> static DecodeStatus DecodePOP75GroupBranchMMR6(MCInst &MI, InsnType insn, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { // We have: // 0b111101 ttttt sssss iiiiiiiiiiiiiiii // Invalid if rt == 0 @@ -877,7 +823,7 @@ static DecodeStatus DecodePOP75GroupBranchMMR6(MCInst &MI, InsnType insn, template <typename InsnType> static DecodeStatus DecodeBlezlGroupBranch(MCInst &MI, InsnType insn, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { // If we are called then we can assume that MIPS32r6/MIPS64r6 is enabled // (otherwise we would have matched the BLEZL instruction from the earlier // ISA's instead). @@ -920,7 +866,7 @@ static DecodeStatus DecodeBlezlGroupBranch(MCInst &MI, InsnType insn, template <typename InsnType> static DecodeStatus DecodeBgtzlGroupBranch(MCInst &MI, InsnType insn, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { // If we are called then we can assume that MIPS32r6/MIPS64r6 is enabled // (otherwise we would have matched the BGTZL instruction from the earlier // ISA's instead). @@ -964,7 +910,7 @@ static DecodeStatus DecodeBgtzlGroupBranch(MCInst &MI, InsnType insn, template <typename InsnType> static DecodeStatus DecodeBgtzGroupBranch(MCInst &MI, InsnType insn, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { // If we are called then we can assume that MIPS32r6/MIPS64r6 is enabled // (otherwise we would have matched the BGTZ instruction from the earlier // ISA's instead). @@ -1012,8 +958,8 @@ static DecodeStatus DecodeBgtzGroupBranch(MCInst &MI, InsnType insn, template <typename InsnType> static DecodeStatus DecodeBlezGroupBranch(MCInst &MI, InsnType insn, - uint64_t Address, - const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { // If we are called then we can assume that MIPS32r6/MIPS64r6 is enabled // (otherwise we would have matched the BLEZL instruction from the earlier // ISA's instead). @@ -1056,7 +1002,7 @@ static DecodeStatus DecodeBlezGroupBranch(MCInst &MI, InsnType insn, // for feature / behaviour parity with binutils. template <typename InsnType> static DecodeStatus DecodeDEXT(MCInst &MI, InsnType Insn, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { unsigned Msbd = fieldFromInstruction(Insn, 11, 5); unsigned Lsb = fieldFromInstruction(Insn, 6, 5); unsigned Size = 0; @@ -1098,7 +1044,7 @@ static DecodeStatus DecodeDEXT(MCInst &MI, InsnType Insn, uint64_t Address, // for feature / behaviour parity with binutils. template <typename InsnType> static DecodeStatus DecodeDINS(MCInst &MI, InsnType Insn, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { unsigned Msbd = fieldFromInstruction(Insn, 11, 5); unsigned Lsb = fieldFromInstruction(Insn, 6, 5); unsigned Size = 0; @@ -1140,7 +1086,7 @@ static DecodeStatus DecodeDINS(MCInst &MI, InsnType Insn, uint64_t Address, // Auto-generated decoder wouldn't add the third operand for CRC32*. template <typename InsnType> static DecodeStatus DecodeCRC(MCInst &MI, InsnType Insn, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { InsnType Rs = fieldFromInstruction(Insn, 21, 5); InsnType Rt = fieldFromInstruction(Insn, 16, 5); MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, @@ -1384,17 +1330,15 @@ DecodeStatus MipsDisassembler::getInstruction(MCInst &Instr, uint64_t &Size, return MCDisassembler::Fail; } -static DecodeStatus DecodeCPU16RegsRegisterClass(MCInst &Inst, - unsigned RegNo, - uint64_t Address, - const void *Decoder) { +static DecodeStatus +DecodeCPU16RegsRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, + const MCDisassembler *Decoder) { return MCDisassembler::Fail; } -static DecodeStatus DecodeGPR64RegisterClass(MCInst &Inst, - unsigned RegNo, +static DecodeStatus DecodeGPR64RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { if (RegNo > 31) return MCDisassembler::Fail; @@ -1403,10 +1347,9 @@ static DecodeStatus DecodeGPR64RegisterClass(MCInst &Inst, return MCDisassembler::Success; } -static DecodeStatus DecodeGPRMM16RegisterClass(MCInst &Inst, - unsigned RegNo, +static DecodeStatus DecodeGPRMM16RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { if (RegNo > 7) return MCDisassembler::Fail; unsigned Reg = getReg(Decoder, Mips::GPRMM16RegClassID, RegNo); @@ -1414,10 +1357,9 @@ static DecodeStatus DecodeGPRMM16RegisterClass(MCInst &Inst, return MCDisassembler::Success; } -static DecodeStatus DecodeGPRMM16ZeroRegisterClass(MCInst &Inst, - unsigned RegNo, - uint64_t Address, - const void *Decoder) { +static DecodeStatus +DecodeGPRMM16ZeroRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, + const MCDisassembler *Decoder) { if (RegNo > 7) return MCDisassembler::Fail; unsigned Reg = getReg(Decoder, Mips::GPRMM16ZeroRegClassID, RegNo); @@ -1425,10 +1367,9 @@ static DecodeStatus DecodeGPRMM16ZeroRegisterClass(MCInst &Inst, return MCDisassembler::Success; } -static DecodeStatus DecodeGPRMM16MovePRegisterClass(MCInst &Inst, - unsigned RegNo, - uint64_t Address, - const void *Decoder) { +static DecodeStatus +DecodeGPRMM16MovePRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, + const MCDisassembler *Decoder) { if (RegNo > 7) return MCDisassembler::Fail; unsigned Reg = getReg(Decoder, Mips::GPRMM16MovePRegClassID, RegNo); @@ -1436,10 +1377,9 @@ static DecodeStatus DecodeGPRMM16MovePRegisterClass(MCInst &Inst, return MCDisassembler::Success; } -static DecodeStatus DecodeGPR32RegisterClass(MCInst &Inst, - unsigned RegNo, +static DecodeStatus DecodeGPR32RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { if (RegNo > 31) return MCDisassembler::Fail; unsigned Reg = getReg(Decoder, Mips::GPR32RegClassID, RegNo); @@ -1447,27 +1387,24 @@ static DecodeStatus DecodeGPR32RegisterClass(MCInst &Inst, return MCDisassembler::Success; } -static DecodeStatus DecodePtrRegisterClass(MCInst &Inst, - unsigned RegNo, +static DecodeStatus DecodePtrRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { if (static_cast<const MipsDisassembler *>(Decoder)->isGP64()) return DecodeGPR64RegisterClass(Inst, RegNo, Address, Decoder); return DecodeGPR32RegisterClass(Inst, RegNo, Address, Decoder); } -static DecodeStatus DecodeDSPRRegisterClass(MCInst &Inst, - unsigned RegNo, +static DecodeStatus DecodeDSPRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { return DecodeGPR32RegisterClass(Inst, RegNo, Address, Decoder); } -static DecodeStatus DecodeFGR64RegisterClass(MCInst &Inst, - unsigned RegNo, +static DecodeStatus DecodeFGR64RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { if (RegNo > 31) return MCDisassembler::Fail; @@ -1476,10 +1413,9 @@ static DecodeStatus DecodeFGR64RegisterClass(MCInst &Inst, return MCDisassembler::Success; } -static DecodeStatus DecodeFGR32RegisterClass(MCInst &Inst, - unsigned RegNo, +static DecodeStatus DecodeFGR32RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { if (RegNo > 31) return MCDisassembler::Fail; @@ -1488,10 +1424,9 @@ static DecodeStatus DecodeFGR32RegisterClass(MCInst &Inst, return MCDisassembler::Success; } -static DecodeStatus DecodeCCRRegisterClass(MCInst &Inst, - unsigned RegNo, +static DecodeStatus DecodeCCRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { if (RegNo > 31) return MCDisassembler::Fail; unsigned Reg = getReg(Decoder, Mips::CCRRegClassID, RegNo); @@ -1499,10 +1434,9 @@ static DecodeStatus DecodeCCRRegisterClass(MCInst &Inst, return MCDisassembler::Success; } -static DecodeStatus DecodeFCCRegisterClass(MCInst &Inst, - unsigned RegNo, +static DecodeStatus DecodeFCCRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { if (RegNo > 7) return MCDisassembler::Fail; unsigned Reg = getReg(Decoder, Mips::FCCRegClassID, RegNo); @@ -1512,7 +1446,7 @@ static DecodeStatus DecodeFCCRegisterClass(MCInst &Inst, static DecodeStatus DecodeFGRCCRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { if (RegNo > 31) return MCDisassembler::Fail; @@ -1521,10 +1455,8 @@ static DecodeStatus DecodeFGRCCRegisterClass(MCInst &Inst, unsigned RegNo, return MCDisassembler::Success; } -static DecodeStatus DecodeMem(MCInst &Inst, - unsigned Insn, - uint64_t Address, - const void *Decoder) { +static DecodeStatus DecodeMem(MCInst &Inst, unsigned Insn, uint64_t Address, + const MCDisassembler *Decoder) { int Offset = SignExtend32<16>(Insn & 0xffff); unsigned Reg = fieldFromInstruction(Insn, 16, 5); unsigned Base = fieldFromInstruction(Insn, 21, 5); @@ -1543,10 +1475,8 @@ static DecodeStatus DecodeMem(MCInst &Inst, return MCDisassembler::Success; } -static DecodeStatus DecodeMemEVA(MCInst &Inst, - unsigned Insn, - uint64_t Address, - const void *Decoder) { +static DecodeStatus DecodeMemEVA(MCInst &Inst, unsigned Insn, uint64_t Address, + const MCDisassembler *Decoder) { int Offset = SignExtend32<9>(Insn >> 7); unsigned Reg = fieldFromInstruction(Insn, 16, 5); unsigned Base = fieldFromInstruction(Insn, 21, 5); @@ -1564,10 +1494,9 @@ static DecodeStatus DecodeMemEVA(MCInst &Inst, return MCDisassembler::Success; } -static DecodeStatus DecodeLoadByte15(MCInst &Inst, - unsigned Insn, +static DecodeStatus DecodeLoadByte15(MCInst &Inst, unsigned Insn, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { int Offset = SignExtend32<16>(Insn & 0xffff); unsigned Base = fieldFromInstruction(Insn, 16, 5); unsigned Reg = fieldFromInstruction(Insn, 21, 5); @@ -1582,10 +1511,8 @@ static DecodeStatus DecodeLoadByte15(MCInst &Inst, return MCDisassembler::Success; } -static DecodeStatus DecodeCacheOp(MCInst &Inst, - unsigned Insn, - uint64_t Address, - const void *Decoder) { +static DecodeStatus DecodeCacheOp(MCInst &Inst, unsigned Insn, uint64_t Address, + const MCDisassembler *Decoder) { int Offset = SignExtend32<16>(Insn & 0xffff); unsigned Hint = fieldFromInstruction(Insn, 16, 5); unsigned Base = fieldFromInstruction(Insn, 21, 5); @@ -1599,10 +1526,9 @@ static DecodeStatus DecodeCacheOp(MCInst &Inst, return MCDisassembler::Success; } -static DecodeStatus DecodeCacheOpMM(MCInst &Inst, - unsigned Insn, +static DecodeStatus DecodeCacheOpMM(MCInst &Inst, unsigned Insn, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { int Offset = SignExtend32<12>(Insn & 0xfff); unsigned Base = fieldFromInstruction(Insn, 16, 5); unsigned Hint = fieldFromInstruction(Insn, 21, 5); @@ -1616,10 +1542,9 @@ static DecodeStatus DecodeCacheOpMM(MCInst &Inst, return MCDisassembler::Success; } -static DecodeStatus DecodePrefeOpMM(MCInst &Inst, - unsigned Insn, +static DecodeStatus DecodePrefeOpMM(MCInst &Inst, unsigned Insn, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { int Offset = SignExtend32<9>(Insn & 0x1ff); unsigned Base = fieldFromInstruction(Insn, 16, 5); unsigned Hint = fieldFromInstruction(Insn, 21, 5); @@ -1633,10 +1558,9 @@ static DecodeStatus DecodePrefeOpMM(MCInst &Inst, return MCDisassembler::Success; } -static DecodeStatus DecodeCacheeOp_CacheOpR6(MCInst &Inst, - unsigned Insn, +static DecodeStatus DecodeCacheeOp_CacheOpR6(MCInst &Inst, unsigned Insn, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { int Offset = SignExtend32<9>(Insn >> 7); unsigned Hint = fieldFromInstruction(Insn, 16, 5); unsigned Base = fieldFromInstruction(Insn, 21, 5); @@ -1650,10 +1574,8 @@ static DecodeStatus DecodeCacheeOp_CacheOpR6(MCInst &Inst, return MCDisassembler::Success; } -static DecodeStatus DecodeSyncI(MCInst &Inst, - unsigned Insn, - uint64_t Address, - const void *Decoder) { +static DecodeStatus DecodeSyncI(MCInst &Inst, unsigned Insn, uint64_t Address, + const MCDisassembler *Decoder) { int Offset = SignExtend32<16>(Insn & 0xffff); unsigned Base = fieldFromInstruction(Insn, 21, 5); @@ -1666,7 +1588,8 @@ static DecodeStatus DecodeSyncI(MCInst &Inst, } static DecodeStatus DecodeSyncI_MM(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { int Offset = SignExtend32<16>(Insn & 0xffff); unsigned Base = fieldFromInstruction(Insn, 16, 5); @@ -1678,10 +1601,8 @@ static DecodeStatus DecodeSyncI_MM(MCInst &Inst, unsigned Insn, return MCDisassembler::Success; } -static DecodeStatus DecodeSynciR6(MCInst &Inst, - unsigned Insn, - uint64_t Address, - const void *Decoder) { +static DecodeStatus DecodeSynciR6(MCInst &Inst, unsigned Insn, uint64_t Address, + const MCDisassembler *Decoder) { int Immediate = SignExtend32<16>(Insn & 0xffff); unsigned Base = fieldFromInstruction(Insn, 16, 5); @@ -1694,7 +1615,8 @@ static DecodeStatus DecodeSynciR6(MCInst &Inst, } static DecodeStatus DecodeMSA128Mem(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { int Offset = SignExtend32<10>(fieldFromInstruction(Insn, 16, 10)); unsigned Reg = fieldFromInstruction(Insn, 6, 5); unsigned Base = fieldFromInstruction(Insn, 11, 5); @@ -1739,10 +1661,9 @@ static DecodeStatus DecodeMSA128Mem(MCInst &Inst, unsigned Insn, return MCDisassembler::Success; } -static DecodeStatus DecodeMemMMImm4(MCInst &Inst, - unsigned Insn, +static DecodeStatus DecodeMemMMImm4(MCInst &Inst, unsigned Insn, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { unsigned Offset = Insn & 0xf; unsigned Reg = fieldFromInstruction(Insn, 7, 3); unsigned Base = fieldFromInstruction(Insn, 4, 3); @@ -1797,10 +1718,9 @@ static DecodeStatus DecodeMemMMImm4(MCInst &Inst, return MCDisassembler::Success; } -static DecodeStatus DecodeMemMMSPImm5Lsl2(MCInst &Inst, - unsigned Insn, +static DecodeStatus DecodeMemMMSPImm5Lsl2(MCInst &Inst, unsigned Insn, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { unsigned Offset = Insn & 0x1F; unsigned Reg = fieldFromInstruction(Insn, 5, 5); @@ -1813,10 +1733,9 @@ static DecodeStatus DecodeMemMMSPImm5Lsl2(MCInst &Inst, return MCDisassembler::Success; } -static DecodeStatus DecodeMemMMGPImm7Lsl2(MCInst &Inst, - unsigned Insn, +static DecodeStatus DecodeMemMMGPImm7Lsl2(MCInst &Inst, unsigned Insn, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { unsigned Offset = Insn & 0x7F; unsigned Reg = fieldFromInstruction(Insn, 7, 3); @@ -1829,10 +1748,9 @@ static DecodeStatus DecodeMemMMGPImm7Lsl2(MCInst &Inst, return MCDisassembler::Success; } -static DecodeStatus DecodeMemMMReglistImm4Lsl2(MCInst &Inst, - unsigned Insn, +static DecodeStatus DecodeMemMMReglistImm4Lsl2(MCInst &Inst, unsigned Insn, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { int Offset; switch (Inst.getOpcode()) { case Mips::LWM16_MMR6: @@ -1854,10 +1772,9 @@ static DecodeStatus DecodeMemMMReglistImm4Lsl2(MCInst &Inst, return MCDisassembler::Success; } -static DecodeStatus DecodeMemMMImm9(MCInst &Inst, - unsigned Insn, +static DecodeStatus DecodeMemMMImm9(MCInst &Inst, unsigned Insn, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { int Offset = SignExtend32<9>(Insn & 0x1ff); unsigned Reg = fieldFromInstruction(Insn, 21, 5); unsigned Base = fieldFromInstruction(Insn, 16, 5); @@ -1875,10 +1792,9 @@ static DecodeStatus DecodeMemMMImm9(MCInst &Inst, return MCDisassembler::Success; } -static DecodeStatus DecodeMemMMImm12(MCInst &Inst, - unsigned Insn, +static DecodeStatus DecodeMemMMImm12(MCInst &Inst, unsigned Insn, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { int Offset = SignExtend32<12>(Insn & 0x0fff); unsigned Reg = fieldFromInstruction(Insn, 21, 5); unsigned Base = fieldFromInstruction(Insn, 16, 5); @@ -1910,10 +1826,9 @@ static DecodeStatus DecodeMemMMImm12(MCInst &Inst, return MCDisassembler::Success; } -static DecodeStatus DecodeMemMMImm16(MCInst &Inst, - unsigned Insn, +static DecodeStatus DecodeMemMMImm16(MCInst &Inst, unsigned Insn, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { int Offset = SignExtend32<16>(Insn & 0xffff); unsigned Reg = fieldFromInstruction(Insn, 21, 5); unsigned Base = fieldFromInstruction(Insn, 16, 5); @@ -1928,10 +1843,8 @@ static DecodeStatus DecodeMemMMImm16(MCInst &Inst, return MCDisassembler::Success; } -static DecodeStatus DecodeFMem(MCInst &Inst, - unsigned Insn, - uint64_t Address, - const void *Decoder) { +static DecodeStatus DecodeFMem(MCInst &Inst, unsigned Insn, uint64_t Address, + const MCDisassembler *Decoder) { int Offset = SignExtend32<16>(Insn & 0xffff); unsigned Reg = fieldFromInstruction(Insn, 16, 5); unsigned Base = fieldFromInstruction(Insn, 21, 5); @@ -1947,7 +1860,8 @@ static DecodeStatus DecodeFMem(MCInst &Inst, } static DecodeStatus DecodeFMemMMR2(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { // This function is the same as DecodeFMem but with the Reg and Base fields // swapped according to microMIPS spec. int Offset = SignExtend32<16>(Insn & 0xffff); @@ -1964,10 +1878,8 @@ static DecodeStatus DecodeFMemMMR2(MCInst &Inst, unsigned Insn, return MCDisassembler::Success; } -static DecodeStatus DecodeFMem2(MCInst &Inst, - unsigned Insn, - uint64_t Address, - const void *Decoder) { +static DecodeStatus DecodeFMem2(MCInst &Inst, unsigned Insn, uint64_t Address, + const MCDisassembler *Decoder) { int Offset = SignExtend32<16>(Insn & 0xffff); unsigned Reg = fieldFromInstruction(Insn, 16, 5); unsigned Base = fieldFromInstruction(Insn, 21, 5); @@ -1982,10 +1894,8 @@ static DecodeStatus DecodeFMem2(MCInst &Inst, return MCDisassembler::Success; } -static DecodeStatus DecodeFMem3(MCInst &Inst, - unsigned Insn, - uint64_t Address, - const void *Decoder) { +static DecodeStatus DecodeFMem3(MCInst &Inst, unsigned Insn, uint64_t Address, + const MCDisassembler *Decoder) { int Offset = SignExtend32<16>(Insn & 0xffff); unsigned Reg = fieldFromInstruction(Insn, 16, 5); unsigned Base = fieldFromInstruction(Insn, 21, 5); @@ -2000,10 +1910,9 @@ static DecodeStatus DecodeFMem3(MCInst &Inst, return MCDisassembler::Success; } -static DecodeStatus DecodeFMemCop2R6(MCInst &Inst, - unsigned Insn, - uint64_t Address, - const void *Decoder) { +static DecodeStatus DecodeFMemCop2R6(MCInst &Inst, unsigned Insn, + uint64_t Address, + const MCDisassembler *Decoder) { int Offset = SignExtend32<11>(Insn & 0x07ff); unsigned Reg = fieldFromInstruction(Insn, 16, 5); unsigned Base = fieldFromInstruction(Insn, 11, 5); @@ -2019,7 +1928,8 @@ static DecodeStatus DecodeFMemCop2R6(MCInst &Inst, } static DecodeStatus DecodeFMemCop2MMR6(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { int Offset = SignExtend32<11>(Insn & 0x07ff); unsigned Reg = fieldFromInstruction(Insn, 21, 5); unsigned Base = fieldFromInstruction(Insn, 16, 5); @@ -2034,10 +1944,9 @@ static DecodeStatus DecodeFMemCop2MMR6(MCInst &Inst, unsigned Insn, return MCDisassembler::Success; } -static DecodeStatus DecodeSpecial3LlSc(MCInst &Inst, - unsigned Insn, +static DecodeStatus DecodeSpecial3LlSc(MCInst &Inst, unsigned Insn, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { int64_t Offset = SignExtend64<9>((Insn >> 7) & 0x1ff); unsigned Rt = fieldFromInstruction(Insn, 16, 5); unsigned Base = fieldFromInstruction(Insn, 21, 5); @@ -2056,10 +1965,9 @@ static DecodeStatus DecodeSpecial3LlSc(MCInst &Inst, return MCDisassembler::Success; } -static DecodeStatus DecodeHWRegsRegisterClass(MCInst &Inst, - unsigned RegNo, +static DecodeStatus DecodeHWRegsRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { // Currently only hardware register 29 is supported. if (RegNo != 29) return MCDisassembler::Fail; @@ -2067,10 +1975,9 @@ static DecodeStatus DecodeHWRegsRegisterClass(MCInst &Inst, return MCDisassembler::Success; } -static DecodeStatus DecodeAFGR64RegisterClass(MCInst &Inst, - unsigned RegNo, +static DecodeStatus DecodeAFGR64RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { if (RegNo > 30 || RegNo %2) return MCDisassembler::Fail; @@ -2079,10 +1986,9 @@ static DecodeStatus DecodeAFGR64RegisterClass(MCInst &Inst, return MCDisassembler::Success; } -static DecodeStatus DecodeACC64DSPRegisterClass(MCInst &Inst, - unsigned RegNo, +static DecodeStatus DecodeACC64DSPRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { if (RegNo >= 4) return MCDisassembler::Fail; @@ -2091,10 +1997,9 @@ static DecodeStatus DecodeACC64DSPRegisterClass(MCInst &Inst, return MCDisassembler::Success; } -static DecodeStatus DecodeHI32DSPRegisterClass(MCInst &Inst, - unsigned RegNo, +static DecodeStatus DecodeHI32DSPRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { if (RegNo >= 4) return MCDisassembler::Fail; @@ -2103,10 +2008,9 @@ static DecodeStatus DecodeHI32DSPRegisterClass(MCInst &Inst, return MCDisassembler::Success; } -static DecodeStatus DecodeLO32DSPRegisterClass(MCInst &Inst, - unsigned RegNo, +static DecodeStatus DecodeLO32DSPRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { if (RegNo >= 4) return MCDisassembler::Fail; @@ -2115,10 +2019,9 @@ static DecodeStatus DecodeLO32DSPRegisterClass(MCInst &Inst, return MCDisassembler::Success; } -static DecodeStatus DecodeMSA128BRegisterClass(MCInst &Inst, - unsigned RegNo, +static DecodeStatus DecodeMSA128BRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { if (RegNo > 31) return MCDisassembler::Fail; @@ -2127,10 +2030,9 @@ static DecodeStatus DecodeMSA128BRegisterClass(MCInst &Inst, return MCDisassembler::Success; } -static DecodeStatus DecodeMSA128HRegisterClass(MCInst &Inst, - unsigned RegNo, +static DecodeStatus DecodeMSA128HRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { if (RegNo > 31) return MCDisassembler::Fail; @@ -2139,10 +2041,9 @@ static DecodeStatus DecodeMSA128HRegisterClass(MCInst &Inst, return MCDisassembler::Success; } -static DecodeStatus DecodeMSA128WRegisterClass(MCInst &Inst, - unsigned RegNo, +static DecodeStatus DecodeMSA128WRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { if (RegNo > 31) return MCDisassembler::Fail; @@ -2151,10 +2052,9 @@ static DecodeStatus DecodeMSA128WRegisterClass(MCInst &Inst, return MCDisassembler::Success; } -static DecodeStatus DecodeMSA128DRegisterClass(MCInst &Inst, - unsigned RegNo, +static DecodeStatus DecodeMSA128DRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { if (RegNo > 31) return MCDisassembler::Fail; @@ -2163,10 +2063,9 @@ static DecodeStatus DecodeMSA128DRegisterClass(MCInst &Inst, return MCDisassembler::Success; } -static DecodeStatus DecodeMSACtrlRegisterClass(MCInst &Inst, - unsigned RegNo, +static DecodeStatus DecodeMSACtrlRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { if (RegNo > 7) return MCDisassembler::Fail; @@ -2175,10 +2074,9 @@ static DecodeStatus DecodeMSACtrlRegisterClass(MCInst &Inst, return MCDisassembler::Success; } -static DecodeStatus DecodeCOP0RegisterClass(MCInst &Inst, - unsigned RegNo, +static DecodeStatus DecodeCOP0RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { if (RegNo > 31) return MCDisassembler::Fail; @@ -2187,10 +2085,9 @@ static DecodeStatus DecodeCOP0RegisterClass(MCInst &Inst, return MCDisassembler::Success; } -static DecodeStatus DecodeCOP2RegisterClass(MCInst &Inst, - unsigned RegNo, +static DecodeStatus DecodeCOP2RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { if (RegNo > 31) return MCDisassembler::Fail; @@ -2199,122 +2096,109 @@ static DecodeStatus DecodeCOP2RegisterClass(MCInst &Inst, return MCDisassembler::Success; } -static DecodeStatus DecodeBranchTarget(MCInst &Inst, - unsigned Offset, +static DecodeStatus DecodeBranchTarget(MCInst &Inst, unsigned Offset, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { int32_t BranchOffset = (SignExtend32<16>(Offset) * 4) + 4; Inst.addOperand(MCOperand::createImm(BranchOffset)); return MCDisassembler::Success; } -static DecodeStatus DecodeBranchTarget1SImm16(MCInst &Inst, - unsigned Offset, +static DecodeStatus DecodeBranchTarget1SImm16(MCInst &Inst, unsigned Offset, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { int32_t BranchOffset = (SignExtend32<16>(Offset) * 2); Inst.addOperand(MCOperand::createImm(BranchOffset)); return MCDisassembler::Success; } -static DecodeStatus DecodeJumpTarget(MCInst &Inst, - unsigned Insn, +static DecodeStatus DecodeJumpTarget(MCInst &Inst, unsigned Insn, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { unsigned JumpOffset = fieldFromInstruction(Insn, 0, 26) << 2; Inst.addOperand(MCOperand::createImm(JumpOffset)); return MCDisassembler::Success; } -static DecodeStatus DecodeBranchTarget21(MCInst &Inst, - unsigned Offset, +static DecodeStatus DecodeBranchTarget21(MCInst &Inst, unsigned Offset, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { int32_t BranchOffset = SignExtend32<21>(Offset) * 4 + 4; Inst.addOperand(MCOperand::createImm(BranchOffset)); return MCDisassembler::Success; } -static DecodeStatus DecodeBranchTarget21MM(MCInst &Inst, - unsigned Offset, +static DecodeStatus DecodeBranchTarget21MM(MCInst &Inst, unsigned Offset, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { int32_t BranchOffset = SignExtend32<21>(Offset) * 4 + 4; Inst.addOperand(MCOperand::createImm(BranchOffset)); return MCDisassembler::Success; } -static DecodeStatus DecodeBranchTarget26(MCInst &Inst, - unsigned Offset, +static DecodeStatus DecodeBranchTarget26(MCInst &Inst, unsigned Offset, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { int32_t BranchOffset = SignExtend32<26>(Offset) * 4 + 4; Inst.addOperand(MCOperand::createImm(BranchOffset)); return MCDisassembler::Success; } -static DecodeStatus DecodeBranchTarget7MM(MCInst &Inst, - unsigned Offset, +static DecodeStatus DecodeBranchTarget7MM(MCInst &Inst, unsigned Offset, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { int32_t BranchOffset = SignExtend32<8>(Offset << 1); Inst.addOperand(MCOperand::createImm(BranchOffset)); return MCDisassembler::Success; } -static DecodeStatus DecodeBranchTarget10MM(MCInst &Inst, - unsigned Offset, +static DecodeStatus DecodeBranchTarget10MM(MCInst &Inst, unsigned Offset, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { int32_t BranchOffset = SignExtend32<11>(Offset << 1); Inst.addOperand(MCOperand::createImm(BranchOffset)); return MCDisassembler::Success; } -static DecodeStatus DecodeBranchTargetMM(MCInst &Inst, - unsigned Offset, +static DecodeStatus DecodeBranchTargetMM(MCInst &Inst, unsigned Offset, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { int32_t BranchOffset = SignExtend32<16>(Offset) * 2 + 4; Inst.addOperand(MCOperand::createImm(BranchOffset)); return MCDisassembler::Success; } -static DecodeStatus DecodeBranchTarget26MM(MCInst &Inst, - unsigned Offset, - uint64_t Address, - const void *Decoder) { +static DecodeStatus DecodeBranchTarget26MM(MCInst &Inst, unsigned Offset, + uint64_t Address, + const MCDisassembler *Decoder) { int32_t BranchOffset = SignExtend32<27>(Offset << 1); Inst.addOperand(MCOperand::createImm(BranchOffset)); return MCDisassembler::Success; } -static DecodeStatus DecodeJumpTargetMM(MCInst &Inst, - unsigned Insn, +static DecodeStatus DecodeJumpTargetMM(MCInst &Inst, unsigned Insn, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { unsigned JumpOffset = fieldFromInstruction(Insn, 0, 26) << 1; Inst.addOperand(MCOperand::createImm(JumpOffset)); return MCDisassembler::Success; } -static DecodeStatus DecodeJumpTargetXMM(MCInst &Inst, - unsigned Insn, +static DecodeStatus DecodeJumpTargetXMM(MCInst &Inst, unsigned Insn, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { unsigned JumpOffset = fieldFromInstruction(Insn, 0, 26) << 2; Inst.addOperand(MCOperand::createImm(JumpOffset)); return MCDisassembler::Success; } -static DecodeStatus DecodeAddiur2Simm7(MCInst &Inst, - unsigned Value, +static DecodeStatus DecodeAddiur2Simm7(MCInst &Inst, unsigned Value, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { if (Value == 0) Inst.addOperand(MCOperand::createImm(1)); else if (Value == 0x7) @@ -2324,10 +2208,9 @@ static DecodeStatus DecodeAddiur2Simm7(MCInst &Inst, return MCDisassembler::Success; } -static DecodeStatus DecodeLi16Imm(MCInst &Inst, - unsigned Value, +static DecodeStatus DecodeLi16Imm(MCInst &Inst, unsigned Value, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { if (Value == 0x7F) Inst.addOperand(MCOperand::createImm(-1)); else @@ -2335,18 +2218,17 @@ static DecodeStatus DecodeLi16Imm(MCInst &Inst, return MCDisassembler::Success; } -static DecodeStatus DecodePOOL16BEncodedField(MCInst &Inst, - unsigned Value, +static DecodeStatus DecodePOOL16BEncodedField(MCInst &Inst, unsigned Value, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { Inst.addOperand(MCOperand::createImm(Value == 0x0 ? 8 : Value)); return MCDisassembler::Success; } template <unsigned Bits, int Offset, int Scale> -static DecodeStatus DecodeUImmWithOffsetAndScale(MCInst &Inst, unsigned Value, - uint64_t Address, - const void *Decoder) { +static DecodeStatus +DecodeUImmWithOffsetAndScale(MCInst &Inst, unsigned Value, uint64_t Address, + const MCDisassembler *Decoder) { Value &= ((1 << Bits) - 1); Value *= Scale; Inst.addOperand(MCOperand::createImm(Value + Offset)); @@ -2354,18 +2236,16 @@ static DecodeStatus DecodeUImmWithOffsetAndScale(MCInst &Inst, unsigned Value, } template <unsigned Bits, int Offset, int ScaleBy> -static DecodeStatus DecodeSImmWithOffsetAndScale(MCInst &Inst, unsigned Value, - uint64_t Address, - const void *Decoder) { +static DecodeStatus +DecodeSImmWithOffsetAndScale(MCInst &Inst, unsigned Value, uint64_t Address, + const MCDisassembler *Decoder) { int32_t Imm = SignExtend32<Bits>(Value) * ScaleBy; Inst.addOperand(MCOperand::createImm(Imm + Offset)); return MCDisassembler::Success; } -static DecodeStatus DecodeInsSize(MCInst &Inst, - unsigned Insn, - uint64_t Address, - const void *Decoder) { +static DecodeStatus DecodeInsSize(MCInst &Inst, unsigned Insn, uint64_t Address, + const MCDisassembler *Decoder) { // First we need to grab the pos(lsb) from MCInst. // This function only handles the 32 bit variants of ins, as dins // variants are handled differently. @@ -2376,19 +2256,21 @@ static DecodeStatus DecodeInsSize(MCInst &Inst, } static DecodeStatus DecodeSimm19Lsl2(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { Inst.addOperand(MCOperand::createImm(SignExtend32<19>(Insn) * 4)); return MCDisassembler::Success; } static DecodeStatus DecodeSimm18Lsl3(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { Inst.addOperand(MCOperand::createImm(SignExtend32<18>(Insn) * 8)); return MCDisassembler::Success; } -static DecodeStatus DecodeSimm9SP(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder) { +static DecodeStatus DecodeSimm9SP(MCInst &Inst, unsigned Insn, uint64_t Address, + const MCDisassembler *Decoder) { int32_t DecodedValue; switch (Insn) { case 0: DecodedValue = 256; break; @@ -2402,7 +2284,8 @@ static DecodeStatus DecodeSimm9SP(MCInst &Inst, unsigned Insn, } static DecodeStatus DecodeANDI16Imm(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { // Insn must be >= 0, since it is unsigned that condition is always true. assert(Insn < 16); int32_t DecodedValues[] = {128, 1, 2, 3, 4, 7, 8, 15, 16, 31, 32, 63, 64, @@ -2411,10 +2294,9 @@ static DecodeStatus DecodeANDI16Imm(MCInst &Inst, unsigned Insn, return MCDisassembler::Success; } -static DecodeStatus DecodeRegListOperand(MCInst &Inst, - unsigned Insn, +static DecodeStatus DecodeRegListOperand(MCInst &Inst, unsigned Insn, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { unsigned Regs[] = {Mips::S0, Mips::S1, Mips::S2, Mips::S3, Mips::S4, Mips::S5, Mips::S6, Mips::S7, Mips::FP}; unsigned RegNum; @@ -2442,7 +2324,7 @@ static DecodeStatus DecodeRegListOperand(MCInst &Inst, static DecodeStatus DecodeRegListOperand16(MCInst &Inst, unsigned Insn, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { unsigned Regs[] = {Mips::S0, Mips::S1, Mips::S2, Mips::S3}; unsigned RegLst; switch(Inst.getOpcode()) { @@ -2465,8 +2347,8 @@ static DecodeStatus DecodeRegListOperand16(MCInst &Inst, unsigned Insn, } static DecodeStatus DecodeMovePOperands(MCInst &Inst, unsigned Insn, - uint64_t Address, - const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { unsigned RegPair = fieldFromInstruction(Insn, 7, 3); if (DecodeMovePRegPair(Inst, RegPair, Address, Decoder) == MCDisassembler::Fail) @@ -2491,7 +2373,8 @@ static DecodeStatus DecodeMovePOperands(MCInst &Inst, unsigned Insn, } static DecodeStatus DecodeMovePRegPair(MCInst &Inst, unsigned RegPair, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { switch (RegPair) { default: return MCDisassembler::Fail; @@ -2533,15 +2416,16 @@ static DecodeStatus DecodeMovePRegPair(MCInst &Inst, unsigned RegPair, } static DecodeStatus DecodeSimm23Lsl2(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { Inst.addOperand(MCOperand::createImm(SignExtend32<25>(Insn << 2))); return MCDisassembler::Success; } template <typename InsnType> static DecodeStatus DecodeBgtzGroupBranchMMR6(MCInst &MI, InsnType insn, - uint64_t Address, - const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { // We have: // 0b000111 ttttt sssss iiiiiiiiiiiiiiii // Invalid if rt == 0 @@ -2589,8 +2473,8 @@ static DecodeStatus DecodeBgtzGroupBranchMMR6(MCInst &MI, InsnType insn, template <typename InsnType> static DecodeStatus DecodeBlezGroupBranchMMR6(MCInst &MI, InsnType insn, - uint64_t Address, - const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { // We have: // 0b000110 ttttt sssss iiiiiiiiiiiiiiii // Invalid if rt == 0 |