1 files changed, 8 insertions, 9 deletions
diff --git a/contrib/llvm-project/llvm/lib/Target/PowerPC/PPCMacroFusion.cpp b/contrib/llvm-project/llvm/lib/Target/PowerPC/PPCMacroFusion.cpp
index 58b74c6b8c7a..bf1c39a3a3a2 100644
--- a/contrib/llvm-project/llvm/lib/Target/PowerPC/PPCMacroFusion.cpp
+++ b/contrib/llvm-project/llvm/lib/Target/PowerPC/PPCMacroFusion.cpp
@@ -16,6 +16,7 @@
 #include "llvm/ADT/DenseSet.h"
 #include "llvm/CodeGen/MacroFusion.h"
 #include "llvm/CodeGen/ScheduleDAGMutation.h"
+#include <optional>
 
 using namespace llvm;
 namespace {
@@ -55,9 +56,9 @@ public:
   bool hasOp1(unsigned Opc) const { return OpSet1.contains(Opc); }
   bool hasOp2(unsigned Opc) const { return OpSet2.contains(Opc); }
   bool isSupported() const { return Supported; }
-  Optional<unsigned> depOpIdx() const {
+  std::optional<unsigned> depOpIdx() const {
     if (DepOpIdx < 0)
-      return None;
+      return std::nullopt;
     return DepOpIdx;
   }
 
@@ -105,8 +106,8 @@ static bool checkOpConstraints(FusionFeature::FusionKind Kd,
     if (!RA.isReg())
       return true;
 
-    return Register::isVirtualRegister(RA.getReg()) ||
-      (RA.getReg() != PPC::ZERO && RA.getReg() != PPC::ZERO8);
+    return RA.getReg().isVirtual() ||
+           (RA.getReg() != PPC::ZERO && RA.getReg() != PPC::ZERO8);
   }
   // [addis rt,ra,si - ld rt,ds(ra)] etc.
   case FusionFeature::FK_AddisLoad: {
@@ -115,7 +116,7 @@ static bool checkOpConstraints(FusionFeature::FusionKind Kd,
       return true;
 
     // Only check it for non-virtual register.
-    if (!Register::isVirtualRegister(RT.getReg()))
+    if (!RT.getReg().isVirtual())
       // addis(rt) = ld(ra) = ld(rt)
       // ld(rt) cannot be zero
       if (!matchingRegOps(SecondMI, 0, SecondMI, 2) ||
@@ -168,8 +169,7 @@ static bool checkOpConstraints(FusionFeature::FusionKind Kd,
   // { ld,ldx } - cmpli 0,1,rx,{ 0,1 }
   case FusionFeature::FK_LoadCmp2: {
     const MachineOperand &BT = SecondMI.getOperand(0);
-    if (!BT.isReg() ||
-        (!Register::isVirtualRegister(BT.getReg()) && BT.getReg() != PPC::CR0))
+    if (!BT.isReg() || (!BT.getReg().isVirtual() && BT.getReg() != PPC::CR0))
       return false;
     if (SecondMI.getOpcode() == PPC::CMPDI &&
         matchingImmOps(SecondMI, 2, -1, 16))
@@ -180,8 +180,7 @@ static bool checkOpConstraints(FusionFeature::FusionKind Kd,
   // { lha,lhax,lwa,lwax } - cmpi 0,L,rx,{ 0,1,-1 }
   case FusionFeature::FK_LoadCmp3: {
     const MachineOperand &BT = SecondMI.getOperand(0);
-    if (!BT.isReg() ||
-        (!Register::isVirtualRegister(BT.getReg()) && BT.getReg() != PPC::CR0))
+    if (!BT.isReg() || (!BT.getReg().isVirtual() && BT.getReg() != PPC::CR0))
       return false;
     return matchingImmOps(SecondMI, 2, 0) || matchingImmOps(SecondMI, 2, 1) ||
            matchingImmOps(SecondMI, 2, -1, 16);