diff options
Diffstat (limited to 'contrib/llvm/lib/CodeGen/RegisterClassInfo.cpp')
| -rw-r--r-- | contrib/llvm/lib/CodeGen/RegisterClassInfo.cpp | 11 |
1 files changed, 6 insertions, 5 deletions
diff --git a/contrib/llvm/lib/CodeGen/RegisterClassInfo.cpp b/contrib/llvm/lib/CodeGen/RegisterClassInfo.cpp index add8faec97d4..530e0cccf1d4 100644 --- a/contrib/llvm/lib/CodeGen/RegisterClassInfo.cpp +++ b/contrib/llvm/lib/CodeGen/RegisterClassInfo.cpp @@ -1,9 +1,8 @@ //===- RegisterClassInfo.cpp - Dynamic Register Class Info ----------------===// // -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // //===----------------------------------------------------------------------===// // @@ -91,6 +90,7 @@ void RegisterClassInfo::runOnMachineFunction(const MachineFunction &mf) { void RegisterClassInfo::compute(const TargetRegisterClass *RC) const { assert(RC && "no register class given"); RCInfo &RCI = RegClass[RC->getID()]; + auto &STI = MF->getSubtarget(); // Raw register count, including all reserved regs. unsigned NumRegs = RC->getNumRegs(); @@ -115,7 +115,8 @@ void RegisterClassInfo::compute(const TargetRegisterClass *RC) const { unsigned Cost = TRI->getCostPerUse(PhysReg); MinCost = std::min(MinCost, Cost); - if (CalleeSavedAliases[PhysReg]) + if (CalleeSavedAliases[PhysReg] && + !STI.ignoreCSRForAllocationOrder(*MF, PhysReg)) // PhysReg aliases a CSR, save it for later. CSRAlias.push_back(PhysReg); else { |