diff options
Diffstat (limited to 'contrib/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h')
-rw-r--r-- | contrib/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h | 52 |
1 files changed, 49 insertions, 3 deletions
diff --git a/contrib/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h b/contrib/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h index 715c4882f380..68b40b20aca2 100644 --- a/contrib/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h +++ b/contrib/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h @@ -15,27 +15,39 @@ #define LLVM_LIB_TARGET_AMDGPU_AMDGPUINSTRUCTIONSELECTOR_H #include "AMDGPU.h" +#include "AMDGPUArgumentUsageInfo.h" #include "llvm/ADT/ArrayRef.h" #include "llvm/ADT/SmallVector.h" #include "llvm/CodeGen/GlobalISel/InstructionSelector.h" +namespace { +#define GET_GLOBALISEL_PREDICATE_BITSET +#define AMDGPUSubtarget GCNSubtarget +#include "AMDGPUGenGlobalISel.inc" +#undef GET_GLOBALISEL_PREDICATE_BITSET +#undef AMDGPUSubtarget +} + namespace llvm { class AMDGPUInstrInfo; class AMDGPURegisterBankInfo; +class GCNSubtarget; class MachineInstr; class MachineOperand; class MachineRegisterInfo; class SIInstrInfo; +class SIMachineFunctionInfo; class SIRegisterInfo; -class SISubtarget; class AMDGPUInstructionSelector : public InstructionSelector { public: - AMDGPUInstructionSelector(const SISubtarget &STI, - const AMDGPURegisterBankInfo &RBI); + AMDGPUInstructionSelector(const GCNSubtarget &STI, + const AMDGPURegisterBankInfo &RBI, + const AMDGPUTargetMachine &TM); bool select(MachineInstr &I, CodeGenCoverage &CoverageInfo) const override; + static const char *getName(); private: struct GEPInfo { @@ -46,10 +58,18 @@ private: GEPInfo(const MachineInstr &GEP) : GEP(GEP), Imm(0) { } }; + /// tblgen-erated 'select' implementation. + bool selectImpl(MachineInstr &I, CodeGenCoverage &CoverageInfo) const; + MachineOperand getSubOperand64(MachineOperand &MO, unsigned SubIdx) const; + bool selectCOPY(MachineInstr &I) const; bool selectG_CONSTANT(MachineInstr &I) const; bool selectG_ADD(MachineInstr &I) const; bool selectG_GEP(MachineInstr &I) const; + bool selectG_IMPLICIT_DEF(MachineInstr &I) const; + bool selectG_INTRINSIC(MachineInstr &I, CodeGenCoverage &CoverageInfo) const; + bool selectG_INTRINSIC_W_SIDE_EFFECTS(MachineInstr &I, + CodeGenCoverage &CoverageInfo) const; bool hasVgprParts(ArrayRef<GEPInfo> AddrInfo) const; void getAddrModeInfo(const MachineInstr &Load, const MachineRegisterInfo &MRI, SmallVectorImpl<GEPInfo> &AddrInfo) const; @@ -57,9 +77,35 @@ private: bool selectG_LOAD(MachineInstr &I) const; bool selectG_STORE(MachineInstr &I) const; + InstructionSelector::ComplexRendererFns + selectVCSRC(MachineOperand &Root) const; + + InstructionSelector::ComplexRendererFns + selectVSRC0(MachineOperand &Root) const; + + InstructionSelector::ComplexRendererFns + selectVOP3Mods0(MachineOperand &Root) const; + InstructionSelector::ComplexRendererFns + selectVOP3OMods(MachineOperand &Root) const; + InstructionSelector::ComplexRendererFns + selectVOP3Mods(MachineOperand &Root) const; + const SIInstrInfo &TII; const SIRegisterInfo &TRI; const AMDGPURegisterBankInfo &RBI; + const AMDGPUTargetMachine &TM; + const GCNSubtarget &STI; + bool EnableLateStructurizeCFG; +#define GET_GLOBALISEL_PREDICATES_DECL +#define AMDGPUSubtarget GCNSubtarget +#include "AMDGPUGenGlobalISel.inc" +#undef GET_GLOBALISEL_PREDICATES_DECL +#undef AMDGPUSubtarget + +#define GET_GLOBALISEL_TEMPORARIES_DECL +#include "AMDGPUGenGlobalISel.inc" +#undef GET_GLOBALISEL_TEMPORARIES_DECL + protected: AMDGPUAS AMDGPUASI; }; |