diff options
Diffstat (limited to 'lib/Target/AMDGPU/AMDGPU.h')
| -rw-r--r-- | lib/Target/AMDGPU/AMDGPU.h | 121 |
1 files changed, 88 insertions, 33 deletions
diff --git a/lib/Target/AMDGPU/AMDGPU.h b/lib/Target/AMDGPU/AMDGPU.h index 568682899be5..0ddc43ad5033 100644 --- a/lib/Target/AMDGPU/AMDGPU.h +++ b/lib/Target/AMDGPU/AMDGPU.h @@ -23,6 +23,7 @@ class ModulePass; class Pass; class Target; class TargetMachine; +class TargetOptions; class PassRegistry; class Module; @@ -34,6 +35,7 @@ FunctionPass *createR600ClauseMergePass(); FunctionPass *createR600Packetizer(); FunctionPass *createR600ControlFlowFinalizer(); FunctionPass *createAMDGPUCFGStructurizerPass(); +FunctionPass *createR600ISelDag(TargetMachine *TM, CodeGenOpt::Level OptLevel); // SI Passes FunctionPass *createSIAnnotateControlFlowPass(); @@ -44,12 +46,20 @@ FunctionPass *createSIShrinkInstructionsPass(); FunctionPass *createSILoadStoreOptimizerPass(); FunctionPass *createSIWholeQuadModePass(); FunctionPass *createSIFixControlFlowLiveIntervalsPass(); +FunctionPass *createSIOptimizeExecMaskingPreRAPass(); FunctionPass *createSIFixSGPRCopiesPass(); +FunctionPass *createSIMemoryLegalizerPass(); FunctionPass *createSIDebuggerInsertNopsPass(); FunctionPass *createSIInsertWaitsPass(); FunctionPass *createSIInsertWaitcntsPass(); +FunctionPass *createSIFixWWMLivenessPass(); +FunctionPass *createAMDGPUSimplifyLibCallsPass(const TargetOptions &); +FunctionPass *createAMDGPUUseNativeCallsPass(); FunctionPass *createAMDGPUCodeGenPreparePass(); FunctionPass *createAMDGPUMachineCFGStructurizerPass(); +FunctionPass *createAMDGPURewriteOutArgumentsPass(); + +void initializeAMDGPUDAGToDAGISelPass(PassRegistry&); void initializeAMDGPUMachineCFGStructurizerPass(PassRegistry&); extern char &AMDGPUMachineCFGStructurizerID; @@ -64,6 +74,24 @@ ModulePass *createAMDGPULowerIntrinsicsPass(); void initializeAMDGPULowerIntrinsicsPass(PassRegistry &); extern char &AMDGPULowerIntrinsicsID; +void initializeAMDGPURewriteOutArgumentsPass(PassRegistry &); +extern char &AMDGPURewriteOutArgumentsID; + +void initializeR600ClauseMergePassPass(PassRegistry &); +extern char &R600ClauseMergePassID; + +void initializeR600ControlFlowFinalizerPass(PassRegistry &); +extern char &R600ControlFlowFinalizerID; + +void initializeR600ExpandSpecialInstrsPassPass(PassRegistry &); +extern char &R600ExpandSpecialInstrsPassID; + +void initializeR600VectorRegMergerPass(PassRegistry &); +extern char &R600VectorRegMergerID; + +void initializeR600PacketizerPass(PassRegistry &); +extern char &R600PacketizerID; + void initializeSIFoldOperandsPass(PassRegistry &); extern char &SIFoldOperandsID; @@ -97,14 +125,24 @@ extern char &SIInsertSkipsPassID; void initializeSIOptimizeExecMaskingPass(PassRegistry &); extern char &SIOptimizeExecMaskingID; +void initializeSIFixWWMLivenessPass(PassRegistry &); +extern char &SIFixWWMLivenessID; + +void initializeAMDGPUSimplifyLibCallsPass(PassRegistry &); +extern char &AMDGPUSimplifyLibCallsID; + +void initializeAMDGPUUseNativeCallsPass(PassRegistry &); +extern char &AMDGPUUseNativeCallsID; + // Passes common to R600 and SI FunctionPass *createAMDGPUPromoteAlloca(); void initializeAMDGPUPromoteAllocaPass(PassRegistry&); extern char &AMDGPUPromoteAllocaID; Pass *createAMDGPUStructurizeCFGPass(); -FunctionPass *createAMDGPUISelDag(TargetMachine &TM, - CodeGenOpt::Level OptLevel); +FunctionPass *createAMDGPUISelDag( + TargetMachine *TM = nullptr, + CodeGenOpt::Level OptLevel = CodeGenOpt::Default); ModulePass *createAMDGPUAlwaysInlinePass(bool GlobalOpt = true); ModulePass *createAMDGPUOpenCLImageTypeLoweringPass(); FunctionPass *createAMDGPUAnnotateUniformValues(); @@ -113,8 +151,8 @@ ModulePass* createAMDGPUUnifyMetadataPass(); void initializeAMDGPUUnifyMetadataPass(PassRegistry&); extern char &AMDGPUUnifyMetadataID; -void initializeSIFixControlFlowLiveIntervalsPass(PassRegistry&); -extern char &SIFixControlFlowLiveIntervalsID; +void initializeSIOptimizeExecMaskingPreRAPass(PassRegistry&); +extern char &SIOptimizeExecMaskingPreRAID; void initializeAMDGPUAnnotateUniformValuesPass(PassRegistry&); extern char &AMDGPUAnnotateUniformValuesPassID; @@ -125,6 +163,9 @@ extern char &AMDGPUCodeGenPrepareID; void initializeSIAnnotateControlFlowPass(PassRegistry&); extern char &SIAnnotateControlFlowPassID; +void initializeSIMemoryLegalizerPass(PassRegistry&); +extern char &SIMemoryLegalizerID; + void initializeSIDebuggerInsertNopsPass(PassRegistry&); extern char &SIDebuggerInsertNopsID; @@ -140,6 +181,15 @@ extern char &AMDGPUUnifyDivergentExitNodesID; ImmutablePass *createAMDGPUAAWrapperPass(); void initializeAMDGPUAAWrapperPassPass(PassRegistry&); +void initializeAMDGPUArgumentUsageInfoPass(PassRegistry &); + +Pass *createAMDGPUFunctionInliningPass(); +void initializeAMDGPUInlinerPass(PassRegistry&); + +ModulePass *createAMDGPUOpenCLEnqueuedBlockLoweringPass(); +void initializeAMDGPUOpenCLEnqueuedBlockLoweringPass(PassRegistry &); +extern char &AMDGPUOpenCLEnqueuedBlockLoweringID; + Target &getTheAMDGPUTarget(); Target &getTheGCNTarget(); @@ -167,39 +217,44 @@ struct AMDGPUAS { unsigned FLAT_ADDRESS; ///< Address space for flat memory. unsigned REGION_ADDRESS; ///< Address space for region memory. - // The maximum value for flat, generic, local, private, constant and region. - const static unsigned MAX_COMMON_ADDRESS = 5; + enum : unsigned { + // The maximum value for flat, generic, local, private, constant and region. + MAX_COMMON_ADDRESS = 5, - const static unsigned GLOBAL_ADDRESS = 1; ///< Address space for global memory (RAT0, VTX0). - const static unsigned CONSTANT_ADDRESS = 2; ///< Address space for constant memory (VTX2) - const static unsigned LOCAL_ADDRESS = 3; ///< Address space for local memory. - const static unsigned PARAM_D_ADDRESS = 6; ///< Address space for direct addressible parameter memory (CONST0) - const static unsigned PARAM_I_ADDRESS = 7; ///< Address space for indirect addressible parameter memory (VTX1) + GLOBAL_ADDRESS = 1, ///< Address space for global memory (RAT0, VTX0). + CONSTANT_ADDRESS = 2, ///< Address space for constant memory (VTX2) + LOCAL_ADDRESS = 3, ///< Address space for local memory. + /// Address space for direct addressible parameter memory (CONST0) + PARAM_D_ADDRESS = 6, + /// Address space for indirect addressible parameter memory (VTX1) + PARAM_I_ADDRESS = 7, - // Do not re-order the CONSTANT_BUFFER_* enums. Several places depend on this - // order to be able to dynamically index a constant buffer, for example: - // - // ConstantBufferAS = CONSTANT_BUFFER_0 + CBIdx + // Do not re-order the CONSTANT_BUFFER_* enums. Several places depend on + // this order to be able to dynamically index a constant buffer, for + // example: + // + // ConstantBufferAS = CONSTANT_BUFFER_0 + CBIdx - const static unsigned CONSTANT_BUFFER_0 = 8; - const static unsigned CONSTANT_BUFFER_1 = 9; - const static unsigned CONSTANT_BUFFER_2 = 10; - const static unsigned CONSTANT_BUFFER_3 = 11; - const static unsigned CONSTANT_BUFFER_4 = 12; - const static unsigned CONSTANT_BUFFER_5 = 13; - const static unsigned CONSTANT_BUFFER_6 = 14; - const static unsigned CONSTANT_BUFFER_7 = 15; - const static unsigned CONSTANT_BUFFER_8 = 16; - const static unsigned CONSTANT_BUFFER_9 = 17; - const static unsigned CONSTANT_BUFFER_10 = 18; - const static unsigned CONSTANT_BUFFER_11 = 19; - const static unsigned CONSTANT_BUFFER_12 = 20; - const static unsigned CONSTANT_BUFFER_13 = 21; - const static unsigned CONSTANT_BUFFER_14 = 22; - const static unsigned CONSTANT_BUFFER_15 = 23; + CONSTANT_BUFFER_0 = 8, + CONSTANT_BUFFER_1 = 9, + CONSTANT_BUFFER_2 = 10, + CONSTANT_BUFFER_3 = 11, + CONSTANT_BUFFER_4 = 12, + CONSTANT_BUFFER_5 = 13, + CONSTANT_BUFFER_6 = 14, + CONSTANT_BUFFER_7 = 15, + CONSTANT_BUFFER_8 = 16, + CONSTANT_BUFFER_9 = 17, + CONSTANT_BUFFER_10 = 18, + CONSTANT_BUFFER_11 = 19, + CONSTANT_BUFFER_12 = 20, + CONSTANT_BUFFER_13 = 21, + CONSTANT_BUFFER_14 = 22, + CONSTANT_BUFFER_15 = 23, - // Some places use this if the address space can't be determined. - const static unsigned UNKNOWN_ADDRESS_SPACE = ~0u; + // Some places use this if the address space can't be determined. + UNKNOWN_ADDRESS_SPACE = ~0u, + }; }; namespace llvm { |