diff options
Diffstat (limited to 'lib/libc/powerpcspe')
-rw-r--r-- | lib/libc/powerpcspe/Makefile.inc | 5 | ||||
-rw-r--r-- | lib/libc/powerpcspe/_fpmath.h | 56 | ||||
-rw-r--r-- | lib/libc/powerpcspe/gen/Makefile.inc | 5 | ||||
-rw-r--r-- | lib/libc/powerpcspe/gen/_setjmp.S | 115 | ||||
-rw-r--r-- | lib/libc/powerpcspe/gen/fabs.S | 37 | ||||
-rw-r--r-- | lib/libc/powerpcspe/gen/flt_rounds.c | 54 | ||||
-rw-r--r-- | lib/libc/powerpcspe/gen/fpgetmask.c | 46 | ||||
-rw-r--r-- | lib/libc/powerpcspe/gen/fpgetround.c | 46 | ||||
-rw-r--r-- | lib/libc/powerpcspe/gen/fpgetsticky.c | 48 | ||||
-rw-r--r-- | lib/libc/powerpcspe/gen/fpsetmask.c | 50 | ||||
-rw-r--r-- | lib/libc/powerpcspe/gen/fpsetround.c | 50 | ||||
-rw-r--r-- | lib/libc/powerpcspe/gen/setjmp.S | 136 | ||||
-rw-r--r-- | lib/libc/powerpcspe/gen/sigsetjmp.S | 148 | ||||
-rw-r--r-- | lib/libc/powerpcspe/softfloat/milieu.h | 48 | ||||
-rw-r--r-- | lib/libc/powerpcspe/softfloat/powerpc-gcc.h | 91 | ||||
-rw-r--r-- | lib/libc/powerpcspe/softfloat/softfloat.h | 306 |
16 files changed, 1241 insertions, 0 deletions
diff --git a/lib/libc/powerpcspe/Makefile.inc b/lib/libc/powerpcspe/Makefile.inc new file mode 100644 index 000000000000..0b5879574480 --- /dev/null +++ b/lib/libc/powerpcspe/Makefile.inc @@ -0,0 +1,5 @@ +CFLAGS+= -I${LIBC_SRCTOP}/powerpc + +# Long double is 64-bits +SRCS+=machdep_ldisd.c +SYM_MAPS+=${LIBC_SRCTOP}/powerpc/Symbol.map diff --git a/lib/libc/powerpcspe/_fpmath.h b/lib/libc/powerpcspe/_fpmath.h new file mode 100644 index 000000000000..9bc7450aacaf --- /dev/null +++ b/lib/libc/powerpcspe/_fpmath.h @@ -0,0 +1,56 @@ +/*- + * SPDX-License-Identifier: BSD-2-Clause + * + * Copyright (c) 2003 David Schultz <das@FreeBSD.ORG> + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +union IEEEl2bits { + long double e; + struct { +#if _BYTE_ORDER == _LITTLE_ENDIAN + unsigned int manl :32; + unsigned int manh :20; + unsigned int exp :11; + unsigned int sign :1; +#else /* _BYTE_ORDER == _LITTLE_ENDIAN */ + unsigned int sign :1; + unsigned int exp :11; + unsigned int manh :20; + unsigned int manl :32; +#endif + } bits; +}; + +#define mask_nbit_l(u) ((void)0) +#define LDBL_IMPLICIT_NBIT +#define LDBL_NBIT 0 + +#define LDBL_MANH_SIZE 20 +#define LDBL_MANL_SIZE 32 + +#define LDBL_TO_ARRAY32(u, a) do { \ + (a)[0] = (uint32_t)(u).bits.manl; \ + (a)[1] = (uint32_t)(u).bits.manh; \ +} while(0) diff --git a/lib/libc/powerpcspe/gen/Makefile.inc b/lib/libc/powerpcspe/gen/Makefile.inc new file mode 100644 index 000000000000..502f3dc231bf --- /dev/null +++ b/lib/libc/powerpcspe/gen/Makefile.inc @@ -0,0 +1,5 @@ +.include "${LIBC_SRCTOP}/powerpc/gen/Makefile.common" + +SRCS += fabs.S flt_rounds.c fpgetmask.c fpgetround.c \ + fpgetsticky.c fpsetmask.c fpsetround.c \ + _setjmp.S setjmp.S sigsetjmp.S diff --git a/lib/libc/powerpcspe/gen/_setjmp.S b/lib/libc/powerpcspe/gen/_setjmp.S new file mode 100644 index 000000000000..f282e0013f97 --- /dev/null +++ b/lib/libc/powerpcspe/gen/_setjmp.S @@ -0,0 +1,115 @@ +/*- + * Copyright (c) 2016 Justin Hibbits + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ +/* $NetBSD: _setjmp.S,v 1.1 1997/03/29 20:55:53 thorpej Exp $ */ + +#include <machine/asm.h> +/* + * C library -- _setjmp, _longjmp + * + * _longjmp(a,v) + * will generate a "return(v?v:1)" from the last call to + * _setjmp(a) + * by restoring registers from the stack. + * The previous signal state is NOT restored. + * + * jmpbuf layout: + * +------------+ + * | unused | + * +------------+ + * | unused | + * | | + * | (4 words) | + * | | + * +------------+ + * | saved regs | + * | ... | + */ + +ENTRY(_setjmp) + mflr %r11 + mfcr %r12 + evstdd %r1,24+0*8(%r3) + evstdd %r2,24+1*8(%r3) + evstdd %r11,24+2*8(%r3) + evstdd %r12,24+3*8(%r3) + evstdd %r13,24+4*8(%r3) + evstdd %r14,24+5*8(%r3) + evstdd %r15,24+6*8(%r3) + evstdd %r16,24+7*8(%r3) + evstdd %r17,24+8*8(%r3) + evstdd %r18,24+9*8(%r3) + evstdd %r19,24+10*8(%r3) + evstdd %r20,24+11*8(%r3) + evstdd %r21,24+12*8(%r3) + evstdd %r22,24+13*8(%r3) + evstdd %r23,24+14*8(%r3) + evstdd %r24,24+15*8(%r3) + evstdd %r25,24+16*8(%r3) + evstdd %r26,24+17*8(%r3) + evstdd %r27,24+18*8(%r3) + evstdd %r28,24+19*8(%r3) + evstdd %r29,24+20*8(%r3) + evstdd %r30,24+21*8(%r3) + evstdd %r31,24+22*8(%r3) + + li %r3,0 + blr +END(_setjmp) + +ENTRY(_longjmp) + evldd %r1,24+0*8(%r3) + evldd %r2,24+1*8(%r3) + evldd %r11,24+2*8(%r3) + evldd %r12,24+3*8(%r3) + evldd %r13,24+4*8(%r3) + evldd %r14,24+5*8(%r3) + evldd %r15,24+6*8(%r3) + evldd %r16,24+7*8(%r3) + evldd %r17,24+8*8(%r3) + evldd %r18,24+9*8(%r3) + evldd %r19,24+10*8(%r3) + evldd %r20,24+11*8(%r3) + evldd %r21,24+12*8(%r3) + evldd %r22,24+13*8(%r3) + evldd %r23,24+14*8(%r3) + evldd %r24,24+15*8(%r3) + evldd %r25,24+16*8(%r3) + evldd %r26,24+17*8(%r3) + evldd %r27,24+18*8(%r3) + evldd %r28,24+19*8(%r3) + evldd %r29,24+20*8(%r3) + evldd %r30,24+21*8(%r3) + evldd %r31,24+22*8(%r3) + + mtlr %r11 + mtcr %r12 + or. %r3,%r4,%r4 + bnelr + li %r3,1 + blr +END(_longjmp) + + .section .note.GNU-stack,"",%progbits diff --git a/lib/libc/powerpcspe/gen/fabs.S b/lib/libc/powerpcspe/gen/fabs.S new file mode 100644 index 000000000000..df9196c3273d --- /dev/null +++ b/lib/libc/powerpcspe/gen/fabs.S @@ -0,0 +1,37 @@ +/* + * Copyright (c) 2016 Justin Hibbits + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include <machine/asm.h> +/* + * double fabs(double) + */ +ENTRY(fabs) + /* arg is split in two words, clear sign bit only, in r3. */ + clrlwi %r3,%r3,1 + blr +END(fabs) + + .section .note.GNU-stack,"",%progbits diff --git a/lib/libc/powerpcspe/gen/flt_rounds.c b/lib/libc/powerpcspe/gen/flt_rounds.c new file mode 100644 index 000000000000..26dfca0e0e3a --- /dev/null +++ b/lib/libc/powerpcspe/gen/flt_rounds.c @@ -0,0 +1,54 @@ +/* $NetBSD: flt_rounds.c,v 1.4.10.3 2002/03/22 20:41:53 nathanw Exp $ */ + +/* + * Copyright (c) 2016 Justin Hibbits + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by Mark Brinicombe + * for the NetBSD Project. + * 4. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include <sys/types.h> +#include <machine/float.h> +#include <machine/spr.h> + +#ifndef _SOFT_FLOAT +static const int map[] = { + 1, /* round to nearest */ + 0, /* round to zero */ + 2, /* round to positive infinity */ + 3 /* round to negative infinity */ +}; + +int +__flt_rounds() +{ + uint32_t fpscr; + + __asm__ __volatile("mfspr %0, %1" : "=r"(fpscr) : "K"(SPR_SPEFSCR)); + return map[(fpscr & 0x03)]; +} +#endif diff --git a/lib/libc/powerpcspe/gen/fpgetmask.c b/lib/libc/powerpcspe/gen/fpgetmask.c new file mode 100644 index 000000000000..f7679be4ca54 --- /dev/null +++ b/lib/libc/powerpcspe/gen/fpgetmask.c @@ -0,0 +1,46 @@ +/* $NetBSD: fpgetmask.c,v 1.3 2002/01/13 21:45:47 thorpej Exp $ */ + +/* + * Copyright (c) 2016 Justin Hibbits + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Dan Winship. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include <sys/types.h> +#include <machine/spr.h> +#include <ieeefp.h> + +#ifndef _SOFT_FLOAT +fp_except_t +fpgetmask() +{ + uint32_t fpscr; + + __asm__ __volatile("mfspr %0, %1" : "=r"(fpscr) : "K"(SPR_SPEFSCR)); + return ((fp_except_t)((fpscr >> 2) & 0x1f)); +} +#endif diff --git a/lib/libc/powerpcspe/gen/fpgetround.c b/lib/libc/powerpcspe/gen/fpgetround.c new file mode 100644 index 000000000000..9c01bcbaf327 --- /dev/null +++ b/lib/libc/powerpcspe/gen/fpgetround.c @@ -0,0 +1,46 @@ +/* $NetBSD: fpgetround.c,v 1.3 2002/01/13 21:45:47 thorpej Exp $ */ + +/* + * Copyright (c) 2016 Justin Hibbits + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Dan Winship. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include <sys/types.h> +#include <machine/spr.h> +#include <ieeefp.h> + +#ifndef _SOFT_FLOAT +fp_rnd_t +fpgetround() +{ + uint32_t fpscr; + + __asm__ __volatile("mfspr %0, %1" : "=r"(fpscr) : "K"(SPR_SPEFSCR)); + return ((fp_rnd_t)(fpscr & 0x3)); +} +#endif diff --git a/lib/libc/powerpcspe/gen/fpgetsticky.c b/lib/libc/powerpcspe/gen/fpgetsticky.c new file mode 100644 index 000000000000..a97c27296cab --- /dev/null +++ b/lib/libc/powerpcspe/gen/fpgetsticky.c @@ -0,0 +1,48 @@ +/* $NetBSD: fpgetsticky.c,v 1.3 2002/01/13 21:45:48 thorpej Exp $ */ + +/* + * Copyright (c) 2016 Justin Hibbits + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Dan Winship. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + + +#include "namespace.h" + +#include <sys/types.h> +#include <machine/spr.h> +#include <ieeefp.h> + +#ifndef _SOFT_FLOAT +fp_except_t +fpgetsticky() +{ + uint32_t fpscr; + + __asm__ __volatile("mfspr %0, %1" : "=r"(fpscr) : "K"(SPR_SPEFSCR)); + return ((fp_except_t)((fpscr >> 25) & 0x1f)); +} +#endif diff --git a/lib/libc/powerpcspe/gen/fpsetmask.c b/lib/libc/powerpcspe/gen/fpsetmask.c new file mode 100644 index 000000000000..a7a2569df905 --- /dev/null +++ b/lib/libc/powerpcspe/gen/fpsetmask.c @@ -0,0 +1,50 @@ +/* $NetBSD: fpsetmask.c,v 1.3 2002/01/13 21:45:48 thorpej Exp $ */ + +/* + * Copyright (c) 2016 Justin Hibbits + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Dan Winship. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include <sys/types.h> +#include <machine/spr.h> +#include <ieeefp.h> + +#ifndef _SOFT_FLOAT +fp_except_t +fpsetmask(fp_except_t mask) +{ + uint32_t fpscr; + fp_except_t old; + + __asm__ __volatile("mfspr %0, %1" : "=r"(fpscr) : "K"(SPR_SPEFSCR)); + old = (fp_except_t)((fpscr >> 2) & 0x1f); + fpscr = (fpscr & 0xffffff83) | ((mask & 0x1f) << 2); + __asm__ __volatile("mtspr %1,%0;isync" :: "r"(fpscr), "K"(SPR_SPEFSCR)); + return (old); +} +#endif diff --git a/lib/libc/powerpcspe/gen/fpsetround.c b/lib/libc/powerpcspe/gen/fpsetround.c new file mode 100644 index 000000000000..2280e190b2f9 --- /dev/null +++ b/lib/libc/powerpcspe/gen/fpsetround.c @@ -0,0 +1,50 @@ +/* $NetBSD: fpsetround.c,v 1.3 2002/01/13 21:45:48 thorpej Exp $ */ + +/* + * Copyright (c) 2016 Justin Hibbits + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Dan Winship. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include <sys/types.h> +#include <machine/spr.h> +#include <ieeefp.h> + +#ifndef _SOFT_FLOAT +fp_rnd_t +fpsetround(fp_rnd_t rnd_dir) +{ + uint32_t fpscr; + fp_rnd_t old; + + __asm__ __volatile("mfspr %0, %1" : "=r"(fpscr) : "K"(SPR_SPEFSCR) ); + old = (fp_rnd_t)(fpscr & 0x3); + fpscr = (fpscr & 0xfffffffc) | rnd_dir; + __asm__ __volatile("mtspr %1, %0;isync" :: "r"(fpscr), "K"(SPR_SPEFSCR)); + return (old); +} +#endif diff --git a/lib/libc/powerpcspe/gen/setjmp.S b/lib/libc/powerpcspe/gen/setjmp.S new file mode 100644 index 000000000000..1bd3edcf5239 --- /dev/null +++ b/lib/libc/powerpcspe/gen/setjmp.S @@ -0,0 +1,136 @@ +/*- + * Copyright (c) 2016 Justin Hibbits + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ +/* $NetBSD: setjmp.S,v 1.3 1998/10/03 12:30:38 tsubai Exp $ */ + +#include <machine/asm.h> +#include <sys/syscall.h> + +/* + * C library -- setjmp, longjmp + * + * longjmp(a,v) + * will generate a "return(v?v:1)" from the last call to + * setjmp(a) + * by restoring registers from the stack. + * The previous signal state is restored. + * + * jmpbuf layout: + * +------------+ + * | unused | + * +------------+ + * | sig state | + * | | + * | (4 words) | + * | | + * +------------+ + * | saved regs | + * | ... | + */ + +ENTRY(setjmp) + mr %r6,%r3 + li %r3,1 /* SIG_BLOCK, but doesn't matter */ + /* since set == NULL */ + li %r4,0 /* set = NULL */ + mr %r5,%r6 /* &oset */ + addi %r5,%r5,4 + li %r0, SYS_sigprocmask /*sigprocmask(SIG_BLOCK, NULL, &oset)*/ + sc /*assume no error XXX */ + mflr %r11 /* r11 <- link reg */ + mfcr %r12 /* r12 <- condition reg */ + mr %r10,%r1 /* r10 <- stackptr */ + mr %r9,%r2 /* r9 <- global ptr */ + evstdd %r9,24+0*8(%r6) + evstdd %r10,24+1*8(%r6) + evstdd %r11,24+2*8(%r6) + evstdd %r12,24+3*8(%r6) + evstdd %r13,24+4*8(%r6) + evstdd %r14,24+5*8(%r6) + evstdd %r15,24+6*8(%r6) + evstdd %r16,24+7*8(%r6) + evstdd %r17,24+8*8(%r6) + evstdd %r18,24+9*8(%r6) + evstdd %r19,24+10*8(%r6) + evstdd %r20,24+11*8(%r6) + evstdd %r21,24+12*8(%r6) + evstdd %r22,24+13*8(%r6) + evstdd %r23,24+14*8(%r6) + evstdd %r24,24+15*8(%r6) + evstdd %r25,24+16*8(%r6) + evstdd %r26,24+17*8(%r6) + evstdd %r27,24+18*8(%r6) + evstdd %r28,24+19*8(%r6) + evstdd %r29,24+20*8(%r6) + evstdd %r30,24+21*8(%r6) + evstdd %r31,24+22*8(%r6) + + li %r3,0 /* return (0) */ + blr +END(setjmp) + + WEAK_REFERENCE(CNAME(__longjmp), longjmp) +ENTRY(__longjmp) + evldd %r9,24+0*8(%r3) + evldd %r10,24+1*8(%r3) + evldd %r11,24+2*8(%r3) + evldd %r12,24+3*8(%r3) + evldd %r13,24+4*8(%r3) + evldd %r14,24+5*8(%r3) + evldd %r15,24+6*8(%r3) + evldd %r16,24+7*8(%r3) + evldd %r17,24+8*8(%r3) + evldd %r18,24+9*8(%r3) + evldd %r19,24+10*8(%r3) + evldd %r20,24+11*8(%r3) + evldd %r21,24+12*8(%r3) + evldd %r22,24+13*8(%r3) + evldd %r23,24+14*8(%r3) + evldd %r24,24+15*8(%r3) + evldd %r25,24+16*8(%r3) + evldd %r26,24+17*8(%r3) + evldd %r27,24+18*8(%r3) + evldd %r28,24+19*8(%r3) + evldd %r29,24+20*8(%r3) + evldd %r30,24+21*8(%r3) + evldd %r31,24+22*8(%r3) + + mr %r6,%r4 /* save val param */ + mtlr %r11 /* r11 -> link reg */ + mtcr %r12 /* r12 -> condition reg */ + mr %r1,%r10 /* r10 -> stackptr */ + mr %r4,%r3 + li %r3,3 /* SIG_SETMASK */ + addi %r4,%r4,4 /* &set */ + li %r5,0 /* oset = NULL */ + li %r0,SYS_sigprocmask /* sigprocmask(SIG_SET, &set, NULL) */ + sc /* assume no error XXX */ + or. %r3,%r6,%r6 + bnelr + li %r3,1 + blr +END(__longjmp) + + .section .note.GNU-stack,"",%progbits diff --git a/lib/libc/powerpcspe/gen/sigsetjmp.S b/lib/libc/powerpcspe/gen/sigsetjmp.S new file mode 100644 index 000000000000..45c85c3fce23 --- /dev/null +++ b/lib/libc/powerpcspe/gen/sigsetjmp.S @@ -0,0 +1,148 @@ +/*- + * Copyright (c) 2016 Justin Hibbits + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ +/* $NetBSD: sigsetjmp.S,v 1.4 1998/10/03 12:30:38 tsubai Exp $ */ + +#include <machine/asm.h> +/* + * C library -- sigsetjmp, siglongjmp + * + * siglongjmp(a,v) + * will generate a "return(v?v:1)" from the last call to + * sigsetjmp(a, savemask) + * by restoring registers from the stack. + * The previous signal state is restored if savemask is non-zero + * + * jmpbuf layout: + * +------------+ + * | savemask | + * +------------+ + * | sig state | + * | | + * | (4 words) | + * | | + * +------------+ + * | saved regs | + * | ... | + */ + + +#include <sys/syscall.h> + +ENTRY(sigsetjmp) + mr %r6,%r3 + stw %r4,0(%r3) + or. %r7,%r4,%r4 + beq 1f + li %r3,1 /* SIG_BLOCK, but doesn't matter */ + /* since set == NULL */ + li %r4,0 /* set = NULL */ + mr %r5,%r6 /* &oset */ + addi %r5,%r5,4 + li %r0, SYS_sigprocmask /* sigprocmask(SIG_BLOCK, NULL, &oset)*/ + sc /* assume no error XXX */ +1: + mflr %r11 + mfcr %r12 + mr %r10,%r1 + mr %r9,%r2 + + /* FPRs */ + evstdd %r9,24+0*8(%r6) + evstdd %r10,24+1*8(%r6) + evstdd %r11,24+2*8(%r6) + evstdd %r12,24+3*8(%r6) + evstdd %r13,24+4*8(%r6) + evstdd %r14,24+5*8(%r6) + evstdd %r15,24+6*8(%r6) + evstdd %r16,24+7*8(%r6) + evstdd %r17,24+8*8(%r6) + evstdd %r18,24+9*8(%r6) + evstdd %r19,24+10*8(%r6) + evstdd %r20,24+11*8(%r6) + evstdd %r21,24+12*8(%r6) + evstdd %r22,24+13*8(%r6) + evstdd %r23,24+14*8(%r6) + evstdd %r24,24+15*8(%r6) + evstdd %r25,24+16*8(%r6) + evstdd %r26,24+17*8(%r6) + evstdd %r27,24+18*8(%r6) + evstdd %r28,24+19*8(%r6) + evstdd %r29,24+20*8(%r6) + evstdd %r30,24+21*8(%r6) + evstdd %r31,24+22*8(%r6) + + li %r3,0 + blr +END(sigsetjmp) + +ENTRY(siglongjmp) + + /* FPRs */ + evldd %r9,24+0*8(%r3) + evldd %r10,24+1*8(%r3) + evldd %r11,24+2*8(%r3) + evldd %r12,24+3*8(%r3) + evldd %r13,24+4*8(%r3) + evldd %r14,24+5*8(%r3) + evldd %r15,24+6*8(%r3) + evldd %r16,24+7*8(%r3) + evldd %r17,24+8*8(%r3) + evldd %r18,24+9*8(%r3) + evldd %r19,24+10*8(%r3) + evldd %r20,24+11*8(%r3) + evldd %r21,24+12*8(%r3) + evldd %r22,24+13*8(%r3) + evldd %r23,24+14*8(%r3) + evldd %r24,24+15*8(%r3) + evldd %r25,24+16*8(%r3) + evldd %r26,24+17*8(%r3) + evldd %r27,24+18*8(%r3) + evldd %r28,24+19*8(%r3) + evldd %r29,24+20*8(%r3) + evldd %r30,24+21*8(%r3) + evldd %r31,24+22*8(%r3) + + lwz %r7,0(%r3) + mr %r6,%r4 + mtlr %r11 + mtcr %r12 + mr %r1,%r10 + or. %r7,%r7,%r7 + beq 1f + mr %r4,%r3 + li %r3,3 /* SIG_SETMASK */ + addi %r4,%r4,4 /* &set */ + li %r5,0 /* oset = NULL */ + li %r0,SYS_sigprocmask /* sigprocmask(SIG_SET, &set, NULL) */ + sc /* assume no error XXX */ +1: + or. %r3,%r6,%r6 + bnelr + li %r3,1 + blr +END(siglongjmp) + + .section .note.GNU-stack,"",%progbits diff --git a/lib/libc/powerpcspe/softfloat/milieu.h b/lib/libc/powerpcspe/softfloat/milieu.h new file mode 100644 index 000000000000..6139aa58b982 --- /dev/null +++ b/lib/libc/powerpcspe/softfloat/milieu.h @@ -0,0 +1,48 @@ +/* $NetBSD: milieu.h,v 1.1 2000/12/29 20:13:54 bjh21 Exp $ */ + +/* +=============================================================================== + +This C header file is part of the SoftFloat IEC/IEEE Floating-point +Arithmetic Package, Release 2a. + +Written by John R. Hauser. This work was made possible in part by the +International Computer Science Institute, located at Suite 600, 1947 Center +Street, Berkeley, California 94704. Funding was partially provided by the +National Science Foundation under grant MIP-9311980. The original version +of this code was written as part of a project to build a fixed-point vector +processor in collaboration with the University of California at Berkeley, +overseen by Profs. Nelson Morgan and John Wawrzynek. More information +is available through the Web page `http://HTTP.CS.Berkeley.EDU/~jhauser/ +arithmetic/SoftFloat.html'. + +THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE. Although reasonable effort +has been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT +TIMES RESULT IN INCORRECT BEHAVIOR. USE OF THIS SOFTWARE IS RESTRICTED TO +PERSONS AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ANY +AND ALL LOSSES, COSTS, OR OTHER PROBLEMS ARISING FROM ITS USE. + +Derivative works are acceptable, even for commercial purposes, so long as +(1) they include prominent notice that the work is derivative, and (2) they +include prominent notice akin to these four paragraphs for those parts of +this code that are retained. + +=============================================================================== +*/ + +/* +------------------------------------------------------------------------------- +Include common integer types and flags. +------------------------------------------------------------------------------- +*/ +#include "powerpc-gcc.h" + +/* +------------------------------------------------------------------------------- +Symbolic Boolean literals. +------------------------------------------------------------------------------- +*/ +enum { + FALSE = 0, + TRUE = 1 +}; diff --git a/lib/libc/powerpcspe/softfloat/powerpc-gcc.h b/lib/libc/powerpcspe/softfloat/powerpc-gcc.h new file mode 100644 index 000000000000..d11198866e39 --- /dev/null +++ b/lib/libc/powerpcspe/softfloat/powerpc-gcc.h @@ -0,0 +1,91 @@ +/* $NetBSD: arm-gcc.h,v 1.2 2001/02/21 18:09:25 bjh21 Exp $ */ + +/* +------------------------------------------------------------------------------- +One of the macros `BIGENDIAN' or `LITTLEENDIAN' must be defined. +------------------------------------------------------------------------------- +*/ +#define BIGENDIAN + +/* +------------------------------------------------------------------------------- +The macro `BITS64' can be defined to indicate that 64-bit integer types are +supported by the compiler. +------------------------------------------------------------------------------- +*/ +#define BITS64 + +/* +------------------------------------------------------------------------------- +Each of the following `typedef's defines the most convenient type that holds +integers of at least as many bits as specified. For example, `uint8' should +be the most convenient type that can hold unsigned integers of as many as +8 bits. The `flag' type must be able to hold either a 0 or 1. For most +implementations of C, `flag', `uint8', and `int8' should all be `typedef'ed +to the same as `int'. +------------------------------------------------------------------------------- +*/ +typedef int flag; +typedef unsigned int uint8; +typedef int int8; +typedef unsigned int uint16; +typedef int int16; +typedef unsigned int uint32; +typedef signed int int32; +#ifdef BITS64 +typedef unsigned long long int uint64; +typedef signed long long int int64; +#endif + +/* +------------------------------------------------------------------------------- +Each of the following `typedef's defines a type that holds integers +of _exactly_ the number of bits specified. For instance, for most +implementation of C, `bits16' and `sbits16' should be `typedef'ed to +`unsigned short int' and `signed short int' (or `short int'), respectively. +------------------------------------------------------------------------------- +*/ +typedef unsigned char bits8; +typedef signed char sbits8; +typedef unsigned short int bits16; +typedef signed short int sbits16; +typedef unsigned int bits32; +typedef signed int sbits32; +#ifdef BITS64 +typedef unsigned long long int bits64; +typedef signed long long int sbits64; +#endif + +#ifdef BITS64 +/* +------------------------------------------------------------------------------- +The `LIT64' macro takes as its argument a textual integer literal and +if necessary ``marks'' the literal as having a 64-bit integer type. +For example, the GNU C Compiler (`gcc') requires that 64-bit literals be +appended with the letters `LL' standing for `long long', which is `gcc's +name for the 64-bit integer type. Some compilers may allow `LIT64' to be +defined as the identity macro: `#define LIT64( a ) a'. +------------------------------------------------------------------------------- +*/ +#define LIT64( a ) a##LL +#endif + +/* +------------------------------------------------------------------------------- +The macro `INLINE' can be used before functions that should be inlined. If +a compiler does not support explicit inlining, this macro should be defined +to be `static'. +------------------------------------------------------------------------------- +*/ +#define INLINE static __inline + +/* +------------------------------------------------------------------------------- +The ARM FPA is odd in that it stores doubles high-order word first, no matter +what the endianness of the CPU. VFP is sane. +------------------------------------------------------------------------------- +*/ +#if defined(SOFTFLOAT_FOR_GCC) +#define FLOAT64_DEMANGLE(a) (a) +#define FLOAT64_MANGLE(a) (a) +#endif diff --git a/lib/libc/powerpcspe/softfloat/softfloat.h b/lib/libc/powerpcspe/softfloat/softfloat.h new file mode 100644 index 000000000000..b20cb3e7aa00 --- /dev/null +++ b/lib/libc/powerpcspe/softfloat/softfloat.h @@ -0,0 +1,306 @@ +/* $NetBSD: softfloat.h,v 1.6 2002/05/12 13:12:46 bjh21 Exp $ */ + +/* This is a derivative work. */ + +/* +=============================================================================== + +This C header file is part of the SoftFloat IEC/IEEE Floating-point +Arithmetic Package, Release 2a. + +Written by John R. Hauser. This work was made possible in part by the +International Computer Science Institute, located at Suite 600, 1947 Center +Street, Berkeley, California 94704. Funding was partially provided by the +National Science Foundation under grant MIP-9311980. The original version +of this code was written as part of a project to build a fixed-point vector +processor in collaboration with the University of California at Berkeley, +overseen by Profs. Nelson Morgan and John Wawrzynek. More information +is available through the Web page `http://HTTP.CS.Berkeley.EDU/~jhauser/ +arithmetic/SoftFloat.html'. + +THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE. Although reasonable effort +has been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT +TIMES RESULT IN INCORRECT BEHAVIOR. USE OF THIS SOFTWARE IS RESTRICTED TO +PERSONS AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ANY +AND ALL LOSSES, COSTS, OR OTHER PROBLEMS ARISING FROM ITS USE. + +Derivative works are acceptable, even for commercial purposes, so long as +(1) they include prominent notice that the work is derivative, and (2) they +include prominent notice akin to these four paragraphs for those parts of +this code that are retained. + +=============================================================================== +*/ + +/* +------------------------------------------------------------------------------- +The macro `FLOATX80' must be defined to enable the extended double-precision +floating-point format `floatx80'. If this macro is not defined, the +`floatx80' type will not be defined, and none of the functions that either +input or output the `floatx80' type will be defined. The same applies to +the `FLOAT128' macro and the quadruple-precision format `float128'. +------------------------------------------------------------------------------- +*/ +/* #define FLOATX80 */ +/* #define FLOAT128 */ + +#include <machine/ieeefp.h> + +/* +------------------------------------------------------------------------------- +Software IEC/IEEE floating-point types. +------------------------------------------------------------------------------- +*/ +typedef unsigned int float32; +typedef unsigned long long float64; +#ifdef FLOATX80 +typedef struct { + unsigned short high; + unsigned long long low; +} floatx80; +#endif +#ifdef FLOAT128 +typedef struct { + unsigned long long high, low; +} float128; +#endif + +/* +------------------------------------------------------------------------------- +Software IEC/IEEE floating-point underflow tininess-detection mode. +------------------------------------------------------------------------------- +*/ +#ifndef SOFTFLOAT_FOR_GCC +extern int8 float_detect_tininess; +#endif +enum { + float_tininess_after_rounding = 0, + float_tininess_before_rounding = 1 +}; + +/* +------------------------------------------------------------------------------- +Software IEC/IEEE floating-point rounding mode. +------------------------------------------------------------------------------- +*/ +extern fp_rnd_t float_rounding_mode; +enum { + float_round_nearest_even = FP_RN, + float_round_to_zero = FP_RZ, + float_round_down = FP_RM, + float_round_up = FP_RP +}; + +/* +------------------------------------------------------------------------------- +Software IEC/IEEE floating-point exception flags. +------------------------------------------------------------------------------- +*/ +typedef fp_except_t fp_except; + +extern fp_except float_exception_flags; +extern fp_except float_exception_mask; +enum { + float_flag_inexact = FP_X_IMP, + float_flag_underflow = FP_X_UFL, + float_flag_overflow = FP_X_OFL, + float_flag_divbyzero = FP_X_DZ, + float_flag_invalid = FP_X_INV +}; + +/* +------------------------------------------------------------------------------- +Routine to raise any or all of the software IEC/IEEE floating-point +exception flags. +------------------------------------------------------------------------------- +*/ +void float_raise( fp_except ); + +/* +------------------------------------------------------------------------------- +Software IEC/IEEE integer-to-floating-point conversion routines. +------------------------------------------------------------------------------- +*/ +float32 int32_to_float32( int ); +float64 int32_to_float64( int ); +#ifdef FLOATX80 +floatx80 int32_to_floatx80( int ); +#endif +#ifdef FLOAT128 +float128 int32_to_float128( int ); +#endif +float32 int64_to_float32( long long ); +float64 int64_to_float64( long long ); +#ifdef FLOATX80 +floatx80 int64_to_floatx80( long long ); +#endif +#ifdef FLOAT128 +float128 int64_to_float128( long long ); +#endif + +/* +------------------------------------------------------------------------------- +Software IEC/IEEE single-precision conversion routines. +------------------------------------------------------------------------------- +*/ +int float32_to_int32( float32 ); +int float32_to_int32_round_to_zero( float32 ); +unsigned int float32_to_uint32_round_to_zero( float32 ); +long long float32_to_int64( float32 ); +long long float32_to_int64_round_to_zero( float32 ); +float64 float32_to_float64( float32 ); +#ifdef FLOATX80 +floatx80 float32_to_floatx80( float32 ); +#endif +#ifdef FLOAT128 +float128 float32_to_float128( float32 ); +#endif + +/* +------------------------------------------------------------------------------- +Software IEC/IEEE single-precision operations. +------------------------------------------------------------------------------- +*/ +float32 float32_round_to_int( float32 ); +float32 float32_add( float32, float32 ); +float32 float32_sub( float32, float32 ); +float32 float32_mul( float32, float32 ); +float32 float32_div( float32, float32 ); +float32 float32_rem( float32, float32 ); +float32 float32_sqrt( float32 ); +int float32_eq( float32, float32 ); +int float32_le( float32, float32 ); +int float32_lt( float32, float32 ); +int float32_eq_signaling( float32, float32 ); +int float32_le_quiet( float32, float32 ); +int float32_lt_quiet( float32, float32 ); +#ifndef SOFTFLOAT_FOR_GCC +int float32_is_signaling_nan( float32 ); +#endif + +/* +------------------------------------------------------------------------------- +Software IEC/IEEE double-precision conversion routines. +------------------------------------------------------------------------------- +*/ +int float64_to_int32( float64 ); +int float64_to_int32_round_to_zero( float64 ); +unsigned int float64_to_uint32_round_to_zero( float64 ); +long long float64_to_int64( float64 ); +long long float64_to_int64_round_to_zero( float64 ); +float32 float64_to_float32( float64 ); +#ifdef FLOATX80 +floatx80 float64_to_floatx80( float64 ); +#endif +#ifdef FLOAT128 +float128 float64_to_float128( float64 ); +#endif + +/* +------------------------------------------------------------------------------- +Software IEC/IEEE double-precision operations. +------------------------------------------------------------------------------- +*/ +float64 float64_round_to_int( float64 ); +float64 float64_add( float64, float64 ); +float64 float64_sub( float64, float64 ); +float64 float64_mul( float64, float64 ); +float64 float64_div( float64, float64 ); +float64 float64_rem( float64, float64 ); +float64 float64_sqrt( float64 ); +int float64_eq( float64, float64 ); +int float64_le( float64, float64 ); +int float64_lt( float64, float64 ); +int float64_eq_signaling( float64, float64 ); +int float64_le_quiet( float64, float64 ); +int float64_lt_quiet( float64, float64 ); +#ifndef SOFTFLOAT_FOR_GCC +int float64_is_signaling_nan( float64 ); +#endif + +#ifdef FLOATX80 + +/* +------------------------------------------------------------------------------- +Software IEC/IEEE extended double-precision conversion routines. +------------------------------------------------------------------------------- +*/ +int floatx80_to_int32( floatx80 ); +int floatx80_to_int32_round_to_zero( floatx80 ); +long long floatx80_to_int64( floatx80 ); +long long floatx80_to_int64_round_to_zero( floatx80 ); +float32 floatx80_to_float32( floatx80 ); +float64 floatx80_to_float64( floatx80 ); +#ifdef FLOAT128 +float128 floatx80_to_float128( floatx80 ); +#endif + +/* +------------------------------------------------------------------------------- +Software IEC/IEEE extended double-precision rounding precision. Valid +values are 32, 64, and 80. +------------------------------------------------------------------------------- +*/ +extern int floatx80_rounding_precision; + +/* +------------------------------------------------------------------------------- +Software IEC/IEEE extended double-precision operations. +------------------------------------------------------------------------------- +*/ +floatx80 floatx80_round_to_int( floatx80 ); +floatx80 floatx80_add( floatx80, floatx80 ); +floatx80 floatx80_sub( floatx80, floatx80 ); +floatx80 floatx80_mul( floatx80, floatx80 ); +floatx80 floatx80_div( floatx80, floatx80 ); +floatx80 floatx80_rem( floatx80, floatx80 ); +floatx80 floatx80_sqrt( floatx80 ); +int floatx80_eq( floatx80, floatx80 ); +int floatx80_le( floatx80, floatx80 ); +int floatx80_lt( floatx80, floatx80 ); +int floatx80_eq_signaling( floatx80, floatx80 ); +int floatx80_le_quiet( floatx80, floatx80 ); +int floatx80_lt_quiet( floatx80, floatx80 ); +int floatx80_is_signaling_nan( floatx80 ); + +#endif + +#ifdef FLOAT128 + +/* +------------------------------------------------------------------------------- +Software IEC/IEEE quadruple-precision conversion routines. +------------------------------------------------------------------------------- +*/ +int float128_to_int32( float128 ); +int float128_to_int32_round_to_zero( float128 ); +long long float128_to_int64( float128 ); +long long float128_to_int64_round_to_zero( float128 ); +float32 float128_to_float32( float128 ); +float64 float128_to_float64( float128 ); +#ifdef FLOATX80 +floatx80 float128_to_floatx80( float128 ); +#endif + +/* +------------------------------------------------------------------------------- +Software IEC/IEEE quadruple-precision operations. +------------------------------------------------------------------------------- +*/ +float128 float128_round_to_int( float128 ); +float128 float128_add( float128, float128 ); +float128 float128_sub( float128, float128 ); +float128 float128_mul( float128, float128 ); +float128 float128_div( float128, float128 ); +float128 float128_rem( float128, float128 ); +float128 float128_sqrt( float128 ); +int float128_eq( float128, float128 ); +int float128_le( float128, float128 ); +int float128_lt( float128, float128 ); +int float128_eq_signaling( float128, float128 ); +int float128_le_quiet( float128, float128 ); +int float128_lt_quiet( float128, float128 ); +int float128_is_signaling_nan( float128 ); + +#endif + |