diff options
Diffstat (limited to 'lib/libc/riscv/gen')
| -rw-r--r-- | lib/libc/riscv/gen/Makefile.inc | 12 | ||||
| -rw-r--r-- | lib/libc/riscv/gen/_ctx_start.S | 41 | ||||
| -rw-r--r-- | lib/libc/riscv/gen/_setjmp.S | 144 | ||||
| -rw-r--r-- | lib/libc/riscv/gen/fabs.S | 48 | ||||
| -rw-r--r-- | lib/libc/riscv/gen/flt_rounds.c | 59 | ||||
| -rw-r--r-- | lib/libc/riscv/gen/fpgetmask.c | 38 | ||||
| -rw-r--r-- | lib/libc/riscv/gen/fpsetmask.c | 50 | ||||
| -rw-r--r-- | lib/libc/riscv/gen/infinity.c | 11 | ||||
| -rw-r--r-- | lib/libc/riscv/gen/makecontext.c | 88 | ||||
| -rw-r--r-- | lib/libc/riscv/gen/setjmp.S | 170 | ||||
| -rw-r--r-- | lib/libc/riscv/gen/sigsetjmp.S | 59 |
11 files changed, 720 insertions, 0 deletions
diff --git a/lib/libc/riscv/gen/Makefile.inc b/lib/libc/riscv/gen/Makefile.inc new file mode 100644 index 000000000000..443e029946bf --- /dev/null +++ b/lib/libc/riscv/gen/Makefile.inc @@ -0,0 +1,12 @@ +SRCS+= _ctx_start.S \ + fabs.S \ + flt_rounds.c \ + fpgetmask.c \ + fpsetmask.c \ + infinity.c \ + ldexp.c \ + makecontext.c \ + _setjmp.S \ + setjmp.S \ + sigsetjmp.S \ + trivial-getcontextx.c diff --git a/lib/libc/riscv/gen/_ctx_start.S b/lib/libc/riscv/gen/_ctx_start.S new file mode 100644 index 000000000000..69d19fc9403b --- /dev/null +++ b/lib/libc/riscv/gen/_ctx_start.S @@ -0,0 +1,41 @@ +/*- + * Copyright (c) 2015 Ruslan Bukin <br@bsdpad.com> + * All rights reserved. + * + * Portions of this software were developed by SRI International and the + * University of Cambridge Computer Laboratory under DARPA/AFRL contract + * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme. + * + * Portions of this software were developed by the University of Cambridge + * Computer Laboratory as part of the CTSRD Project, with support from the + * UK Higher Education Innovation Fund (HEIF). + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include <machine/asm.h> +ENTRY(_ctx_start) + jalr s0 /* Call func from makecontext */ + mv a0, s1 /* Load ucp saved in makecontext */ + call _C_LABEL(ctx_done) + call _C_LABEL(abort) +END(_ctx_start) diff --git a/lib/libc/riscv/gen/_setjmp.S b/lib/libc/riscv/gen/_setjmp.S new file mode 100644 index 000000000000..4554f736f72a --- /dev/null +++ b/lib/libc/riscv/gen/_setjmp.S @@ -0,0 +1,144 @@ +/*- + * Copyright (c) 2015-2016 Ruslan Bukin <br@bsdpad.com> + * All rights reserved. + * + * Portions of this software were developed by SRI International and the + * University of Cambridge Computer Laboratory under DARPA/AFRL contract + * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme. + * + * Portions of this software were developed by the University of Cambridge + * Computer Laboratory as part of the CTSRD Project, with support from the + * UK Higher Education Innovation Fund (HEIF). + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include <machine/asm.h> +#include <machine/setjmp.h> + +ENTRY(_setjmp) + /* Store the magic value and stack pointer */ + ld t0, .Lmagic + sd t0, (0 * 8)(a0) + sd sp, (1 * 8)(a0) + addi a0, a0, (2 * 8) + + /* Store the general purpose registers and ra */ + sd s0, (0 * 8)(a0) + sd s1, (1 * 8)(a0) + sd s2, (2 * 8)(a0) + sd s3, (3 * 8)(a0) + sd s4, (4 * 8)(a0) + sd s5, (5 * 8)(a0) + sd s6, (6 * 8)(a0) + sd s7, (7 * 8)(a0) + sd s8, (8 * 8)(a0) + sd s9, (9 * 8)(a0) + sd s10, (10 * 8)(a0) + sd s11, (11 * 8)(a0) + sd ra, (12 * 8)(a0) + addi a0, a0, (13 * 8) + +#if !defined(_STANDALONE) && defined(__riscv_float_abi_double) + /* Store the fpe registers */ + fsd fs0, (0 * 8)(a0) + fsd fs1, (1 * 8)(a0) + fsd fs2, (2 * 8)(a0) + fsd fs3, (3 * 8)(a0) + fsd fs4, (4 * 8)(a0) + fsd fs5, (5 * 8)(a0) + fsd fs6, (6 * 8)(a0) + fsd fs7, (7 * 8)(a0) + fsd fs8, (8 * 8)(a0) + fsd fs9, (9 * 8)(a0) + fsd fs10, (10 * 8)(a0) + fsd fs11, (11 * 8)(a0) + addi a0, a0, (12 * 8) +#endif + + /* Return value */ + li a0, 0 + ret + .align 3 +.Lmagic: + .quad _JB_MAGIC__SETJMP +END(_setjmp) + +ENTRY(_longjmp) + /* Check the magic value */ + ld t0, 0(a0) + ld t1, .Lmagic + bne t0, t1, botch + + /* Restore the stack pointer */ + ld t0, 8(a0) + mv sp, t0 + addi a0, a0, (2 * 8) + + /* Restore the general purpose registers and ra */ + ld s0, (0 * 8)(a0) + ld s1, (1 * 8)(a0) + ld s2, (2 * 8)(a0) + ld s3, (3 * 8)(a0) + ld s4, (4 * 8)(a0) + ld s5, (5 * 8)(a0) + ld s6, (6 * 8)(a0) + ld s7, (7 * 8)(a0) + ld s8, (8 * 8)(a0) + ld s9, (9 * 8)(a0) + ld s10, (10 * 8)(a0) + ld s11, (11 * 8)(a0) + ld ra, (12 * 8)(a0) + addi a0, a0, (13 * 8) + +#if !defined(_STANDALONE) && defined(__riscv_float_abi_double) + /* Restore the fpe registers */ + fld fs0, (0 * 8)(a0) + fld fs1, (1 * 8)(a0) + fld fs2, (2 * 8)(a0) + fld fs3, (3 * 8)(a0) + fld fs4, (4 * 8)(a0) + fld fs5, (5 * 8)(a0) + fld fs6, (6 * 8)(a0) + fld fs7, (7 * 8)(a0) + fld fs8, (8 * 8)(a0) + fld fs9, (9 * 8)(a0) + fld fs10, (10 * 8)(a0) + fld fs11, (11 * 8)(a0) + addi a0, a0, (12 * 8) +#endif + + /* Load the return value */ + mv a0, a1 + bnez a1, 1f + li a0, 1 +1: + ret + +botch: +#ifdef _STANDALONE + j botch +#else + call _C_LABEL(longjmperror) + call _C_LABEL(abort) +#endif +END(_longjmp) diff --git a/lib/libc/riscv/gen/fabs.S b/lib/libc/riscv/gen/fabs.S new file mode 100644 index 000000000000..21304036fc0f --- /dev/null +++ b/lib/libc/riscv/gen/fabs.S @@ -0,0 +1,48 @@ +/*- + * Copyright (c) 2015-2017 Ruslan Bukin <br@bsdpad.com> + * Copyright (c) 2021 Alex Richardson <arichardson@FreeBSD.org> + * All rights reserved. + * + * Portions of this software were developed by SRI International and the + * University of Cambridge Computer Laboratory under DARPA/AFRL contract + * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme. + * + * Portions of this software were developed by the University of Cambridge + * Computer Laboratory as part of the CTSRD Project, with support from the + * UK Higher Education Innovation Fund (HEIF). + * + * This work was supported by Innovate UK project 105694, "Digital Security + * by Design (DSbD) Technology Platform Prototype". + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include <machine/asm.h> +ENTRY(fabs) +#ifdef __riscv_float_abi_double + fabs.d fa0, fa0 +#else + slli a0, a0, 1 + srli a0, a0, 1 +#endif + ret +END(fabs) diff --git a/lib/libc/riscv/gen/flt_rounds.c b/lib/libc/riscv/gen/flt_rounds.c new file mode 100644 index 000000000000..bccd7d8baa44 --- /dev/null +++ b/lib/libc/riscv/gen/flt_rounds.c @@ -0,0 +1,59 @@ +/*- + * Copyright (c) 2015-2016 Ruslan Bukin <br@bsdpad.com> + * All rights reserved. + * + * Portions of this software were developed by SRI International and the + * University of Cambridge Computer Laboratory under DARPA/AFRL contract + * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme. + * + * Portions of this software were developed by the University of Cambridge + * Computer Laboratory as part of the CTSRD Project, with support from the + * UK Higher Education Innovation Fund (HEIF). + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include <sys/types.h> + +#include <fenv.h> +#include <float.h> + +int +__flt_rounds(void) +{ + uint64_t mode; + + __asm __volatile("csrr %0, fcsr" : "=r" (mode)); + + switch (mode & _ROUND_MASK) { + case FE_TOWARDZERO: + return (0); + case FE_TONEAREST: + return (1); + case FE_UPWARD: + return (2); + case FE_DOWNWARD: + return (3); + } + + return (-1); +} diff --git a/lib/libc/riscv/gen/fpgetmask.c b/lib/libc/riscv/gen/fpgetmask.c new file mode 100644 index 000000000000..7835a17cff60 --- /dev/null +++ b/lib/libc/riscv/gen/fpgetmask.c @@ -0,0 +1,38 @@ +/*- + * Copyright (c) 2020 Axiado + * All rights reserved. + * + * This software was developed by Kristof Provost under + * sponsorship from Axiado. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include <sys/types.h> +#include <ieeefp.h> + +fp_except_t +fpgetmask(void) +{ + + return (0); +} diff --git a/lib/libc/riscv/gen/fpsetmask.c b/lib/libc/riscv/gen/fpsetmask.c new file mode 100644 index 000000000000..024f1fd8d8bc --- /dev/null +++ b/lib/libc/riscv/gen/fpsetmask.c @@ -0,0 +1,50 @@ +/*- + * Copyright (c) 2020 Axiado + * All rights reserved. + * + * This software was developed by Kristof Provost under + * sponsorship from Axiado. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include <sys/types.h> +#include <ieeefp.h> + +/** + * RISC-V doesn't support floating-point exceptions: RISC-V Instruction Set + * Manual: Volume I: User-Level ISA, 11.2 Floating-Point Control and Status + * Register: "As allowed by the standard, we do not support traps on + * floating-point exceptions in the base ISA, but instead require explicit + * checks of the flags in software. We considered adding branches controlled + * directly by the contents of the floating-point accrued exception flags, but + * ultimately chose to omit these instructions to keep the ISA simple." + * + * We still need this function, because some applications (notably Perl) call + * it, but we cannot provide a meaningful implementation. + **/ +fp_except_t +fpsetmask(fp_except_t mask) +{ + + return (0); +} diff --git a/lib/libc/riscv/gen/infinity.c b/lib/libc/riscv/gen/infinity.c new file mode 100644 index 000000000000..ae44d5195a3b --- /dev/null +++ b/lib/libc/riscv/gen/infinity.c @@ -0,0 +1,11 @@ +/* + * infinity.c + */ + +#include <math.h> + +/* bytes for +Infinity on riscv */ +const union __infinity_un __infinity = { { 0, 0, 0, 0, 0, 0, 0xf0, 0x7f } }; + +/* bytes for NaN */ +const union __nan_un __nan = { { 0, 0, 0xc0, 0xff } }; diff --git a/lib/libc/riscv/gen/makecontext.c b/lib/libc/riscv/gen/makecontext.c new file mode 100644 index 000000000000..e5371d082b2c --- /dev/null +++ b/lib/libc/riscv/gen/makecontext.c @@ -0,0 +1,88 @@ +/*- + * Copyright (c) 2015 Ruslan Bukin <br@bsdpad.com> + * All rights reserved. + * + * Portions of this software were developed by SRI International and the + * University of Cambridge Computer Laboratory under DARPA/AFRL contract + * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme. + * + * Portions of this software were developed by the University of Cambridge + * Computer Laboratory as part of the CTSRD Project, with support from the + * UK Higher Education Innovation Fund (HEIF). + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include <sys/param.h> + +#include <machine/riscvreg.h> + +#include <inttypes.h> +#include <stdarg.h> +#include <stdlib.h> +#include <ucontext.h> + +void _ctx_start(void); + +void +ctx_done(ucontext_t *ucp) +{ + + if (ucp->uc_link == NULL) { + exit(0); + } else { + setcontext((const ucontext_t *)ucp->uc_link); + abort(); + } +} + +__weak_reference(__makecontext, makecontext); + +void +__makecontext(ucontext_t *ucp, void (*func)(void), int argc, ...) +{ + struct gpregs *gp; + va_list ap; + int i; + + /* A valid context is required. */ + if (ucp == NULL) + return; + + if ((argc < 0) || (argc > 8)) + return; + + gp = &ucp->uc_mcontext.mc_gpregs; + + va_start(ap, argc); + /* Pass up to eight arguments in a0-7. */ + for (i = 0; i < argc && i < 8; i++) + gp->gp_a[i] = va_arg(ap, uint64_t); + va_end(ap); + + /* Set the stack */ + gp->gp_sp = STACKALIGN(ucp->uc_stack.ss_sp + ucp->uc_stack.ss_size); + /* Arrange for return via the trampoline code. */ + gp->gp_sepc = (__register_t)_ctx_start; + gp->gp_s[0] = (__register_t)func; + gp->gp_s[1] = (__register_t)ucp; +} diff --git a/lib/libc/riscv/gen/setjmp.S b/lib/libc/riscv/gen/setjmp.S new file mode 100644 index 000000000000..efac05ecc611 --- /dev/null +++ b/lib/libc/riscv/gen/setjmp.S @@ -0,0 +1,170 @@ +/*- + * Copyright (c) 2015-2016 Ruslan Bukin <br@bsdpad.com> + * All rights reserved. + * + * Portions of this software were developed by SRI International and the + * University of Cambridge Computer Laboratory under DARPA/AFRL contract + * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme. + * + * Portions of this software were developed by the University of Cambridge + * Computer Laboratory as part of the CTSRD Project, with support from the + * UK Higher Education Innovation Fund (HEIF). + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include <machine/asm.h> +#include <machine/setjmp.h> + +ENTRY(setjmp) + addi sp, sp, -(2 * 8) + sd a0, 0(sp) + sd ra, 8(sp) + + /* Store the signal mask */ + addi a2, a0, (_JB_SIGMASK * 8) /* oset */ + li a1, 0 /* set */ + li a0, 1 /* SIG_BLOCK */ + call _C_LABEL(sigprocmask) + + ld a0, 0(sp) + ld ra, 8(sp) + addi sp, sp, (2 * 8) + + /* Store the magic value and stack pointer */ + ld t0, .Lmagic + sd t0, (0 * 8)(a0) + sd sp, (1 * 8)(a0) + addi a0, a0, (2 * 8) + + /* Store the general purpose registers and ra */ + sd s0, (0 * 8)(a0) + sd s1, (1 * 8)(a0) + sd s2, (2 * 8)(a0) + sd s3, (3 * 8)(a0) + sd s4, (4 * 8)(a0) + sd s5, (5 * 8)(a0) + sd s6, (6 * 8)(a0) + sd s7, (7 * 8)(a0) + sd s8, (8 * 8)(a0) + sd s9, (9 * 8)(a0) + sd s10, (10 * 8)(a0) + sd s11, (11 * 8)(a0) + sd ra, (12 * 8)(a0) + addi a0, a0, (13 * 8) + +#ifdef __riscv_float_abi_double + /* Store the fpe registers */ + fsd fs0, (0 * 8)(a0) + fsd fs1, (1 * 8)(a0) + fsd fs2, (2 * 8)(a0) + fsd fs3, (3 * 8)(a0) + fsd fs4, (4 * 8)(a0) + fsd fs5, (5 * 8)(a0) + fsd fs6, (6 * 8)(a0) + fsd fs7, (7 * 8)(a0) + fsd fs8, (8 * 8)(a0) + fsd fs9, (9 * 8)(a0) + fsd fs10, (10 * 8)(a0) + fsd fs11, (11 * 8)(a0) + addi a0, a0, (12 * 8) +#endif + + /* Return value */ + li a0, 0 + ret + .align 3 +.Lmagic: + .quad _JB_MAGIC_SETJMP +END(setjmp) + +ENTRY(longjmp) + /* Check the magic value */ + ld t0, 0(a0) + ld t1, .Lmagic + bne t0, t1, botch + + addi sp, sp, -(4 * 8) + sd a0, (0 * 8)(sp) + sd ra, (1 * 8)(sp) + sd a1, (2 * 8)(sp) + + /* Restore the signal mask */ + li a2, 0 /* oset */ + addi a1, a0, (_JB_SIGMASK * 8) /* set */ + li a0, 3 /* SIG_BLOCK */ + call _C_LABEL(sigprocmask) + + ld a1, (2 * 8)(sp) + ld ra, (1 * 8)(sp) + ld a0, (0 * 8)(sp) + addi sp, sp, (4 * 8) + + /* Restore the stack pointer */ + ld t0, 8(a0) + mv sp, t0 + addi a0, a0, (2 * 8) + + /* Restore the general purpose registers and ra */ + ld s0, (0 * 8)(a0) + ld s1, (1 * 8)(a0) + ld s2, (2 * 8)(a0) + ld s3, (3 * 8)(a0) + ld s4, (4 * 8)(a0) + ld s5, (5 * 8)(a0) + ld s6, (6 * 8)(a0) + ld s7, (7 * 8)(a0) + ld s8, (8 * 8)(a0) + ld s9, (9 * 8)(a0) + ld s10, (10 * 8)(a0) + ld s11, (11 * 8)(a0) + ld ra, (12 * 8)(a0) + addi a0, a0, (13 * 8) + +#ifdef __riscv_float_abi_double + /* Restore the fpe registers */ + fld fs0, (0 * 8)(a0) + fld fs1, (1 * 8)(a0) + fld fs2, (2 * 8)(a0) + fld fs3, (3 * 8)(a0) + fld fs4, (4 * 8)(a0) + fld fs5, (5 * 8)(a0) + fld fs6, (6 * 8)(a0) + fld fs7, (7 * 8)(a0) + fld fs8, (8 * 8)(a0) + fld fs9, (9 * 8)(a0) + fld fs10, (10 * 8)(a0) + fld fs11, (11 * 8)(a0) + addi a0, a0, (12 * 8) +#endif + + /* Load the return value */ + mv a0, a1 + bnez a1, 1f + li a0, 1 +1: + ret + +botch: + call _C_LABEL(longjmperror) + call _C_LABEL(abort) +END(longjmp) diff --git a/lib/libc/riscv/gen/sigsetjmp.S b/lib/libc/riscv/gen/sigsetjmp.S new file mode 100644 index 000000000000..4f32d9fb4daf --- /dev/null +++ b/lib/libc/riscv/gen/sigsetjmp.S @@ -0,0 +1,59 @@ +/*- + * Copyright (c) 2015 Ruslan Bukin <br@bsdpad.com> + * All rights reserved. + * + * Portions of this software were developed by SRI International and the + * University of Cambridge Computer Laboratory under DARPA/AFRL contract + * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme. + * + * Portions of this software were developed by the University of Cambridge + * Computer Laboratory as part of the CTSRD Project, with support from the + * UK Higher Education Innovation Fund (HEIF). + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include <machine/asm.h> +#include <machine/setjmp.h> + +ENTRY(sigsetjmp) + beqz a1, 1f + tail _C_LABEL(setjmp) +1: + tail _C_LABEL(_setjmp) +END(sigsetjmp) + +ENTRY(siglongjmp) + /* Load the _setjmp magic */ + ld a2, .Lmagic + ld a3, 0(a0) + + /* Check the magic */ + beq a2, a3, 1f + tail _C_LABEL(longjmp) +1: + tail _C_LABEL(_longjmp) + + .align 3 +.Lmagic: + .quad _JB_MAGIC__SETJMP +END(siglongjmp) |