diff options
Diffstat (limited to 'llvm/lib/CodeGen/MachineSink.cpp')
-rw-r--r-- | llvm/lib/CodeGen/MachineSink.cpp | 53 |
1 files changed, 23 insertions, 30 deletions
diff --git a/llvm/lib/CodeGen/MachineSink.cpp b/llvm/lib/CodeGen/MachineSink.cpp index ec98394dca79..30745c7a5583 100644 --- a/llvm/lib/CodeGen/MachineSink.cpp +++ b/llvm/lib/CodeGen/MachineSink.cpp @@ -131,7 +131,7 @@ namespace { // will be split. SetVector<std::pair<MachineBasicBlock *, MachineBasicBlock *>> ToSplit; - SparseBitVector<> RegsToClearKillFlags; + DenseSet<Register> RegsToClearKillFlags; using AllSuccsCache = std::map<MachineBasicBlock *, SmallVector<MachineBasicBlock *, 4>>; @@ -476,14 +476,13 @@ bool MachineSinking::runOnMachineFunction(MachineFunction &MF) { // of a def-use chain, if there is any. // TODO: Sort the candidates using a cost-model. unsigned i = 0; - for (auto It = Candidates.rbegin(); It != Candidates.rend(); ++It) { + for (MachineInstr *I : llvm::reverse(Candidates)) { if (i++ == SinkIntoLoopLimit) { LLVM_DEBUG(dbgs() << "LoopSink: Limit reached of instructions to " "be analysed."); break; } - MachineInstr *I = *It; if (!SinkIntoLoop(L, *I)) break; EverMadeChange = true; @@ -683,13 +682,9 @@ bool MachineSinking::PostponeSplitCriticalEdge(MachineInstr &MI, // There is no need to do this check if all the uses are PHI nodes. PHI // sources are only defined on the specific predecessor edges. if (!BreakPHIEdge) { - for (MachineBasicBlock::pred_iterator PI = ToBB->pred_begin(), - E = ToBB->pred_end(); PI != E; ++PI) { - if (*PI == FromBB) - continue; - if (!DT->dominates(ToBB, *PI)) + for (MachineBasicBlock *Pred : ToBB->predecessors()) + if (Pred != FromBB && !DT->dominates(ToBB, Pred)) return false; - } } ToSplit.insert(std::make_pair(FromBB, ToBB)); @@ -1329,7 +1324,8 @@ bool MachineSinking::SinkInstruction(MachineInstr &MI, bool &SawStore, // "zombie" define of that preg. E.g., EFLAGS. (<rdar://problem/8030636>) for (unsigned I = 0, E = MI.getNumOperands(); I != E; ++I) { const MachineOperand &MO = MI.getOperand(I); - if (!MO.isReg()) continue; + if (!MO.isReg() || MO.isUse()) + continue; Register Reg = MO.getReg(); if (Reg == 0 || !Register::isPhysicalRegister(Reg)) continue; @@ -1439,7 +1435,7 @@ bool MachineSinking::SinkInstruction(MachineInstr &MI, bool &SawStore, // used registers. for (MachineOperand &MO : MI.operands()) { if (MO.isReg() && MO.isUse()) - RegsToClearKillFlags.set(MO.getReg()); // Remember to clear kill flags. + RegsToClearKillFlags.insert(MO.getReg()); // Remember to clear kill flags. } return true; @@ -1718,10 +1714,7 @@ bool PostRAMachineSinking::tryToSinkCopy(MachineBasicBlock &CurBB, UsedRegUnits.clear(); SeenDbgInstrs.clear(); - for (auto I = CurBB.rbegin(), E = CurBB.rend(); I != E;) { - MachineInstr *MI = &*I; - ++I; - + for (MachineInstr &MI : llvm::make_early_inc_range(llvm::reverse(CurBB))) { // Track the operand index for use in Copy. SmallVector<unsigned, 2> UsedOpsInCopy; // Track the register number defed in Copy. @@ -1729,14 +1722,14 @@ bool PostRAMachineSinking::tryToSinkCopy(MachineBasicBlock &CurBB, // We must sink this DBG_VALUE if its operand is sunk. To avoid searching // for DBG_VALUEs later, record them when they're encountered. - if (MI->isDebugValue()) { + if (MI.isDebugValue()) { SmallDenseMap<MCRegister, SmallVector<unsigned, 2>, 4> MIUnits; bool IsValid = true; - for (MachineOperand &MO : MI->debug_operands()) { + for (MachineOperand &MO : MI.debug_operands()) { if (MO.isReg() && Register::isPhysicalRegister(MO.getReg())) { // Bail if we can already tell the sink would be rejected, rather // than needlessly accumulating lots of DBG_VALUEs. - if (hasRegisterDependency(MI, UsedOpsInCopy, DefedRegsInCopy, + if (hasRegisterDependency(&MI, UsedOpsInCopy, DefedRegsInCopy, ModifiedRegUnits, UsedRegUnits)) { IsValid = false; break; @@ -1750,28 +1743,28 @@ bool PostRAMachineSinking::tryToSinkCopy(MachineBasicBlock &CurBB, } if (IsValid) { for (auto RegOps : MIUnits) - SeenDbgInstrs[RegOps.first].push_back({MI, RegOps.second}); + SeenDbgInstrs[RegOps.first].push_back({&MI, RegOps.second}); } continue; } - if (MI->isDebugOrPseudoInstr()) + if (MI.isDebugOrPseudoInstr()) continue; // Do not move any instruction across function call. - if (MI->isCall()) + if (MI.isCall()) return false; - if (!MI->isCopy() || !MI->getOperand(0).isRenamable()) { - LiveRegUnits::accumulateUsedDefed(*MI, ModifiedRegUnits, UsedRegUnits, + if (!MI.isCopy() || !MI.getOperand(0).isRenamable()) { + LiveRegUnits::accumulateUsedDefed(MI, ModifiedRegUnits, UsedRegUnits, TRI); continue; } // Don't sink the COPY if it would violate a register dependency. - if (hasRegisterDependency(MI, UsedOpsInCopy, DefedRegsInCopy, + if (hasRegisterDependency(&MI, UsedOpsInCopy, DefedRegsInCopy, ModifiedRegUnits, UsedRegUnits)) { - LiveRegUnits::accumulateUsedDefed(*MI, ModifiedRegUnits, UsedRegUnits, + LiveRegUnits::accumulateUsedDefed(MI, ModifiedRegUnits, UsedRegUnits, TRI); continue; } @@ -1782,7 +1775,7 @@ bool PostRAMachineSinking::tryToSinkCopy(MachineBasicBlock &CurBB, // Don't sink if we cannot find a single sinkable successor in which Reg // is live-in. if (!SuccBB) { - LiveRegUnits::accumulateUsedDefed(*MI, ModifiedRegUnits, UsedRegUnits, + LiveRegUnits::accumulateUsedDefed(MI, ModifiedRegUnits, UsedRegUnits, TRI); continue; } @@ -1793,7 +1786,7 @@ bool PostRAMachineSinking::tryToSinkCopy(MachineBasicBlock &CurBB, // recorded which reg units that DBG_VALUEs read, if this instruction // writes any of those units then the corresponding DBG_VALUEs must sink. MapVector<MachineInstr *, MIRegs::second_type> DbgValsToSinkMap; - for (auto &MO : MI->operands()) { + for (auto &MO : MI.operands()) { if (!MO.isReg() || !MO.isDef()) continue; @@ -1811,10 +1804,10 @@ bool PostRAMachineSinking::tryToSinkCopy(MachineBasicBlock &CurBB, // Clear the kill flag if SrcReg is killed between MI and the end of the // block. - clearKillFlags(MI, CurBB, UsedOpsInCopy, UsedRegUnits, TRI); + clearKillFlags(&MI, CurBB, UsedOpsInCopy, UsedRegUnits, TRI); MachineBasicBlock::iterator InsertPos = SuccBB->getFirstNonPHI(); - performSink(*MI, *SuccBB, InsertPos, DbgValsToSink); - updateLiveIn(MI, SuccBB, UsedOpsInCopy, DefedRegsInCopy); + performSink(MI, *SuccBB, InsertPos, DbgValsToSink); + updateLiveIn(&MI, SuccBB, UsedOpsInCopy, DefedRegsInCopy); Changed = true; ++NumPostRACopySink; |