aboutsummaryrefslogtreecommitdiff
path: root/llvm/lib/Target/AMDGPU/SILateBranchLowering.cpp
diff options
context:
space:
mode:
Diffstat (limited to 'llvm/lib/Target/AMDGPU/SILateBranchLowering.cpp')
-rw-r--r--llvm/lib/Target/AMDGPU/SILateBranchLowering.cpp19
1 files changed, 19 insertions, 0 deletions
diff --git a/llvm/lib/Target/AMDGPU/SILateBranchLowering.cpp b/llvm/lib/Target/AMDGPU/SILateBranchLowering.cpp
index df522a9099c0..abb72e8e63c3 100644
--- a/llvm/lib/Target/AMDGPU/SILateBranchLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/SILateBranchLowering.cpp
@@ -30,6 +30,7 @@ private:
const SIInstrInfo *TII = nullptr;
MachineDominatorTree *MDT = nullptr;
+ void expandChainCall(MachineInstr &MI);
void earlyTerm(MachineInstr &MI, MachineBasicBlock *EarlyExitBlock);
public:
@@ -116,6 +117,18 @@ static void splitBlock(MachineBasicBlock &MBB, MachineInstr &MI,
MDT->getBase().applyUpdates(DTUpdates);
}
+void SILateBranchLowering::expandChainCall(MachineInstr &MI) {
+ // This is a tail call that needs to be expanded into at least
+ // 2 instructions, one for setting EXEC and one for the actual tail call.
+ constexpr unsigned ExecIdx = 3;
+
+ BuildMI(*MI.getParent(), MI, MI.getDebugLoc(), TII->get(MovOpc), ExecReg)
+ ->addOperand(MI.getOperand(ExecIdx));
+ MI.removeOperand(ExecIdx);
+
+ MI.setDesc(TII->get(AMDGPU::SI_TCRETURN));
+}
+
void SILateBranchLowering::earlyTerm(MachineInstr &MI,
MachineBasicBlock *EarlyExitBlock) {
MachineBasicBlock &MBB = *MI.getParent();
@@ -158,6 +171,12 @@ bool SILateBranchLowering::runOnMachineFunction(MachineFunction &MF) {
}
break;
+ case AMDGPU::SI_CS_CHAIN_TC_W32:
+ case AMDGPU::SI_CS_CHAIN_TC_W64:
+ expandChainCall(MI);
+ MadeChange = true;
+ break;
+
case AMDGPU::SI_EARLY_TERMINATE_SCC0:
EarlyTermInstrs.push_back(&MI);
break;